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11 Commits
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Author SHA1 Message Date
openeuler-ci-bot
22efc4b948
!13 [sync] PR-11: add support for sw_64 
From: @openeuler-sync-bot 
Reviewed-by: @weidongkl 
Signed-off-by: @weidongkl
 2025-03-10 01:24:24 +00:00
Hailiang
622abf9df4 add support for sw_64 
(cherry picked from commit 66a1af5d1b951a5c2c538e273683771ec461eb09)
 2025-03-08 19:34:27 +08:00
Hailiang
d235b1c450 add support for sw_64 
(cherry picked from commit b3aa1827d1d3a861dc6ddbc188e2818ce977b04f)
 2025-03-08 19:34:26 +08:00
openeuler-ci-bot
abb27bf93c
!6 add support for loongarch 
From: @zhangwenlong01 
Reviewed-by: @weidongkl 
Signed-off-by: @weidongkl
 2024-06-19 08:56:27 +00:00
Wenlong Zhang
d52c71bb33 add support for loongarch 2024-06-19 15:00:10 +08:00
openeuler-ci-bot
746b38d83c
!5 【轻量级 PR】：update cln.yaml. 
From: @licihua 
Reviewed-by: @misaka00251 
Signed-off-by: @misaka00251
 2024-01-04 16:38:37 +00:00
Monday
8235a19cd4
update cln.yaml. 
#https://gitee.com/openeuler/openEuler-Advisor/issues/I8SW4M?from=project-issue

Signed-off-by: Monday <licihua@huawei.com>
 2024-01-04 11:19:02 +00:00
openeuler-ci-bot
a133171022
!4 Fix build on riscv64 
From: @misaka00251 
Reviewed-by: @open-bot 
Signed-off-by: @open-bot
 2023-10-11 03:26:30 +00:00
misaka00251
df648826f2 Fix build on riscv64 2023-10-11 11:15:56 +08:00
openeuler-ci-bot
c3ad128532
!3 Remove patch 
From: @misaka00251 
Reviewed-by: @leeffo 
Signed-off-by: @leeffo
 2023-05-08 09:10:33 +00:00
misaka00251
7b558e7314
Remove patch 2023-05-08 16:43:20 +08:00
6 changed files with 115 additions and 106 deletions
Show Stats Expand all files Collapse all files

54
add-riscv-support.patch → 0001-add-support-for-loongarch.patch
View File

@ -1,62 +1,66 @@
Author: misaka00251 <misaka00251@misakanet.cn>
Date: Fri Jul 15 16:13:26 2022 +0800
From 538c493d480cf09f5d764553f065581ff1e066b1 Mon Sep 17 00:00:00 2001
From: Wenlong Zhang <zhangwenlong@loongson.cn>
Date: Wed, 19 Jun 2024 14:57:24 +0800
Subject: [PATCH] add support for loongarch
Add riscv64 support.
---
include/cln/object.h | 2 +-
include/cln/types.h | 8 ++++----
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/include/cln/object.h b/include/cln/object.h
index 56f6f07..e26e079 100644
index f6da29f..87ce1e3 100644
--- a/include/cln/object.h
+++ b/include/cln/object.h
@@ -22,10 +22,10 @@ namespace cln {
#if defined(__m68k__)
#define cl_word_alignment 2
#endif
-#if defined(__i386__) || (defined(__mips__) && !defined(__LP64__)) || (defined(__sparc__) && !defined(__arch64__)) || defined(__hppa__) || defined(__arm__) || defined(__rs6000__) || defined(__m88k__) || defined(__convex__) || (defined(__s390__) && !defined(__s390x__)) || defined(__sh__) || (defined(__x86_64__) && defined(__ILP32__))
+#if defined(__i386__) || (defined(__mips__) && !defined(__LP64__)) || (defined(__sparc__) && !defined(__arch64__)) || defined(__hppa__) || defined(__arm__) || defined(__rs6000__) || defined(__m88k__) || defined(__convex__) || (defined(__s390__) && !defined(__s390x__)) || defined(__sh__) || (defined(__x86_64__) && defined(__ILP32__)) || (defined(__riscv) && __riscv_xlen == 32)
@@ -25,7 +25,7 @@ namespace cln {
#if defined(__i386__) || (defined(__mips__) && !defined(__LP64__)) || (defined(__sparc__) && !defined(__arch64__)) || defined(__hppa__) || defined(__arm__) || defined(__rs6000__) || defined(__m88k__) || defined(__convex__) || (defined(__s390__) && !defined(__s390x__)) || defined(__sh__) || (defined(__x86_64__) && defined(__ILP32__))
#define cl_word_alignment 4
#endif
-#if defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || (defined(__x86_64__) && !defined(__ILP32__)) || defined(__s390x__) || defined(__aarch64__)
+#if defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || (defined(__x86_64__) && !defined(__ILP32__)) || defined(__s390x__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64)
-#if defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || (defined(__x86_64__) && !defined(__ILP32__)) || defined(__s390x__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__)
+#if defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || (defined(__x86_64__) && !defined(__ILP32__)) || defined(__s390x__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64)
#define cl_word_alignment 8
#endif
#if !defined(cl_word_alignment)
diff --git a/include/cln/types.h b/include/cln/types.h
index 159e8bc..fd3c9a2 100644
index 7ec3770..519954a 100644
--- a/include/cln/types.h
+++ b/include/cln/types.h
@@ -48,7 +48,7 @@
@@ -51,7 +51,7 @@
#undef HAVE_LONGLONG
#endif
#endif
- #if defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__aarch64__))
+ #if defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__aarch64__)) || (defined(__riscv) && __riscv_xlen == 64)
- #if defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || (defined(__x86_64__) || defined(_M_AMD64)) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64)) || defined(__e2k__)
+ #if defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || (defined(__x86_64__) || defined(_M_AMD64)) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64)) || defined(__e2k__) || defined(__loongarch_lp64)
// 64 bit registers in hardware
#define HAVE_FAST_LONGLONG
#endif
@@ -76,7 +76,7 @@
@@ -79,7 +79,7 @@
// Integer type used for counters.
// Constraint: sizeof(uintC) >= sizeof(uintL)
- #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__)))
+ #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__))) || (defined(__riscv) && __riscv_xlen == 64)
- #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__)))
+ #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64)))
#define intCsize long_bitsize
typedef long sintC;
typedef unsigned long uintC;
@@ -88,7 +88,7 @@
@@ -91,7 +91,7 @@
// Integer type used for lfloat exponents.
// Constraint: sizeof(uintE) >= sizeof(uintC)
- #if (defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__i386__) || defined(__mips__) || defined(__rs6000__) || defined(__aarch64__)))
+ #if (defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__i386__) || defined(__mips__) || defined(__rs6000__) || defined(__aarch64__))) || (defined(__riscv) && __riscv_xlen == 64)
- #if (defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__i386__) || defined(__mips__) || defined(__rs6000__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__)))
+ #if (defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__i386__) || defined(__mips__) || defined(__rs6000__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64)))
#define intEsize 64
typedef sint64 sintE;
typedef uint64 uintE;
@@ -127,7 +127,7 @@
@@ -132,7 +132,7 @@
typedef int sintD;
typedef unsigned int uintD;
#else // we are not using GMP, so just guess something reasonable
- #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || defined(__s390x__) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__)))
+ #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || defined(__s390x__) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__))) || (defined(__riscv) && __riscv_xlen == 64)
- #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || defined(__s390x__) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__)))
+ #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || defined(__s390x__) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64)))
#define intDsize 64
typedef sint64 sintD;
typedef uint64 uintD;
--
2.43.0

66
0002-add-sw_64-support.patch Normal file
View File

@ -0,0 +1,66 @@
From e5a9d472804fe141f5796b9bde5a7b85dca6d1de Mon Sep 17 00:00:00 2001
From: Hailiang <mahailiang@uniontech.com>
Date: Fri, 7 Mar 2025 17:22:37 +0800
Subject: [PATCH] add sw_64 support
---
include/cln/object.h | 2 +-
include/cln/types.h | 8 ++++----
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/include/cln/object.h b/include/cln/object.h
index 87ce1e3..8bd859b 100644
--- a/include/cln/object.h
+++ b/include/cln/object.h
@@ -25,7 +25,7 @@ namespace cln {
#if defined(__i386__) || (defined(__mips__) && !defined(__LP64__)) || (defined(__sparc__) && !defined(__arch64__)) || defined(__hppa__) || defined(__arm__) || defined(__rs6000__) || defined(__m88k__) || defined(__convex__) || (defined(__s390__) && !defined(__s390x__)) || defined(__sh__) || (defined(__x86_64__) && defined(__ILP32__))
#define cl_word_alignment 4
#endif
-#if defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || (defined(__x86_64__) && !defined(__ILP32__)) || defined(__s390x__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64)
+#if defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || (defined(__x86_64__) && !defined(__ILP32__)) || defined(__s390x__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64) || defined(__sw_64__)
#define cl_word_alignment 8
#endif
#if !defined(cl_word_alignment)
diff --git a/include/cln/types.h b/include/cln/types.h
index 519954a..b73ae7f 100644
--- a/include/cln/types.h
+++ b/include/cln/types.h
@@ -51,7 +51,7 @@
#undef HAVE_LONGLONG
#endif
#endif
- #if defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || (defined(__x86_64__) || defined(_M_AMD64)) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64)) || defined(__e2k__) || defined(__loongarch_lp64)
+ #if defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || (defined(__x86_64__) || defined(_M_AMD64)) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64)) || defined(__e2k__) || defined(__loongarch_lp64) || defined(__sw_64__)
// 64 bit registers in hardware
#define HAVE_FAST_LONGLONG
#endif
@@ -79,7 +79,7 @@
// Integer type used for counters.
// Constraint: sizeof(uintC) >= sizeof(uintL)
- #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64)))
+ #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64) || defined(__sw_64__)))
#define intCsize long_bitsize
typedef long sintC;
typedef unsigned long uintC;
@@ -91,7 +91,7 @@
// Integer type used for lfloat exponents.
// Constraint: sizeof(uintE) >= sizeof(uintC)
- #if (defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__i386__) || defined(__mips__) || defined(__rs6000__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64)))
+ #if (defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__i386__) || defined(__mips__) || defined(__rs6000__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64) || defined(__sw_64__)))
#define intEsize 64
typedef sint64 sintE;
typedef uint64 uintE;
@@ -132,7 +132,7 @@
typedef int sintD;
typedef unsigned int uintD;
#else // we are not using GMP, so just guess something reasonable
- #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || defined(__s390x__) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64)))
+ #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || defined(__s390x__) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64) || defined(_sw_64__)))
#define intDsize 64
typedef sint64 sintD;
typedef uint64 uintD;
--
2.20.1

36
README.en.md
View File

@ -1,36 +0,0 @@
# cln
#### Description
CLN - Class Library for Numbers
#### Software Architecture
Software architecture description
#### Installation
1. xxxx
2. xxxx
3. xxxx
#### Instructions
1. xxxx
2. xxxx
3. xxxx
#### Contribution
1. Fork the repository
2. Create Feat_xxx branch
3. Commit your code
4. Create Pull Request
#### Gitee Feature
1. You can use Readme\_XXX.md to support different languages, such as Readme\_en.md, Readme\_zh.md
2. Gitee blog [blog.gitee.com](https://blog.gitee.com)
3. Explore open source project [https://gitee.com/explore](https://gitee.com/explore)
4. The most valuable open source project [GVP](https://gitee.com/gvp)
5. The manual of Gitee [https://gitee.com/help](https://gitee.com/help)
6. The most popular members [https://gitee.com/gitee-stars/](https://gitee.com/gitee-stars/)

37
README.md
View File

@ -1,37 +0,0 @@
# cln
#### 介绍
CLN - Class Library for Numbers
#### 软件架构
软件架构说明
#### 安装教程
1. xxxx
2. xxxx
3. xxxx
#### 使用说明
1. xxxx
2. xxxx
3. xxxx
#### 参与贡献
1. Fork 本仓库
2. 新建 Feat_xxx 分支
3. 提交代码
4. 新建 Pull Request
#### 特技
1. 使用 Readme\_XXX.md 来支持不同的语言，例如 Readme\_en.md, Readme\_zh.md
2. Gitee 官方博客 [blog.gitee.com](https://blog.gitee.com)
3. 你可以 [https://gitee.com/explore](https://gitee.com/explore) 这个地址来了解 Gitee 上的优秀开源项目
4. [GVP](https://gitee.com/gvp) 全称是 Gitee 最有价值开源项目，是综合评定出的优秀开源项目
5. Gitee 官方提供的使用手册 [https://gitee.com/help](https://gitee.com/help)
6. Gitee 封面人物是一档用来展示 Gitee 会员风采的栏目 [https://gitee.com/gitee-stars/](https://gitee.com/gitee-stars/)

26
cln.spec
View File

@ -1,17 +1,18 @@
Name: cln
Version: 1.3.6
Release: 1
Release: 5
Summary: Class Library for Numbers
License: GPL-2.0-or-later
URL: https://www.ginac.de/CLN/
Source0: https://www.ginac.de/CLN/%{name}-%{version}.tar.bz2
Patch01: add-riscv-support.patch
Patch001: 0001-add-support-for-loongarch.patch
Patch002: 0002-add-sw_64-support.patch
BuildRequires: gcc-c++
BuildRequires: gmp-devel
BuildRequires: texi2html
BuildRequires: texinfo-tex
BuildRequires: make
BuildRequires: make
%description
A collection of C++ math classes and functions, which are designed for
@ -39,9 +40,8 @@ the CLN library.
%prep
%setup -q
%ifarch riscv64
%patch1 -p1
%endif
%patch001 -p1
%patch002 -p1
%build
%configure --disable-static CXXFLAGS="%{XFLAGS}" CFLAGS="%{XFLAGS}"
@ -73,8 +73,20 @@ make %{_smp_mflags} check
%doc doc/cln.pdf doc/cln.html
%changelog
* Thu Mar 06 2025 mahailiang <mahailiang@uniontech.com> - 1.3.6-5
- add support for sw_64
* Wed Jun 19 2024 Wenlong Zhang <zhangwenlong@loongson.cn> - 1.3.6-4
- add support for loongarch
* Wed Oct 11 2023 misaka00251 <liuxin@iscas.ac.cn> - 1.3.6-3
- Fix build on riscv64
* Mon May 08 2023 misaka00251 <liuxin@iscas.ac.cn> - 1.3.6-2
- Remove patch, it's merged upstream
* Tue Nov 15 2022 hkgy <kaguyahatu@outlook.com> - 1.3.6-1
- Upgrade to v1.3.6
* Fri Jul 15 2022 misaka00251 <misaka00251@misakanet.cn> - 1.3.4-1
* Fri Jul 15 2022 misaka00251 <liuxin@iscas.ac.cn> - 1.3.4-1
- Init package

2
cln.yaml
View File

@ -1,4 +1,4 @@
version_control: git
src_repo: https://www.ginac.de/CLN/cln.git
src_repo: git://www.ginac.de/cln.gi
tag_prefix: "^cln_"
separator: "-"