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add support for sw_64

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(cherry picked from commit 66a1af5d1b951a5c2c538e273683771ec461eb09)
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Hailiang 2025-03-07 17:25:24 +08:00 committed by openeuler-sync-bot
parent d235b1c450
commit 622abf9df4
3 changed files with 81 additions and 13 deletions
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24
0001-add-support-for-loongarch-sw_64.patch → 0001-add-support-for-loongarch.patch
View File

@ -1,7 +1,7 @@
From 5f615f67202f46a3ee6a234bc094c5a1cbebb615 Mon Sep 17 00:00:00 2001
From: Hailiang <mahailiang@uniontech.com>
Date: Thu, 6 Mar 2025 17:47:05 +0800
Subject: [PATCH] add support for loongarch sw_64
From 538c493d480cf09f5d764553f065581ff1e066b1 Mon Sep 17 00:00:00 2001
From: Wenlong Zhang <zhangwenlong@loongson.cn>
Date: Wed, 19 Jun 2024 14:57:24 +0800
Subject: [PATCH] add support for loongarch
---
include/cln/object.h | 2 +-
@ -9,7 +9,7 @@ Subject: [PATCH] add support for loongarch sw_64
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/include/cln/object.h b/include/cln/object.h
index f6da29f..bf7a2b9 100644
index f6da29f..87ce1e3 100644
--- a/include/cln/object.h
+++ b/include/cln/object.h
@@ -25,7 +25,7 @@ namespace cln {
@ -17,12 +17,12 @@ index f6da29f..bf7a2b9 100644
#define cl_word_alignment 4
#endif
-#if defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || (defined(__x86_64__) && !defined(__ILP32__)) || defined(__s390x__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__)
+#if defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || (defined(__x86_64__) && !defined(__ILP32__)) || defined(__s390x__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64) || defined(__sw_64__)
+#if defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || (defined(__x86_64__) && !defined(__ILP32__)) || defined(__s390x__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64)
#define cl_word_alignment 8
#endif
#if !defined(cl_word_alignment)
diff --git a/include/cln/types.h b/include/cln/types.h
index 7ec3770..881e93b 100644
index 7ec3770..519954a 100644
--- a/include/cln/types.h
+++ b/include/cln/types.h
@@ -51,7 +51,7 @@
@ -30,7 +30,7 @@ index 7ec3770..881e93b 100644
#endif
#endif
- #if defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || (defined(__x86_64__) || defined(_M_AMD64)) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64)) || defined(__e2k__)
+ #if defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || (defined(__x86_64__) || defined(_M_AMD64)) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64)) || defined(__e2k__) || defined(__loongarch_lp64) || defined(__sw_64__)
+ #if defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || (defined(__x86_64__) || defined(_M_AMD64)) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64)) || defined(__e2k__) || defined(__loongarch_lp64)
// 64 bit registers in hardware
#define HAVE_FAST_LONGLONG
#endif
@ -39,7 +39,7 @@ index 7ec3770..881e93b 100644
// Integer type used for counters.
// Constraint: sizeof(uintC) >= sizeof(uintL)
- #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__)))
+ #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64) || defined(__sw_64__)))
+ #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64)))
#define intCsize long_bitsize
typedef long sintC;
typedef unsigned long uintC;
@ -48,7 +48,7 @@ index 7ec3770..881e93b 100644
// Integer type used for lfloat exponents.
// Constraint: sizeof(uintE) >= sizeof(uintC)
- #if (defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__i386__) || defined(__mips__) || defined(__rs6000__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__)))
+ #if (defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__i386__) || defined(__mips__) || defined(__rs6000__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64) || defined(__sw_64__)))
+ #if (defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__i386__) || defined(__mips__) || defined(__rs6000__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64)))
#define intEsize 64
typedef sint64 sintE;
typedef uint64 uintE;
@ -57,10 +57,10 @@ index 7ec3770..881e93b 100644
typedef unsigned int uintD;
#else // we are not using GMP, so just guess something reasonable
- #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || defined(__s390x__) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__)))
+ #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || defined(__s390x__) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64) || defined(__sw_64__)))
+ #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || defined(__s390x__) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64)))
#define intDsize 64
typedef sint64 sintD;
typedef uint64 uintD;
--
2.20.1
2.43.0

66
0002-add-sw_64-support.patch Normal file
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@ -0,0 +1,66 @@
From e5a9d472804fe141f5796b9bde5a7b85dca6d1de Mon Sep 17 00:00:00 2001
From: Hailiang <mahailiang@uniontech.com>
Date: Fri, 7 Mar 2025 17:22:37 +0800
Subject: [PATCH] add sw_64 support
---
include/cln/object.h | 2 +-
include/cln/types.h | 8 ++++----
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/include/cln/object.h b/include/cln/object.h
index 87ce1e3..8bd859b 100644
--- a/include/cln/object.h
+++ b/include/cln/object.h
@@ -25,7 +25,7 @@ namespace cln {
#if defined(__i386__) || (defined(__mips__) && !defined(__LP64__)) || (defined(__sparc__) && !defined(__arch64__)) || defined(__hppa__) || defined(__arm__) || defined(__rs6000__) || defined(__m88k__) || defined(__convex__) || (defined(__s390__) && !defined(__s390x__)) || defined(__sh__) || (defined(__x86_64__) && defined(__ILP32__))
#define cl_word_alignment 4
#endif
-#if defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || (defined(__x86_64__) && !defined(__ILP32__)) || defined(__s390x__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64)
+#if defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || (defined(__x86_64__) && !defined(__ILP32__)) || defined(__s390x__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64) || defined(__sw_64__)
#define cl_word_alignment 8
#endif
#if !defined(cl_word_alignment)
diff --git a/include/cln/types.h b/include/cln/types.h
index 519954a..b73ae7f 100644
--- a/include/cln/types.h
+++ b/include/cln/types.h
@@ -51,7 +51,7 @@
#undef HAVE_LONGLONG
#endif
#endif
- #if defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || (defined(__x86_64__) || defined(_M_AMD64)) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64)) || defined(__e2k__) || defined(__loongarch_lp64)
+ #if defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || (defined(__x86_64__) || defined(_M_AMD64)) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64)) || defined(__e2k__) || defined(__loongarch_lp64) || defined(__sw_64__)
// 64 bit registers in hardware
#define HAVE_FAST_LONGLONG
#endif
@@ -79,7 +79,7 @@
// Integer type used for counters.
// Constraint: sizeof(uintC) >= sizeof(uintL)
- #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64)))
+ #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64) || defined(__sw_64__)))
#define intCsize long_bitsize
typedef long sintC;
typedef unsigned long uintC;
@@ -91,7 +91,7 @@
// Integer type used for lfloat exponents.
// Constraint: sizeof(uintE) >= sizeof(uintC)
- #if (defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__i386__) || defined(__mips__) || defined(__rs6000__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64)))
+ #if (defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__i386__) || defined(__mips__) || defined(__rs6000__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64) || defined(__sw_64__)))
#define intEsize 64
typedef sint64 sintE;
typedef uint64 uintE;
@@ -132,7 +132,7 @@
typedef int sintD;
typedef unsigned int uintD;
#else // we are not using GMP, so just guess something reasonable
- #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || defined(__s390x__) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64)))
+ #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || defined(__s390x__) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64) || defined(_sw_64__)))
#define intDsize 64
typedef sint64 sintD;
typedef uint64 uintD;
--
2.20.1

4
cln.spec
View File

@ -5,7 +5,8 @@ Summary: Class Library for Numbers
License: GPL-2.0-or-later
URL: https://www.ginac.de/CLN/
Source0: https://www.ginac.de/CLN/%{name}-%{version}.tar.bz2
Patch001: 0001-add-support-for-loongarch-sw_64.patch
Patch001: 0001-add-support-for-loongarch.patch
Patch002: 0002-add-sw_64-support.patch
BuildRequires: gcc-c++
BuildRequires: gmp-devel
@ -40,6 +41,7 @@ the CLN library.
%prep
%setup -q
%patch001 -p1
%patch002 -p1
%build
%configure --disable-static CXXFLAGS="%{XFLAGS}" CFLAGS="%{XFLAGS}"