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add support for sw_64

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(cherry picked from commit b3aa1827d1d3a861dc6ddbc188e2818ce977b04f)
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Hailiang 2025-03-06 17:50:10 +08:00 committed by openeuler-sync-bot
parent abb27bf93c
commit d235b1c450
2 changed files with 17 additions and 14 deletions
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24
0001-add-support-for-loongarch.patch → 0001-add-support-for-loongarch-sw_64.patch
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@ -1,7 +1,7 @@
From 538c493d480cf09f5d764553f065581ff1e066b1 Mon Sep 17 00:00:00 2001 From 5f615f67202f46a3ee6a234bc094c5a1cbebb615 Mon Sep 17 00:00:00 2001
From: Wenlong Zhang <zhangwenlong@loongson.cn> From: Hailiang <mahailiang@uniontech.com>
Date: Wed, 19 Jun 2024 14:57:24 +0800 Date: Thu, 6 Mar 2025 17:47:05 +0800
Subject: [PATCH] add support for loongarch Subject: [PATCH] add support for loongarch sw_64
--- ---
include/cln/object.h | 2 +- include/cln/object.h | 2 +-
@ -9,7 +9,7 @@ Subject: [PATCH] add support for loongarch
2 files changed, 5 insertions(+), 5 deletions(-) 2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/include/cln/object.h b/include/cln/object.h diff --git a/include/cln/object.h b/include/cln/object.h
index f6da29f..87ce1e3 100644 index f6da29f..bf7a2b9 100644
--- a/include/cln/object.h --- a/include/cln/object.h
+++ b/include/cln/object.h +++ b/include/cln/object.h
@@ -25,7 +25,7 @@ namespace cln { @@ -25,7 +25,7 @@ namespace cln {
@ -17,12 +17,12 @@ index f6da29f..87ce1e3 100644
#define cl_word_alignment 4 #define cl_word_alignment 4
#endif #endif
-#if defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || (defined(__x86_64__) && !defined(__ILP32__)) || defined(__s390x__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) -#if defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || (defined(__x86_64__) && !defined(__ILP32__)) || defined(__s390x__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__)
+#if defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || (defined(__x86_64__) && !defined(__ILP32__)) || defined(__s390x__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64) +#if defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || (defined(__x86_64__) && !defined(__ILP32__)) || defined(__s390x__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64) || defined(__sw_64__)
#define cl_word_alignment 8 #define cl_word_alignment 8
#endif #endif
#if !defined(cl_word_alignment) #if !defined(cl_word_alignment)
diff --git a/include/cln/types.h b/include/cln/types.h diff --git a/include/cln/types.h b/include/cln/types.h
index 7ec3770..519954a 100644 index 7ec3770..881e93b 100644
--- a/include/cln/types.h --- a/include/cln/types.h
+++ b/include/cln/types.h +++ b/include/cln/types.h
@@ -51,7 +51,7 @@ @@ -51,7 +51,7 @@
@ -30,7 +30,7 @@ index 7ec3770..519954a 100644
#endif #endif
#endif #endif
- #if defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || (defined(__x86_64__) || defined(_M_AMD64)) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64)) || defined(__e2k__) - #if defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || (defined(__x86_64__) || defined(_M_AMD64)) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64)) || defined(__e2k__)
+ #if defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || (defined(__x86_64__) || defined(_M_AMD64)) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64)) || defined(__e2k__) || defined(__loongarch_lp64) + #if defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || (defined(__x86_64__) || defined(_M_AMD64)) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64)) || defined(__e2k__) || defined(__loongarch_lp64) || defined(__sw_64__)
// 64 bit registers in hardware // 64 bit registers in hardware
#define HAVE_FAST_LONGLONG #define HAVE_FAST_LONGLONG
#endif #endif
@ -39,7 +39,7 @@ index 7ec3770..519954a 100644
// Integer type used for counters. // Integer type used for counters.
// Constraint: sizeof(uintC) >= sizeof(uintL) // Constraint: sizeof(uintC) >= sizeof(uintL)
- #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__))) - #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__)))
+ #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64))) + #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64) || defined(__sw_64__)))
#define intCsize long_bitsize #define intCsize long_bitsize
typedef long sintC; typedef long sintC;
typedef unsigned long uintC; typedef unsigned long uintC;
@ -48,7 +48,7 @@ index 7ec3770..519954a 100644
// Integer type used for lfloat exponents. // Integer type used for lfloat exponents.
// Constraint: sizeof(uintE) >= sizeof(uintC) // Constraint: sizeof(uintE) >= sizeof(uintC)
- #if (defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__i386__) || defined(__mips__) || defined(__rs6000__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__))) - #if (defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__i386__) || defined(__mips__) || defined(__rs6000__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__)))
+ #if (defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__i386__) || defined(__mips__) || defined(__rs6000__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64))) + #if (defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__i386__) || defined(__mips__) || defined(__rs6000__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64) || defined(__sw_64__)))
#define intEsize 64 #define intEsize 64
typedef sint64 sintE; typedef sint64 sintE;
typedef uint64 uintE; typedef uint64 uintE;
@ -57,10 +57,10 @@ index 7ec3770..519954a 100644
typedef unsigned int uintD; typedef unsigned int uintD;
#else // we are not using GMP, so just guess something reasonable #else // we are not using GMP, so just guess something reasonable
- #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || defined(__s390x__) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__))) - #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || defined(__s390x__) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__)))
+ #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || defined(__s390x__) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64))) + #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || defined(__s390x__) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64) || defined(__sw_64__)))
#define intDsize 64 #define intDsize 64
typedef sint64 sintD; typedef sint64 sintD;
typedef uint64 uintD; typedef uint64 uintD;
-- --
2.43.0 2.20.1

7
cln.spec
View File

@ -1,11 +1,11 @@
Name: cln Name: cln
Version: 1.3.6 Version: 1.3.6
Release: 4 Release: 5
Summary: Class Library for Numbers Summary: Class Library for Numbers
License: GPL-2.0-or-later License: GPL-2.0-or-later
URL: https://www.ginac.de/CLN/ URL: https://www.ginac.de/CLN/
Source0: https://www.ginac.de/CLN/%{name}-%{version}.tar.bz2 Source0: https://www.ginac.de/CLN/%{name}-%{version}.tar.bz2
Patch001: 0001-add-support-for-loongarch.patch Patch001: 0001-add-support-for-loongarch-sw_64.patch
BuildRequires: gcc-c++ BuildRequires: gcc-c++
BuildRequires: gmp-devel BuildRequires: gmp-devel
@ -71,6 +71,9 @@ make %{_smp_mflags} check
%doc doc/cln.pdf doc/cln.html %doc doc/cln.pdf doc/cln.html
%changelog %changelog
* Thu Mar 06 2025 mahailiang <mahailiang@uniontech.com> - 1.3.6-5
- add support for sw_64
* Wed Jun 19 2024 Wenlong Zhang <zhangwenlong@loongson.cn> - 1.3.6-4 * Wed Jun 19 2024 Wenlong Zhang <zhangwenlong@loongson.cn> - 1.3.6-4
- add support for loongarch - add support for loongarch