cln/0001-add-support-for-loongarch-sw_64.patch
Hailiang d235b1c450 add support for sw_64
(cherry picked from commit b3aa1827d1d3a861dc6ddbc188e2818ce977b04f)
2025-03-08 19:34:26 +08:00

67 lines
5.2 KiB
Diff

From 5f615f67202f46a3ee6a234bc094c5a1cbebb615 Mon Sep 17 00:00:00 2001
From: Hailiang <mahailiang@uniontech.com>
Date: Thu, 6 Mar 2025 17:47:05 +0800
Subject: [PATCH] add support for loongarch sw_64
---
include/cln/object.h | 2 +-
include/cln/types.h | 8 ++++----
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/include/cln/object.h b/include/cln/object.h
index f6da29f..bf7a2b9 100644
--- a/include/cln/object.h
+++ b/include/cln/object.h
@@ -25,7 +25,7 @@ namespace cln {
#if defined(__i386__) || (defined(__mips__) && !defined(__LP64__)) || (defined(__sparc__) && !defined(__arch64__)) || defined(__hppa__) || defined(__arm__) || defined(__rs6000__) || defined(__m88k__) || defined(__convex__) || (defined(__s390__) && !defined(__s390x__)) || defined(__sh__) || (defined(__x86_64__) && defined(__ILP32__))
#define cl_word_alignment 4
#endif
-#if defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || (defined(__x86_64__) && !defined(__ILP32__)) || defined(__s390x__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__)
+#if defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || (defined(__x86_64__) && !defined(__ILP32__)) || defined(__s390x__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64) || defined(__sw_64__)
#define cl_word_alignment 8
#endif
#if !defined(cl_word_alignment)
diff --git a/include/cln/types.h b/include/cln/types.h
index 7ec3770..881e93b 100644
--- a/include/cln/types.h
+++ b/include/cln/types.h
@@ -51,7 +51,7 @@
#undef HAVE_LONGLONG
#endif
#endif
- #if defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || (defined(__x86_64__) || defined(_M_AMD64)) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64)) || defined(__e2k__)
+ #if defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || (defined(__x86_64__) || defined(_M_AMD64)) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64)) || defined(__e2k__) || defined(__loongarch_lp64) || defined(__sw_64__)
// 64 bit registers in hardware
#define HAVE_FAST_LONGLONG
#endif
@@ -79,7 +79,7 @@
// Integer type used for counters.
// Constraint: sizeof(uintC) >= sizeof(uintL)
- #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__)))
+ #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64) || defined(__sw_64__)))
#define intCsize long_bitsize
typedef long sintC;
typedef unsigned long uintC;
@@ -91,7 +91,7 @@
// Integer type used for lfloat exponents.
// Constraint: sizeof(uintE) >= sizeof(uintC)
- #if (defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__i386__) || defined(__mips__) || defined(__rs6000__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__)))
+ #if (defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__i386__) || defined(__mips__) || defined(__rs6000__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64) || defined(__sw_64__)))
#define intEsize 64
typedef sint64 sintE;
typedef uint64 uintE;
@@ -132,7 +132,7 @@
typedef int sintD;
typedef unsigned int uintD;
#else // we are not using GMP, so just guess something reasonable
- #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || defined(__s390x__) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__)))
+ #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || defined(__s390x__) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64) || defined(__sw_64__)))
#define intDsize 64
typedef sint64 sintD;
typedef uint64 uintD;
--
2.20.1