packages/binutils
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

[Update] Init Binutils 2.40 repo

Browse Source
This commit is contained in:
eastb233 2023-08-02 14:39:30 +08:00
parent dd059ae0b5
commit 254b28051a
60 changed files with 1703 additions and 135067 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

155
0001-x86-Add-int1-as-one-byte-opcode-0xf1.patch
View File

@ -1,155 +0,0 @@
From 154b353f689cad41ed9455088b3dede30d9f2e00 Mon Sep 17 00:00:00 2001
From: "H.J. Lu" <hjl.tools@gmail.com>
Date: Wed, 14 Jul 2021 14:17:48 -0700
Subject: [PATCH] x86: Add int1 as one byte opcode 0xf1
Also change the x86 disassembler to disassemble 0xf1 as int1, instead of
icebp.
gas/
PR gas/28088
* testsuite/gas/i386/opcode.s: Add int1.
* testsuite/gas/i386/x86-64-opcode.s: Add int1, int3 and int.
* testsuite/gas/i386/opcode-intel.d: Updated.
* testsuite/gas/i386/opcode-suffix.d: Likewise.
* testsuite/gas/i386/opcode.d: Likewise.
* testsuite/gas/i386/x86-64-opcode.d: Likewise.
opcodes/
PR gas/28088
* i386-dis.c (dis386): Replace icebp with int1.
* i386-opc.tbl: Add int1.
* i386-tbl.h: Regenerate.
diff --git a/gas/testsuite/gas/i386/opcode-intel.d b/gas/testsuite/gas/i386/opcode-intel.d
index 68e1e8810e6..732b033c916 100644
--- a/gas/testsuite/gas/i386/opcode-intel.d
+++ b/gas/testsuite/gas/i386/opcode-intel.d
@@ -588,6 +588,7 @@ Disassembly of section .text:
*[0-9a-f]+: 85 c3 [ ]*test[ ]+ebx,eax
*[0-9a-f]+: 85 d8 [ ]*test[ ]+eax,ebx
*[0-9a-f]+: 85 18 [ ]*test[ ]+(DWORD PTR )?\[eax\],ebx
+ *[0-9a-f]+: f1[ ]+int1[ ]+
[ ]*[a-f0-9]+: 0f 4a 90 90 90 90 90 cmovp edx,DWORD PTR \[eax-0x6f6f6f70\]
[ ]*[a-f0-9]+: 0f 4b 90 90 90 90 90 cmovnp edx,DWORD PTR \[eax-0x6f6f6f70\]
[ ]*[a-f0-9]+: 66 0f 4a 90 90 90 90 90 cmovp dx,WORD PTR \[eax-0x6f6f6f70\]
diff --git a/gas/testsuite/gas/i386/opcode-suffix.d b/gas/testsuite/gas/i386/opcode-suffix.d
index 8d7716b6fa8..6a9c4cd8717 100644
--- a/gas/testsuite/gas/i386/opcode-suffix.d
+++ b/gas/testsuite/gas/i386/opcode-suffix.d
@@ -588,6 +588,7 @@ Disassembly of section .text:
*[0-9a-f]+: 85 c3 [ ]*testl[ ]+%eax,%ebx
*[0-9a-f]+: 85 d8 [ ]*testl[ ]+%ebx,%eax
*[0-9a-f]+: 85 18 [ ]*testl[ ]+%ebx,\(%eax\)
+ *[0-9a-f]+: f1[ ]+int1[ ]+
[ ]*[a-f0-9]+: 0f 4a 90 90 90 90 90 cmovpl -0x6f6f6f70\(%eax\),%edx
[ ]*[a-f0-9]+: 0f 4b 90 90 90 90 90 cmovnpl -0x6f6f6f70\(%eax\),%edx
[ ]*[a-f0-9]+: 66 0f 4a 90 90 90 90 90 cmovpw -0x6f6f6f70\(%eax\),%dx
diff --git a/gas/testsuite/gas/i386/opcode.d b/gas/testsuite/gas/i386/opcode.d
index cc57b9edb80..9c1f67f5fd1 100644
--- a/gas/testsuite/gas/i386/opcode.d
+++ b/gas/testsuite/gas/i386/opcode.d
@@ -587,6 +587,7 @@ Disassembly of section .text:
9f5: 85 c3 [ ]*test %eax,%ebx
9f7: 85 d8 [ ]*test %ebx,%eax
9f9: 85 18 [ ]*test %ebx,\(%eax\)
+ 9fb: f1 [ ]*int1
[ ]*[a-f0-9]+: 0f 4a 90 90 90 90 90 cmovp -0x6f6f6f70\(%eax\),%edx
[ ]*[a-f0-9]+: 0f 4b 90 90 90 90 90 cmovnp -0x6f6f6f70\(%eax\),%edx
[ ]*[a-f0-9]+: 66 0f 4a 90 90 90 90 90 cmovp -0x6f6f6f70\(%eax\),%dx
diff --git a/gas/testsuite/gas/i386/opcode.s b/gas/testsuite/gas/i386/opcode.s
index 1f803c38e5d..d3255f2b80c 100644
--- a/gas/testsuite/gas/i386/opcode.s
+++ b/gas/testsuite/gas/i386/opcode.s
@@ -585,6 +585,8 @@ foo:
test %ebx,%eax
test (%eax),%ebx
+ int1
+
cmovpe 0x90909090(%eax),%edx
cmovpo 0x90909090(%eax),%edx
cmovpe 0x90909090(%eax),%dx
diff --git a/gas/testsuite/gas/i386/x86-64-opcode.d b/gas/testsuite/gas/i386/x86-64-opcode.d
index ab55d2ca350..c925938fdc4 100644
--- a/gas/testsuite/gas/i386/x86-64-opcode.d
+++ b/gas/testsuite/gas/i386/x86-64-opcode.d
@@ -325,6 +325,9 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 48 0f 07 sysretq *
[ ]*[a-f0-9]+: 0f 01 f8 swapgs
[ ]*[a-f0-9]+: 66 68 22 22 pushw \$0x2222
+[ ]*[a-f0-9]+: f1 int1 +
+[ ]*[a-f0-9]+: cc int3 +
+[ ]*[a-f0-9]+: cd 90 int \$0x90
[ ]*[a-f0-9]+: f6 c9 01 test \$(0x)?0*1,%cl
[ ]*[a-f0-9]+: 66 f7 c9 02 00 test \$(0x)?0*2,%cx
[ ]*[a-f0-9]+: f7 c9 04 00 00 00 test \$(0x)?0*4,%ecx
diff --git a/gas/testsuite/gas/i386/x86-64-opcode.s b/gas/testsuite/gas/i386/x86-64-opcode.s
index 28c100f812e..6575cc33438 100644
--- a/gas/testsuite/gas/i386/x86-64-opcode.s
+++ b/gas/testsuite/gas/i386/x86-64-opcode.s
@@ -454,6 +454,10 @@
pushw $0x2222
+ int1
+ int3
+ int $0x90
+
.byte 0xf6, 0xc9, 0x01
.byte 0x66, 0xf7, 0xc9, 0x02, 0x00
.byte 0xf7, 0xc9, 0x04, 0x00, 0x00, 0x00
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 21e40850544..122f4af0b46 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -1965,7 +1965,7 @@ static const struct dis386 dis386[] = {
{ "outG", { indirDX, zAX }, 0 },
/* f0 */
{ Bad_Opcode }, /* lock prefix */
- { "icebp", { XX }, 0 },
+ { "int1", { XX }, 0 },
{ Bad_Opcode }, /* repne */
{ Bad_Opcode }, /* repz */
{ "hlt", { XX }, 0 },
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
index b0530e5fb82..49e72d28b56 100644
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -537,6 +537,7 @@ bts, 0xfba, 5, Cpu386, Modrm|No_bSuf|No_sSuf|No_ldSuf|HLEPrefixLock, { Imm8, Reg
// See gas/config/tc-i386.c for conversion of 'int $3' into the special
// int 3 insn.
int, 0xcd, None, 0, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8 }
+int1, 0xf1, None, 0, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, {}
int3, 0xcc, None, 0, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, {}
into, 0xce, None, CpuNo64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, {}
iret, 0xcf, None, 0, DefaultSize|No_bSuf|No_sSuf|No_ldSuf, {}
diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h
index df139ba6121..15c0b47a915 100644
--- a/opcodes/i386-tbl.h
+++ b/opcodes/i386-tbl.h
@@ -5229,6 +5229,19 @@ const insn_template i386_optab[] =
0, 0, 0, 0, 0, 0 } },
{ { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0 } } } },
+ { "int1", 0xf1, None, 0,
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0 } },
+ { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0 } } } },
{ "int3", 0xcc, None, 0,
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
--
2.33.0

255
0002-x86-drop-OP_Mask.patch
View File

@ -1,255 +0,0 @@
From d0579d4d1c724b524da43ad164ce140218497ead Mon Sep 17 00:00:00 2001
From: Jan Beulich <jbeulich@suse.com>
Date: Thu, 22 Jul 2021 13:01:09 +0200
Subject: [PATCH] x86: drop OP_Mask()
By moving its vex.r check there it becomes fully redundant with OP_G().
diff --git a/opcodes/i386-dis-evex-prefix.h b/opcodes/i386-dis-evex-prefix.h
index 50a11f417ad..2ed8f6730c5 100644
--- a/opcodes/i386-dis-evex-prefix.h
+++ b/opcodes/i386-dis-evex-prefix.h
@@ -151,9 +151,9 @@
},
/* PREFIX_EVEX_0FC2 */
{
- { "vcmppX", { XMask, Vex, EXx, EXxEVexS, CMP }, PREFIX_OPCODE },
+ { "vcmppX", { MaskG, Vex, EXx, EXxEVexS, CMP }, PREFIX_OPCODE },
{ VEX_W_TABLE (EVEX_W_0FC2_P_1) },
- { "vcmppX", { XMask, Vex, EXx, EXxEVexS, CMP }, PREFIX_OPCODE },
+ { "vcmppX", { MaskG, Vex, EXx, EXxEVexS, CMP }, PREFIX_OPCODE },
{ VEX_W_TABLE (EVEX_W_0FC2_P_3) },
},
/* PREFIX_EVEX_0FE6 */
@@ -238,14 +238,14 @@
/* PREFIX_EVEX_0F3826 */
{
{ Bad_Opcode },
- { "vptestnm%BW", { XMask, Vex, EXx }, 0 },
- { "vptestm%BW", { XMask, Vex, EXx }, 0 },
+ { "vptestnm%BW", { MaskG, Vex, EXx }, 0 },
+ { "vptestm%BW", { MaskG, Vex, EXx }, 0 },
},
/* PREFIX_EVEX_0F3827 */
{
{ Bad_Opcode },
- { "vptestnm%DQ", { XMask, Vex, EXx }, 0 },
- { "vptestm%DQ", { XMask, Vex, EXx }, 0 },
+ { "vptestnm%DQ", { MaskG, Vex, EXx }, 0 },
+ { "vptestm%DQ", { MaskG, Vex, EXx }, 0 },
},
/* PREFIX_EVEX_0F3828 */
{
@@ -256,7 +256,7 @@
/* PREFIX_EVEX_0F3829 */
{
{ Bad_Opcode },
- { "vpmov%BW2m", { XMask, EXx }, 0 },
+ { "vpmov%BW2m", { MaskG, EXx }, 0 },
{ VEX_W_TABLE (EVEX_W_0F3829_P_2) },
},
/* PREFIX_EVEX_0F382A */
@@ -310,7 +310,7 @@
/* PREFIX_EVEX_0F3839 */
{
{ Bad_Opcode },
- { "vpmov%DQ2m", { XMask, EXx }, 0 },
+ { "vpmov%DQ2m", { MaskG, EXx }, 0 },
{ "vpmins%DQ", { XM, Vex, EXx }, 0 },
},
/* PREFIX_EVEX_0F383A */
@@ -338,7 +338,7 @@
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
- { "vp2intersect%DQ", { XMask, Vex, EXx, EXxEVexS }, 0 },
+ { "vp2intersect%DQ", { MaskG, Vex, EXx, EXxEVexS }, 0 },
},
/* PREFIX_EVEX_0F3872 */
{
diff --git a/opcodes/i386-dis-evex-w.h b/opcodes/i386-dis-evex-w.h
index 637ab846562..2c7d9bc2e34 100644
--- a/opcodes/i386-dis-evex-w.h
+++ b/opcodes/i386-dis-evex-w.h
@@ -142,7 +142,7 @@
},
/* EVEX_W_0F66 */
{
- { "vpcmpgtd", { XMask, Vex, EXx }, PREFIX_DATA },
+ { "vpcmpgtd", { MaskG, Vex, EXx }, PREFIX_DATA },
},
/* EVEX_W_0F6A */
{
@@ -201,7 +201,7 @@
},
/* EVEX_W_0F76 */
{
- { "vpcmpeqd", { XMask, Vex, EXx }, PREFIX_DATA },
+ { "vpcmpeqd", { MaskG, Vex, EXx }, PREFIX_DATA },
},
/* EVEX_W_0F78_P_0 */
{
@@ -270,12 +270,12 @@
},
/* EVEX_W_0FC2_P_1 */
{
- { "vcmpss", { XMask, VexScalar, EXxmm_md, EXxEVexS, CMP }, 0 },
+ { "vcmpss", { MaskG, VexScalar, EXxmm_md, EXxEVexS, CMP }, 0 },
},
/* EVEX_W_0FC2_P_3 */
{
{ Bad_Opcode },
- { "vcmpsd", { XMask, VexScalar, EXxmm_mq, EXxEVexS, CMP }, 0 },
+ { "vcmpsd", { MaskG, VexScalar, EXxmm_mq, EXxEVexS, CMP }, 0 },
},
/* EVEX_W_0FD2 */
{
@@ -450,7 +450,7 @@
/* EVEX_W_0F3829_P_2 */
{
{ Bad_Opcode },
- { "vpcmpeqq", { XMask, Vex, EXx }, 0 },
+ { "vpcmpeqq", { MaskG, Vex, EXx }, 0 },
},
/* EVEX_W_0F382A_P_1 */
{
@@ -496,7 +496,7 @@
/* EVEX_W_0F3837 */
{
{ Bad_Opcode },
- { "vpcmpgtq", { XMask, Vex, EXx }, PREFIX_DATA },
+ { "vpcmpgtq", { MaskG, Vex, EXx }, PREFIX_DATA },
},
/* EVEX_W_0F383A_P_1 */
{
diff --git a/opcodes/i386-dis-evex.h b/opcodes/i386-dis-evex.h
index 151f61d95a4..5f1ebaded85 100644
--- a/opcodes/i386-dis-evex.h
+++ b/opcodes/i386-dis-evex.h
@@ -114,8 +114,8 @@ static const struct dis386 evex_table[][256] = {
{ "vpunpcklwd", { XM, Vex, EXx }, PREFIX_DATA },
{ VEX_W_TABLE (EVEX_W_0F62) },
{ "vpacksswb", { XM, Vex, EXx }, PREFIX_DATA },
- { "vpcmpgtb", { XMask, Vex, EXx }, PREFIX_DATA },
- { "vpcmpgtw", { XMask, Vex, EXx }, PREFIX_DATA },
+ { "vpcmpgtb", { MaskG, Vex, EXx }, PREFIX_DATA },
+ { "vpcmpgtw", { MaskG, Vex, EXx }, PREFIX_DATA },
{ VEX_W_TABLE (EVEX_W_0F66) },
{ "vpackuswb", { XM, Vex, EXx }, PREFIX_DATA },
/* 68 */
@@ -132,8 +132,8 @@ static const struct dis386 evex_table[][256] = {
{ REG_TABLE (REG_EVEX_0F71) },
{ REG_TABLE (REG_EVEX_0F72) },
{ REG_TABLE (REG_EVEX_0F73) },
- { "vpcmpeqb", { XMask, Vex, EXx }, PREFIX_DATA },
- { "vpcmpeqw", { XMask, Vex, EXx }, PREFIX_DATA },
+ { "vpcmpeqb", { MaskG, Vex, EXx }, PREFIX_DATA },
+ { "vpcmpeqw", { MaskG, Vex, EXx }, PREFIX_DATA },
{ VEX_W_TABLE (EVEX_W_0F76) },
{ Bad_Opcode },
/* 78 */
@@ -453,7 +453,7 @@ static const struct dis386 evex_table[][256] = {
{ Bad_Opcode },
{ "vperm%BW", { XM, Vex, EXx }, PREFIX_DATA },
{ Bad_Opcode },
- { "vpshufbitqmb", { XMask, Vex, EXx }, PREFIX_DATA },
+ { "vpshufbitqmb", { MaskG, Vex, EXx }, PREFIX_DATA },
/* 90 */
{ "vpgatherd%DQ", { XMGatherD, MVexVSIBDWpX }, PREFIX_DATA },
{ "vpgatherq%DQ", { XMGatherQ, MVexVSIBQWpX }, PREFIX_DATA },
@@ -617,8 +617,8 @@ static const struct dis386 evex_table[][256] = {
{ EVEX_LEN_TABLE (EVEX_LEN_0F3A1B) },
{ Bad_Opcode },
{ VEX_W_TABLE (VEX_W_0F3A1D) },
- { "vpcmpu%DQ", { XMask, Vex, EXx, VPCMP }, PREFIX_DATA },
- { "vpcmp%DQ", { XMask, Vex, EXx, VPCMP }, PREFIX_DATA },
+ { "vpcmpu%DQ", { MaskG, Vex, EXx, VPCMP }, PREFIX_DATA },
+ { "vpcmp%DQ", { MaskG, Vex, EXx, VPCMP }, PREFIX_DATA },
/* 20 */
{ VEX_LEN_TABLE (VEX_LEN_0F3A20) },
{ VEX_W_TABLE (EVEX_W_0F3A21) },
@@ -653,8 +653,8 @@ static const struct dis386 evex_table[][256] = {
{ EVEX_LEN_TABLE (EVEX_LEN_0F3A3B) },
{ Bad_Opcode },
{ Bad_Opcode },
- { "vpcmpu%BW", { XMask, Vex, EXx, VPCMP }, PREFIX_DATA },
- { "vpcmp%BW", { XMask, Vex, EXx, VPCMP }, PREFIX_DATA },
+ { "vpcmpu%BW", { MaskG, Vex, EXx, VPCMP }, PREFIX_DATA },
+ { "vpcmp%BW", { MaskG, Vex, EXx, VPCMP }, PREFIX_DATA },
/* 40 */
{ Bad_Opcode },
{ Bad_Opcode },
@@ -698,8 +698,8 @@ static const struct dis386 evex_table[][256] = {
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
- { "vfpclassp%XW%XZ", { XMask, EXx, Ib }, PREFIX_DATA },
- { "vfpclasss%XW", { XMask, EXVexWdqScalar, Ib }, PREFIX_DATA },
+ { "vfpclassp%XW%XZ", { MaskG, EXx, Ib }, PREFIX_DATA },
+ { "vfpclasss%XW", { MaskG, EXVexWdqScalar, Ib }, PREFIX_DATA },
/* 68 */
{ Bad_Opcode },
{ Bad_Opcode },
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 122f4af0b46..f88276ced6b 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -116,8 +116,6 @@ static void FXSAVE_Fixup (int, int);
static void MOVSXD_Fixup (int, int);
-static void OP_Mask (int, int);
-
struct dis_private {
/* Points to first byte not fetched. */
bfd_byte *max_fetched;
@@ -406,7 +404,6 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
#define EXxEVexR64 { OP_Rounding, evex_rounding_64_mode }
#define EXxEVexS { OP_Rounding, evex_sae_mode }
-#define XMask { OP_Mask, mask_mode }
#define MaskG { OP_G, mask_mode }
#define MaskE { OP_E, mask_mode }
#define MaskBDE { OP_E, mask_bd_mode }
@@ -12017,12 +12014,12 @@ OP_G (int bytemode, int sizeflag)
break;
case mask_bd_mode:
case mask_mode:
- if ((modrm.reg + add) > 0x7)
+ if (add || (vex.evex && !vex.r))
{
oappend ("(bad)");
return;
}
- oappend (names_mask[modrm.reg + add]);
+ oappend (names_mask[modrm.reg]);
break;
default:
oappend (INTERNAL_DISASSEMBLER_ERROR);
@@ -13720,23 +13717,6 @@ MOVSXD_Fixup (int bytemode, int sizeflag)
OP_E (bytemode, sizeflag);
}
-static void
-OP_Mask (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
-{
- if (!vex.evex
- || (bytemode != mask_mode && bytemode != mask_bd_mode))
- abort ();
-
- USED_REX (REX_R);
- if ((rex & REX_R) != 0 || !vex.r)
- {
- BadOp ();
- return;
- }
-
- oappend (names_mask [modrm.reg]);
-}
-
static void
OP_Rounding (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
{
--
2.33.0

173
0003-x86-correct-VCVT-U-SI2SD-rounding-mode-handling.patch
View File

@ -1,173 +0,0 @@
From be2f8fcd9df7d50fd17125eccecf7fc0bad6b2c8 Mon Sep 17 00:00:00 2001
From: Jan Beulich <jbeulich@suse.com>
Date: Thu, 22 Jul 2021 13:02:08 +0200
Subject: [PATCH] x86: correct VCVT{,U}SI2SD rounding mode handling
With EVEX.W clear the instruction doesn't ignore the rounding mode, but
(like for other insns without rounding semantics) EVEX.b set causes #UD.
Hence the handling of EVEX.W needs to be done when processing
evex_rounding_64_mode, not at the decode stages.
Derive a new 64-bit testcase from the 32-bit one to cover the different
EVEX.W treatment in both cases.
diff --git a/gas/testsuite/gas/i386/evex.d b/gas/testsuite/gas/i386/evex.d
index 2fbe295b86b..b02bca39098 100644
--- a/gas/testsuite/gas/i386/evex.d
+++ b/gas/testsuite/gas/i386/evex.d
@@ -1,5 +1,5 @@
#objdump: -dw -Msuffix
-#name: i386 EVX insns
+#name: i386 EVEX insns
.*: +file format .*
@@ -8,9 +8,12 @@ Disassembly of section .text:
0+ <_start>:
+[a-f0-9]+: 62 f1 d6 38 2a f0 vcvtsi2ssl %eax,\{rd-sae\},%xmm5,%xmm6
+ +[a-f0-9]+: 62 f1 57 38 2a f0 vcvtsi2sdl %eax,\(bad\),%xmm5,%xmm6
+[a-f0-9]+: 62 f1 d7 38 2a f0 vcvtsi2sdl %eax,\(bad\),%xmm5,%xmm6
+[a-f0-9]+: 62 f1 d6 08 7b f0 vcvtusi2ssl %eax,%xmm5,%xmm6
+ +[a-f0-9]+: 62 f1 57 08 7b f0 vcvtusi2sdl %eax,%xmm5,%xmm6
+[a-f0-9]+: 62 f1 d7 08 7b f0 vcvtusi2sdl %eax,%xmm5,%xmm6
+[a-f0-9]+: 62 f1 d6 38 7b f0 vcvtusi2ssl %eax,\{rd-sae\},%xmm5,%xmm6
+ +[a-f0-9]+: 62 f1 57 38 7b f0 vcvtusi2sdl %eax,\(bad\),%xmm5,%xmm6
+[a-f0-9]+: 62 f1 d7 38 7b f0 vcvtusi2sdl %eax,\(bad\),%xmm5,%xmm6
#pass
diff --git a/gas/testsuite/gas/i386/evex.s b/gas/testsuite/gas/i386/evex.s
index a64cc573dcd..90c635a27b6 100644
--- a/gas/testsuite/gas/i386/evex.s
+++ b/gas/testsuite/gas/i386/evex.s
@@ -4,8 +4,11 @@
.text
_start:
.byte 0x62, 0xf1, 0xd6, 0x38, 0x2a, 0xf0
+ .byte 0x62, 0xf1, 0x57, 0x38, 0x2a, 0xf0
.byte 0x62, 0xf1, 0xd7, 0x38, 0x2a, 0xf0
.byte 0x62, 0xf1, 0xd6, 0x08, 0x7b, 0xf0
+ .byte 0x62, 0xf1, 0x57, 0x08, 0x7b, 0xf0
.byte 0x62, 0xf1, 0xd7, 0x08, 0x7b, 0xf0
.byte 0x62, 0xf1, 0xd6, 0x38, 0x7b, 0xf0
+ .byte 0x62, 0xf1, 0x57, 0x38, 0x7b, 0xf0
.byte 0x62, 0xf1, 0xd7, 0x38, 0x7b, 0xf0
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index 1e0a363a803..6f9543eec3a 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -929,6 +929,7 @@ if [gas_64_check] then {
run_dump_test "x86-64-avx512er-intel"
run_dump_test "x86-64-avx512pf"
run_dump_test "x86-64-avx512pf-intel"
+ run_dump_test "x86-64-evex"
run_dump_test "x86-64-evex-lig256"
run_dump_test "x86-64-evex-lig512"
run_dump_test "x86-64-evex-lig256-intel"
diff --git a/gas/testsuite/gas/i386/x86-64-evex.d b/gas/testsuite/gas/i386/x86-64-evex.d
new file mode 100644
index 00000000000..b360aa74a17
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-evex.d
@@ -0,0 +1,20 @@
+#objdump: -dw
+#name: x86-64 EVEX insns
+#source: evex.s
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <_start>:
+ +[a-f0-9]+: 62 f1 d6 38 2a f0 vcvtsi2ss %rax,\{rd-sae\},%xmm5,%xmm6
+ +[a-f0-9]+: 62 f1 57 38 2a f0 vcvtsi2sd %eax,\(bad\),%xmm5,%xmm6
+ +[a-f0-9]+: 62 f1 d7 38 2a f0 vcvtsi2sd %rax,\{rd-sae\},%xmm5,%xmm6
+ +[a-f0-9]+: 62 f1 d6 08 7b f0 vcvtusi2ss %rax,%xmm5,%xmm6
+ +[a-f0-9]+: 62 f1 57 08 7b f0 vcvtusi2sd %eax,%xmm5,%xmm6
+ +[a-f0-9]+: 62 f1 d7 08 7b f0 vcvtusi2sd %rax,%xmm5,%xmm6
+ +[a-f0-9]+: 62 f1 d6 38 7b f0 vcvtusi2ss %rax,\{rd-sae\},%xmm5,%xmm6
+ +[a-f0-9]+: 62 f1 57 38 7b f0 vcvtusi2sd %eax,\(bad\),%xmm5,%xmm6
+ +[a-f0-9]+: 62 f1 d7 38 7b f0 vcvtusi2sd %rax,\{rd-sae\},%xmm5,%xmm6
+#pass
diff --git a/opcodes/i386-dis-evex-prefix.h b/opcodes/i386-dis-evex-prefix.h
index 2ed8f6730c5..9ad9372a221 100644
--- a/opcodes/i386-dis-evex-prefix.h
+++ b/opcodes/i386-dis-evex-prefix.h
@@ -30,7 +30,7 @@
{ Bad_Opcode },
{ "vcvtsi2ss{%LQ|}", { XMScalar, VexScalar, EXxEVexR, Edq }, 0 },
{ Bad_Opcode },
- { VEX_W_TABLE (EVEX_W_0F2A_P_3) },
+ { "vcvtsi2sd{%LQ|}", { XMScalar, VexScalar, EXxEVexR64, Edq }, 0 },
},
/* PREFIX_EVEX_0F51 */
{
@@ -134,7 +134,7 @@
{ Bad_Opcode },
{ "vcvtusi2ss{%LQ|}", { XMScalar, VexScalar, EXxEVexR, Edq }, 0 },
{ VEX_W_TABLE (EVEX_W_0F7B_P_2) },
- { VEX_W_TABLE (EVEX_W_0F7B_P_3) },
+ { "vcvtusi2sd{%LQ|}", { XMScalar, VexScalar, EXxEVexR64, Edq }, 0 },
},
/* PREFIX_EVEX_0F7E */
{
diff --git a/opcodes/i386-dis-evex-w.h b/opcodes/i386-dis-evex-w.h
index 2c7d9bc2e34..8af4695a004 100644
--- a/opcodes/i386-dis-evex-w.h
+++ b/opcodes/i386-dis-evex-w.h
@@ -37,11 +37,6 @@
{
{ "vmovshdup", { XM, EXx }, 0 },
},
- /* EVEX_W_0F2A_P_3 */
- {
- { "vcvtsi2sd{%LQ|}", { XMScalar, VexScalar, Ed }, 0 },
- { "vcvtsi2sd{%LQ|}", { XMScalar, VexScalar, EXxEVexR64, Edq }, 0 },
- },
/* EVEX_W_0F51_P_1 */
{
{ "vsqrtss", { XMScalar, VexScalar, EXxmm_md, EXxEVexR }, 0 },
@@ -243,11 +238,6 @@
{ "vcvtps2qq", { XM, EXEvexHalfBcstXmmq, EXxEVexR }, 0 },
{ "vcvtpd2qq", { XM, EXx, EXxEVexR }, 0 },
},
- /* EVEX_W_0F7B_P_3 */
- {
- { "vcvtusi2sd{%LQ|}", { XMScalar, VexScalar, Ed }, 0 },
- { "vcvtusi2sd{%LQ|}", { XMScalar, VexScalar, EXxEVexR64, Edq }, 0 },
- },
/* EVEX_W_0F7E_P_1 */
{
{ Bad_Opcode },
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index f88276ced6b..ccc49ff023f 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -1476,7 +1476,6 @@ enum
EVEX_W_0F12_P_3,
EVEX_W_0F16_P_0_M_1,
EVEX_W_0F16_P_1,
- EVEX_W_0F2A_P_3,
EVEX_W_0F51_P_1,
EVEX_W_0F51_P_3,
EVEX_W_0F58_P_1,
@@ -1521,7 +1520,6 @@ enum
EVEX_W_0F7A_P_2,
EVEX_W_0F7A_P_3,
EVEX_W_0F7B_P_2,
- EVEX_W_0F7B_P_3,
EVEX_W_0F7E_P_1,
EVEX_W_0F7F_P_1,
EVEX_W_0F7F_P_2,
@@ -13724,7 +13722,7 @@ OP_Rounding (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
switch (bytemode)
{
case evex_rounding_64_mode:
- if (address_mode != mode_64bit)
+ if (address_mode != mode_64bit || !vex.w)
{
oappend ("(bad)");
break;
--
2.33.0

70
0004-x86-64-generalize-OP_G-s-EVEX.R-handling.patch
View File

@ -1,70 +0,0 @@
From 3fa77affb00ef5d9bcb7f080750625749cdfa611 Mon Sep 17 00:00:00 2001
From: Jan Beulich <jbeulich@suse.com>
Date: Thu, 22 Jul 2021 13:02:54 +0200
Subject: [PATCH] x86-64: generalize OP_G()'s EVEX.R' handling
EVEX.R' is invalid to be clear not only for mask registers, but also for
GPRs - IOW everything handled in this function.
diff --git a/gas/testsuite/gas/i386/evex.d b/gas/testsuite/gas/i386/evex.d
index b02bca39098..367b2eb1321 100644
--- a/gas/testsuite/gas/i386/evex.d
+++ b/gas/testsuite/gas/i386/evex.d
@@ -16,4 +16,6 @@ Disassembly of section .text:
+[a-f0-9]+: 62 f1 d6 38 7b f0 vcvtusi2ssl %eax,\{rd-sae\},%xmm5,%xmm6
+[a-f0-9]+: 62 f1 57 38 7b f0 vcvtusi2sdl %eax,\(bad\),%xmm5,%xmm6
+[a-f0-9]+: 62 f1 d7 38 7b f0 vcvtusi2sdl %eax,\(bad\),%xmm5,%xmm6
+ +[a-f0-9]+: 62 e1 7e 08 2d c0 vcvtss2si %xmm0,%eax
+ +[a-f0-9]+: 62 e1 7c 08 c2 c0 00 vcmpeqps %xmm0,%xmm0,%k0
#pass
diff --git a/gas/testsuite/gas/i386/evex.s b/gas/testsuite/gas/i386/evex.s
index 90c635a27b6..ff6cb43499b 100644
--- a/gas/testsuite/gas/i386/evex.s
+++ b/gas/testsuite/gas/i386/evex.s
@@ -12,3 +12,5 @@ _start:
.byte 0x62, 0xf1, 0xd6, 0x38, 0x7b, 0xf0
.byte 0x62, 0xf1, 0x57, 0x38, 0x7b, 0xf0
.byte 0x62, 0xf1, 0xd7, 0x38, 0x7b, 0xf0
+ .byte 0x62, 0xe1, 0x7e, 0x08, 0x2d, 0xc0
+ .byte 0x62, 0xe1, 0x7c, 0x08, 0xc2, 0xc0, 0x00
diff --git a/gas/testsuite/gas/i386/x86-64-evex.d b/gas/testsuite/gas/i386/x86-64-evex.d
index b360aa74a17..3a7b48e0bf9 100644
--- a/gas/testsuite/gas/i386/x86-64-evex.d
+++ b/gas/testsuite/gas/i386/x86-64-evex.d
@@ -17,4 +17,6 @@ Disassembly of section .text:
+[a-f0-9]+: 62 f1 d6 38 7b f0 vcvtusi2ss %rax,\{rd-sae\},%xmm5,%xmm6
+[a-f0-9]+: 62 f1 57 38 7b f0 vcvtusi2sd %eax,\(bad\),%xmm5,%xmm6
+[a-f0-9]+: 62 f1 d7 38 7b f0 vcvtusi2sd %rax,\{rd-sae\},%xmm5,%xmm6
+ +[a-f0-9]+: 62 e1 7e 08 2d c0 vcvtss2si %xmm0,\(bad\)
+ +[a-f0-9]+: 62 e1 7c 08 c2 c0 00 vcmpeqps %xmm0,%xmm0,\(bad\)
#pass
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index ccc49ff023f..e95d2ef9d64 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -11934,6 +11934,13 @@ OP_G (int bytemode, int sizeflag)
{
int add = 0;
const char **names;
+
+ if (vex.evex && !vex.r && address_mode == mode_64bit)
+ {
+ oappend ("(bad)");
+ return;
+ }
+
USED_REX (REX_R);
if (rex & REX_R)
add += 8;
@@ -12012,7 +12019,7 @@ OP_G (int bytemode, int sizeflag)
break;
case mask_bd_mode:
case mask_mode:
- if (add || (vex.evex && !vex.r))
+ if (add)
{
oappend ("(bad)");
return;
--
2.33.0

61
0005-x86-64-properly-bounds-check-bnd-N-in-OP_G.patch
View File

@ -1,61 +0,0 @@
From bac11f2cfe7913ef4c37af608454451e27f78eff Mon Sep 17 00:00:00 2001
From: Jan Beulich <jbeulich@suse.com>
Date: Thu, 22 Jul 2021 13:03:16 +0200
Subject: [PATCH] x86-64: properly bounds-check %bnd<N> in OP_G()
The restriction to %bnd0-%bnd3 requires to also check REX.R is clear,
just like OP_E_Register() also includes REX.B in its check.
diff --git a/gas/testsuite/gas/i386/x86-64-mpx.d b/gas/testsuite/gas/i386/x86-64-mpx.d
index f3217e07016..2f45af0d6e4 100644
--- a/gas/testsuite/gas/i386/x86-64-mpx.d
+++ b/gas/testsuite/gas/i386/x86-64-mpx.d
@@ -191,5 +191,7 @@ Disassembly of section .text:
[a-f0-9]+ <bad>:
[ ]*[a-f0-9]+: 0f 1a 30 bndldx \(%rax\),\(bad\)
[ ]*[a-f0-9]+: 66 0f 1a c4 bndmov \(bad\),%bnd0
+[ ]*[a-f0-9]+: 66 41 0f 1a c0 bndmov \(bad\),%bnd0
+[ ]*[a-f0-9]+: 66 44 0f 1a c0 bndmov %bnd0,\(bad\)
[ ]*[a-f0-9]+: f3 0f 1b 05 90 90 90 90 bndmk \(bad\),%bnd0
#pass
diff --git a/gas/testsuite/gas/i386/x86-64-mpx.s b/gas/testsuite/gas/i386/x86-64-mpx.s
index b113590cf76..3594d8e9c88 100644
--- a/gas/testsuite/gas/i386/x86-64-mpx.s
+++ b/gas/testsuite/gas/i386/x86-64-mpx.s
@@ -227,6 +227,20 @@ bad:
.byte 0x1a
.byte 0xc4
+ # bndmov with REX.B set
+ .byte 0x66
+ .byte 0x41
+ .byte 0x0f
+ .byte 0x1a
+ .byte 0xc0
+
+ # bndmov with REX.R set
+ .byte 0x66
+ .byte 0x44
+ .byte 0x0f
+ .byte 0x1a
+ .byte 0xc0
+
# bndmk (bad),%bnd0
.byte 0xf3
.byte 0x0f
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index e95d2ef9d64..203dcefa360 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -11966,7 +11966,7 @@ OP_G (int bytemode, int sizeflag)
oappend (names64[modrm.reg + add]);
break;
case bnd_mode:
- if (modrm.reg > 0x3)
+ if (modrm.reg + add > 0x3)
{
oappend ("(bad)");
return;
--
2.33.0

183
0006-x86-fold-duplicate-register-printing-code.patch
View File

@ -1,183 +0,0 @@
From 5f6b8397a40ca30460464e115c6aed8b7b6679f8 Mon Sep 17 00:00:00 2001
From: Jan Beulich <jbeulich@suse.com>
Date: Thu, 22 Jul 2021 13:03:37 +0200
Subject: [PATCH] x86: fold duplicate register printing code
What so far was OP_E_register() can be easily reused also for OP_G().
Add suitable parameters to the function and move the invocation of
swap_operand() to OP_E(). Adjust MOVSXD's first operand: There never was
a need to use movsxd_mode there, and its use gets in the way of the code
folding.
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 203dcefa360..725b38b1dda 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -50,7 +50,6 @@ static void oappend (const char *);
static void append_seg (void);
static void OP_indirE (int, int);
static void print_operand_value (char *, int, bfd_vma);
-static void OP_E_register (int, int);
static void OP_E_memory (int, int);
static void print_displacement (char *, bfd_vma);
static void OP_E (int, int);
@@ -4180,7 +4179,7 @@ static const struct dis386 x86_64_table[][2] = {
/* X86_64_63 */
{
{ "arpl", { Ew, Gw }, 0 },
- { "movs", { { OP_G, movsxd_mode }, { MOVSXD_Fixup, movsxd_mode } }, 0 },
+ { "movs", { Gv, { MOVSXD_Fixup, movsxd_mode } }, 0 },
},
/* X86_64_6D */
@@ -11290,21 +11289,14 @@ intel_operand_size (int bytemode, int sizeflag)
}
static void
-OP_E_register (int bytemode, int sizeflag)
+print_register (unsigned int reg, unsigned int rexmask, int bytemode, int sizeflag)
{
- int reg = modrm.rm;
const char **names;
- USED_REX (REX_B);
- if ((rex & REX_B))
+ USED_REX (rexmask);
+ if (rex & rexmask)
reg += 8;
- if ((sizeflag & SUFFIX_ALWAYS)
- && (bytemode == b_swap_mode
- || bytemode == bnd_swap_mode
- || bytemode == v_swap_mode))
- swap_operand ();
-
switch (bytemode)
{
case b_mode:
@@ -11924,7 +11916,15 @@ OP_E (int bytemode, int sizeflag)
codep++;
if (modrm.mod == 3)
- OP_E_register (bytemode, sizeflag);
+ {
+ if ((sizeflag & SUFFIX_ALWAYS)
+ && (bytemode == b_swap_mode
+ || bytemode == bnd_swap_mode
+ || bytemode == v_swap_mode))
+ swap_operand ();
+
+ print_register (modrm.rm, REX_B, bytemode, sizeflag);
+ }
else
OP_E_memory (bytemode, sizeflag);
}
@@ -11932,104 +11932,13 @@ OP_E (int bytemode, int sizeflag)
static void
OP_G (int bytemode, int sizeflag)
{
- int add = 0;
- const char **names;
-
if (vex.evex && !vex.r && address_mode == mode_64bit)
{
oappend ("(bad)");
return;
}
- USED_REX (REX_R);
- if (rex & REX_R)
- add += 8;
- switch (bytemode)
- {
- case b_mode:
- if (modrm.reg & 4)
- USED_REX (0);
- if (rex)
- oappend (names8rex[modrm.reg + add]);
- else
- oappend (names8[modrm.reg + add]);
- break;
- case w_mode:
- oappend (names16[modrm.reg + add]);
- break;
- case d_mode:
- case db_mode:
- case dw_mode:
- oappend (names32[modrm.reg + add]);
- break;
- case q_mode:
- oappend (names64[modrm.reg + add]);
- break;
- case bnd_mode:
- if (modrm.reg + add > 0x3)
- {
- oappend ("(bad)");
- return;
- }
- oappend (names_bnd[modrm.reg]);
- break;
- case v_mode:
- case dq_mode:
- case dqb_mode:
- case dqd_mode:
- case dqw_mode:
- case movsxd_mode:
- USED_REX (REX_W);
- if (rex & REX_W)
- oappend (names64[modrm.reg + add]);
- else if (bytemode != v_mode && bytemode != movsxd_mode)
- oappend (names32[modrm.reg + add]);
- else
- {
- if (sizeflag & DFLAG)
- oappend (names32[modrm.reg + add]);
- else
- oappend (names16[modrm.reg + add]);
- used_prefixes |= (prefixes & PREFIX_DATA);
- }
- break;
- case va_mode:
- names = (address_mode == mode_64bit
- ? names64 : names32);
- if (!(prefixes & PREFIX_ADDR))
- {
- if (address_mode == mode_16bit)
- names = names16;
- }
- else
- {
- /* Remove "addr16/addr32". */
- all_prefixes[last_addr_prefix] = 0;
- names = (address_mode != mode_32bit
- ? names32 : names16);
- used_prefixes |= PREFIX_ADDR;
- }
- oappend (names[modrm.reg + add]);
- break;
- case m_mode:
- if (address_mode == mode_64bit)
- oappend (names64[modrm.reg + add]);
- else
- oappend (names32[modrm.reg + add]);
- break;
- case mask_bd_mode:
- case mask_mode:
- if (add)
- {
- oappend ("(bad)");
- return;
- }
- oappend (names_mask[modrm.reg]);
- break;
- default:
- oappend (INTERNAL_DISASSEMBLER_ERROR);
- break;
- }
+ print_register (modrm.reg, REX_R, bytemode, sizeflag);
}
static bfd_vma
--
2.33.0

56
0007-x86-fold-duplicate-code-in-MOVSXD_Fixup.patch
View File

@ -1,56 +0,0 @@
From 4454883ff0ee338b1f6aab7f65ab1081af307e7c Mon Sep 17 00:00:00 2001
From: Jan Beulich <jbeulich@suse.com>
Date: Thu, 22 Jul 2021 13:03:53 +0200
Subject: [PATCH] x86: fold duplicate code in MOVSXD_Fixup()
There's no need to have two paths printing the "xd" mnemonic suffix.
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 725b38b1dda..ddb659fb041 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -13601,31 +13601,25 @@ MOVSXD_Fixup (int bytemode, int sizeflag)
switch (bytemode)
{
case movsxd_mode:
- if (intel_syntax)
+ if (!intel_syntax)
{
- *p++ = 'x';
- *p++ = 'd';
- goto skip;
+ USED_REX (REX_W);
+ if (rex & REX_W)
+ {
+ *p++ = 'l';
+ *p++ = 'q';
+ break;
+ }
}
- USED_REX (REX_W);
- if (rex & REX_W)
- {
- *p++ = 'l';
- *p++ = 'q';
- }
- else
- {
- *p++ = 'x';
- *p++ = 'd';
- }
+ *p++ = 'x';
+ *p++ = 'd';
break;
default:
oappend (INTERNAL_DISASSEMBLER_ERROR);
break;
}
- skip:
mnemonicendp = p;
*p = '\0';
OP_E (bytemode, sizeflag);
--
2.33.0

79
0008-x86-correct-EVEX.V-handling-outside-of-64-bit-mode.patch
View File

@ -1,79 +0,0 @@
From 54ca11a48eba11788445247b16bc77637e3aa84a Mon Sep 17 00:00:00 2001
From: Jan Beulich <jbeulich@suse.com>
Date: Thu, 22 Jul 2021 13:07:27 +0200
Subject: [PATCH] x86: correct EVEX.V' handling outside of 64-bit mode
Unlike the high bit of VEX.vvvv / EVEX.vvvv, EVEX.V' is not ignored
outside of 64-bit mode. Oddly enough there already are tests for these
cases, but their expectations were wrong. (This may have been based on
an old SDM version, where the restriction wasn't properly spelled out.)
diff --git a/gas/testsuite/gas/i386/noextreg.d b/gas/testsuite/gas/i386/noextreg.d
index 08bad494a80..ba175fc001e 100644
--- a/gas/testsuite/gas/i386/noextreg.d
+++ b/gas/testsuite/gas/i386/noextreg.d
@@ -13,14 +13,14 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 62 f1 7d 08 db c0 vpandd %xmm0,%xmm0,%xmm0
[ ]*[a-f0-9]+: 62 d1 7d 08 db c0 vpandd %xmm0,%xmm0,%xmm0
[ ]*[a-f0-9]+: 62 f1 3d 08 db c0 vpandd %xmm0,%xmm0,%xmm0
-[ ]*[a-f0-9]+: 62 f1 7d 00 db c0 vpandd %xmm0,%xmm0,%xmm0
+[ ]*[a-f0-9]+: 62 f1 7d 00 db c0 vpandd %xmm0,\(bad\),%xmm0
[ ]*[a-f0-9]+: c4 e3 79 4c c0 00 vpblendvb %xmm0,%xmm0,%xmm0,%xmm0
[ ]*[a-f0-9]+: c4 c3 79 4c c0 00 vpblendvb %xmm0,%xmm0,%xmm0,%xmm0
[ ]*[a-f0-9]+: c4 e3 39 4c c0 00 vpblendvb %xmm0,%xmm0,%xmm0,%xmm0
[ ]*[a-f0-9]+: c4 e3 79 4c c0 80 vpblendvb %xmm0,%xmm0,%xmm0,%xmm0
[ ]*[a-f0-9]+: 62 f2 7d 0f 90 0c 00 vpgatherdd \(%eax,%xmm0,1\),%xmm1\{%k7\}
[ ]*[a-f0-9]+: 62 d2 7d 0f 90 0c 00 vpgatherdd \(%eax,%xmm0,1\),%xmm1\{%k7\}
-[ ]*[a-f0-9]+: 62 f2 7d 07 90 0c 00 vpgatherdd \(%eax,%xmm0,1\),%xmm1\{%k7\}
+[ ]*[a-f0-9]+: 62 f2 7d 07 90 0c 00 vpgatherdd \(%eax,\(bad\),1\),%xmm1\{%k7\}
[ ]*[a-f0-9]+: c4 e2 78 f2 00 andn \(%eax\),%eax,%eax
[ ]*[a-f0-9]+: c4 e2 38 f2 00 andn \(%eax\),%eax,%eax
[ ]*[a-f0-9]+: c4 c2 78 f2 00 andn \(%eax\),%eax,%eax
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index ddb659fb041..267d58d535e 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -9316,7 +9316,6 @@ get_valid_dis386 (const struct dis386 *dp, disassemble_info *info)
/* In 16/32-bit mode silently ignore following bits. */
rex &= ~REX_B;
vex.r = 1;
- vex.v = 1;
}
need_vex = 1;
@@ -11718,8 +11717,13 @@ OP_E_memory (int bytemode, int sizeflag)
*obufp = '\0';
}
if (haveindex)
- oappend (address_mode == mode_64bit && !addr32flag
- ? indexes64[vindex] : indexes32[vindex]);
+ {
+ if (address_mode == mode_64bit || vindex < 16)
+ oappend (address_mode == mode_64bit && !addr32flag
+ ? indexes64[vindex] : indexes32[vindex]);
+ else
+ oappend ("(bad)");
+ }
else
oappend (address_mode == mode_64bit && !addr32flag
? index64 : index32);
@@ -13256,7 +13260,15 @@ OP_VEX (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
reg = vex.register_specifier;
vex.register_specifier = 0;
if (address_mode != mode_64bit)
- reg &= 7;
+ {
+ if (vex.evex && !vex.v)
+ {
+ oappend ("(bad)");
+ return;
+ }
+
+ reg &= 7;
+ }
else if (vex.evex && !vex.v)
reg += 16;
--
2.33.0

74
0009-x86-drop-vex_mode-and-vex_scalar_mode.patch
View File

@ -1,74 +0,0 @@
From 605228fcaf91a86b5ae898415374a9382c85f76f Mon Sep 17 00:00:00 2001
From: Jan Beulich <jbeulich@suse.com>
Date: Thu, 22 Jul 2021 13:07:42 +0200
Subject: [PATCH] x86: drop vex_mode and vex_scalar_mode
These are fully redundant with, respectively, x_mode and scalar_mode.
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 267d58d535e..20bf9b282c9 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -384,10 +384,10 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
#define XMM0 { XMM_Fixup, 0 }
#define FXSAVE { FXSAVE_Fixup, 0 }
-#define Vex { OP_VEX, vex_mode }
-#define VexW { OP_VexW, vex_mode }
-#define VexScalar { OP_VEX, vex_scalar_mode }
-#define VexScalarR { OP_VexR, vex_scalar_mode }
+#define Vex { OP_VEX, x_mode }
+#define VexW { OP_VexW, x_mode }
+#define VexScalar { OP_VEX, scalar_mode }
+#define VexScalarR { OP_VexR, scalar_mode }
#define VexGatherD { OP_VEX, vex_vsib_d_w_dq_mode }
#define VexGatherQ { OP_VEX, vex_vsib_q_w_dq_mode }
#define VexGdq { OP_VEX, dq_mode }
@@ -546,8 +546,6 @@ enum
dw_mode,
/* registers like dq_mode, memory like d_mode. */
dqd_mode,
- /* normal vex mode */
- vex_mode,
/* Operand size depends on the VEX.W bit, with VSIB dword indices. */
vex_vsib_d_w_dq_mode,
@@ -558,8 +556,6 @@ enum
/* scalar, ignore vector length. */
scalar_mode,
- /* like vex_mode, ignore vector length. */
- vex_scalar_mode,
/* Operand size depends on the VEX.W bit, ignore vector length. */
vex_scalar_w_dq_mode,
@@ -13274,7 +13270,7 @@ OP_VEX (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
switch (bytemode)
{
- case vex_scalar_mode:
+ case scalar_mode:
oappend (names_xmm[reg]);
return;
@@ -13343,7 +13339,7 @@ OP_VEX (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
case 128:
switch (bytemode)
{
- case vex_mode:
+ case x_mode:
names = names_xmm;
break;
case dq_mode:
@@ -13369,7 +13365,7 @@ OP_VEX (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
case 256:
switch (bytemode)
{
- case vex_mode:
+ case x_mode:
names = names_ymm;
break;
case mask_bd_mode:
--
2.33.0

168
0010-x86-fold-duplicate-vector-register-printing-code.patch
View File

@ -1,168 +0,0 @@
From b0556968af05310748d7a1286b8d7639de67831e Mon Sep 17 00:00:00 2001
From: Jan Beulich <jbeulich@suse.com>
Date: Thu, 22 Jul 2021 13:08:05 +0200
Subject: [PATCH] x86: fold duplicate vector register printing code
The bulk of OP_XMM() can be easily reused also for OP_EX(). Break the
shared logic out of the function, and invoke the new helper from both
places.
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 20bf9b282c9..e750c94704a 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -12530,20 +12530,10 @@ OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
}
static void
-OP_XMM (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
+print_vector_reg (unsigned int reg, int bytemode)
{
- int reg = modrm.reg;
const char **names;
- USED_REX (REX_R);
- if (rex & REX_R)
- reg += 8;
- if (vex.evex)
- {
- if (!vex.r)
- reg += 16;
- }
-
if (bytemode == xmmq_mode
|| bytemode == evex_half_bcst_xmmq_mode)
{
@@ -12564,7 +12554,6 @@ OP_XMM (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
names = names_ymm;
else if (bytemode == tmm_mode)
{
- modrm.reg = reg;
if (reg >= 8)
{
oappend ("(bad)");
@@ -12574,7 +12563,14 @@ OP_XMM (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
}
else if (need_vex
&& bytemode != xmm_mode
- && bytemode != scalar_mode)
+ && bytemode != scalar_mode
+ && bytemode != xmmdw_mode
+ && bytemode != xmmqd_mode
+ && bytemode != xmm_mb_mode
+ && bytemode != xmm_mw_mode
+ && bytemode != xmm_md_mode
+ && bytemode != xmm_mq_mode
+ && bytemode != vex_scalar_w_dq_mode)
{
switch (vex.length)
{
@@ -12604,6 +12600,26 @@ OP_XMM (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
oappend (names[reg]);
}
+static void
+OP_XMM (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
+{
+ unsigned int reg = modrm.reg;
+
+ USED_REX (REX_R);
+ if (rex & REX_R)
+ reg += 8;
+ if (vex.evex)
+ {
+ if (!vex.r)
+ reg += 16;
+ }
+
+ if (bytemode == tmm_mode)
+ modrm.reg = reg;
+
+ print_vector_reg (reg, bytemode);
+}
+
static void
OP_EM (int bytemode, int sizeflag)
{
@@ -12679,7 +12695,6 @@ static void
OP_EX (int bytemode, int sizeflag)
{
int reg;
- const char **names;
/* Skip mod/rm byte. */
MODRM_CHECK;
@@ -12708,66 +12723,10 @@ OP_EX (int bytemode, int sizeflag)
|| bytemode == q_swap_mode))
swap_operand ();
- if (need_vex
- && bytemode != xmm_mode
- && bytemode != xmmdw_mode
- && bytemode != xmmqd_mode
- && bytemode != xmm_mb_mode
- && bytemode != xmm_mw_mode
- && bytemode != xmm_md_mode
- && bytemode != xmm_mq_mode
- && bytemode != xmmq_mode
- && bytemode != evex_half_bcst_xmmq_mode
- && bytemode != ymm_mode
- && bytemode != tmm_mode
- && bytemode != vex_scalar_w_dq_mode)
- {
- switch (vex.length)
- {
- case 128:
- names = names_xmm;
- break;
- case 256:
- names = names_ymm;
- break;
- case 512:
- names = names_zmm;
- break;
- default:
- abort ();
- }
- }
- else if (bytemode == xmmq_mode
- || bytemode == evex_half_bcst_xmmq_mode)
- {
- switch (vex.length)
- {
- case 128:
- case 256:
- names = names_xmm;
- break;
- case 512:
- names = names_ymm;
- break;
- default:
- abort ();
- }
- }
- else if (bytemode == tmm_mode)
- {
- modrm.rm = reg;
- if (reg >= 8)
- {
- oappend ("(bad)");
- return;
- }
- names = names_tmm;
- }
- else if (bytemode == ymm_mode)
- names = names_ymm;
- else
- names = names_xmm;
- oappend (names[reg]);
+ if (bytemode == tmm_mode)
+ modrm.rm = reg;
+
+ print_vector_reg (reg, bytemode);
}
static void
--
2.33.0

664
0011-x86-drop-xmm_m-b-w-d-q-_mode.patch
View File

@ -1,664 +0,0 @@
From c1d66d5f24eb54a6453b3a813cbc7a7e0b5d15fe Mon Sep 17 00:00:00 2001
From: Jan Beulich <jbeulich@suse.com>
Date: Thu, 22 Jul 2021 13:08:39 +0200
Subject: [PATCH] x86: drop xmm_m{b,w,d,q}_mode
They're effectively redundant with {b,w,d,q}_mode.
diff --git a/opcodes/i386-dis-evex-mod.h b/opcodes/i386-dis-evex-mod.h
index a1cd69a1c9e..7a372ce8c0b 100644
--- a/opcodes/i386-dis-evex-mod.h
+++ b/opcodes/i386-dis-evex-mod.h
@@ -1,28 +1,28 @@
{
/* MOD_EVEX_0F12_PREFIX_0 */
- { "vmovlpX", { XMM, Vex, EXxmm_mq }, PREFIX_OPCODE },
+ { "vmovlpX", { XMM, Vex, EXq }, PREFIX_OPCODE },
{ VEX_W_TABLE (EVEX_W_0F12_P_0_M_1) },
},
{
/* MOD_EVEX_0F12_PREFIX_2 */
- { "vmovlpX", { XMM, Vex, EXxmm_mq }, PREFIX_OPCODE },
+ { "vmovlpX", { XMM, Vex, EXq }, PREFIX_OPCODE },
},
{
/* MOD_EVEX_0F13 */
- { "vmovlpX", { EXxmm_mq, XMM }, PREFIX_OPCODE },
+ { "vmovlpX", { EXq, XMM }, PREFIX_OPCODE },
},
{
/* MOD_EVEX_0F16_PREFIX_0 */
- { "vmovhpX", { XMM, Vex, EXxmm_mq }, PREFIX_OPCODE },
+ { "vmovhpX", { XMM, Vex, EXq }, PREFIX_OPCODE },
{ VEX_W_TABLE (EVEX_W_0F16_P_0_M_1) },
},
{
/* MOD_EVEX_0F16_PREFIX_2 */
- { "vmovhpX", { XMM, Vex, EXxmm_mq }, PREFIX_OPCODE },
+ { "vmovhpX", { XMM, Vex, EXq }, PREFIX_OPCODE },
},
{
/* MOD_EVEX_0F17 */
- { "vmovhpX", { EXxmm_mq, XMM }, PREFIX_OPCODE },
+ { "vmovhpX", { EXq, XMM }, PREFIX_OPCODE },
},
{
/* MOD_EVEX_0F2B */
diff --git a/opcodes/i386-dis-evex-prefix.h b/opcodes/i386-dis-evex-prefix.h
index 9ad9372a221..417eb1bfbff 100644
--- a/opcodes/i386-dis-evex-prefix.h
+++ b/opcodes/i386-dis-evex-prefix.h
@@ -111,16 +111,16 @@
/* PREFIX_EVEX_0F78 */
{
{ VEX_W_TABLE (EVEX_W_0F78_P_0) },
- { "vcvttss2usi", { Gdq, EXxmm_md, EXxEVexS }, 0 },
+ { "vcvttss2usi", { Gdq, EXd, EXxEVexS }, 0 },
{ VEX_W_TABLE (EVEX_W_0F78_P_2) },
- { "vcvttsd2usi", { Gdq, EXxmm_mq, EXxEVexS }, 0 },
+ { "vcvttsd2usi", { Gdq, EXq, EXxEVexS }, 0 },
},
/* PREFIX_EVEX_0F79 */
{
{ VEX_W_TABLE (EVEX_W_0F79_P_0) },
- { "vcvtss2usi", { Gdq, EXxmm_md, EXxEVexR }, 0 },
+ { "vcvtss2usi", { Gdq, EXd, EXxEVexR }, 0 },
{ VEX_W_TABLE (EVEX_W_0F79_P_2) },
- { "vcvtsd2usi", { Gdq, EXxmm_mq, EXxEVexR }, 0 },
+ { "vcvtsd2usi", { Gdq, EXq, EXxEVexR }, 0 },
},
/* PREFIX_EVEX_0F7A */
{
diff --git a/opcodes/i386-dis-evex-w.h b/opcodes/i386-dis-evex-w.h
index 8af4695a004..cb27d96d30d 100644
--- a/opcodes/i386-dis-evex-w.h
+++ b/opcodes/i386-dis-evex-w.h
@@ -1,11 +1,11 @@
/* EVEX_W_0F10_P_1 */
{
- { "vmovss", { XMScalar, VexScalarR, EXxmm_md }, 0 },
+ { "vmovss", { XMScalar, VexScalarR, EXd }, 0 },
},
/* EVEX_W_0F10_P_3 */
{
{ Bad_Opcode },
- { "vmovsd", { XMScalar, VexScalarR, EXxmm_mq }, 0 },
+ { "vmovsd", { XMScalar, VexScalarR, EXq }, 0 },
},
/* EVEX_W_0F11_P_1 */
{
@@ -18,7 +18,7 @@
},
/* EVEX_W_0F12_P_0_M_1 */
{
- { "vmovhlps", { XMM, Vex, EXxmm_mq }, 0 },
+ { "vmovhlps", { XMM, Vex, EXq }, 0 },
},
/* EVEX_W_0F12_P_1 */
{
@@ -39,30 +39,30 @@
},
/* EVEX_W_0F51_P_1 */
{
- { "vsqrtss", { XMScalar, VexScalar, EXxmm_md, EXxEVexR }, 0 },
+ { "vsqrtss", { XMScalar, VexScalar, EXd, EXxEVexR }, 0 },
},
/* EVEX_W_0F51_P_3 */
{
{ Bad_Opcode },
- { "vsqrtsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexR }, 0 },
+ { "vsqrtsd", { XMScalar, VexScalar, EXq, EXxEVexR }, 0 },
},
/* EVEX_W_0F58_P_1 */
{
- { "vaddss", { XMScalar, VexScalar, EXxmm_md, EXxEVexR }, 0 },
+ { "vaddss", { XMScalar, VexScalar, EXd, EXxEVexR }, 0 },
},
/* EVEX_W_0F58_P_3 */
{
{ Bad_Opcode },
- { "vaddsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexR }, 0 },
+ { "vaddsd", { XMScalar, VexScalar, EXq, EXxEVexR }, 0 },
},
/* EVEX_W_0F59_P_1 */
{
- { "vmulss", { XMScalar, VexScalar, EXxmm_md, EXxEVexR }, 0 },
+ { "vmulss", { XMScalar, VexScalar, EXd, EXxEVexR }, 0 },
},
/* EVEX_W_0F59_P_3 */
{
{ Bad_Opcode },
- { "vmulsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexR }, 0 },
+ { "vmulsd", { XMScalar, VexScalar, EXq, EXxEVexR }, 0 },
},
/* EVEX_W_0F5A_P_0 */
{
@@ -70,7 +70,7 @@
},
/* EVEX_W_0F5A_P_1 */
{
- { "vcvtss2sd", { XMScalar, VexScalar, EXxmm_md, EXxEVexS }, 0 },
+ { "vcvtss2sd", { XMScalar, VexScalar, EXd, EXxEVexS }, 0 },
},
/* EVEX_W_0F5A_P_2 */
{
@@ -80,7 +80,7 @@
/* EVEX_W_0F5A_P_3 */
{
{ Bad_Opcode },
- { "vcvtsd2ss", { XMScalar, VexScalar, EXxmm_mq, EXxEVexR }, 0 },
+ { "vcvtsd2ss", { XMScalar, VexScalar, EXq, EXxEVexR }, 0 },
},
/* EVEX_W_0F5B_P_0 */
{
@@ -97,39 +97,39 @@
},
/* EVEX_W_0F5C_P_1 */
{
- { "vsubss", { XMScalar, VexScalar, EXxmm_md, EXxEVexR }, 0 },
+ { "vsubss", { XMScalar, VexScalar, EXd, EXxEVexR }, 0 },
},
/* EVEX_W_0F5C_P_3 */
{
{ Bad_Opcode },
- { "vsubsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexR }, 0 },
+ { "vsubsd", { XMScalar, VexScalar, EXq, EXxEVexR }, 0 },
},
/* EVEX_W_0F5D_P_1 */
{
- { "vminss", { XMScalar, VexScalar, EXxmm_md, EXxEVexS }, 0 },
+ { "vminss", { XMScalar, VexScalar, EXd, EXxEVexS }, 0 },
},
/* EVEX_W_0F5D_P_3 */
{
{ Bad_Opcode },
- { "vminsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexS }, 0 },
+ { "vminsd", { XMScalar, VexScalar, EXq, EXxEVexS }, 0 },
},
/* EVEX_W_0F5E_P_1 */
{
- { "vdivss", { XMScalar, VexScalar, EXxmm_md, EXxEVexR }, 0 },
+ { "vdivss", { XMScalar, VexScalar, EXd, EXxEVexR }, 0 },
},
/* EVEX_W_0F5E_P_3 */
{
{ Bad_Opcode },
- { "vdivsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexR }, 0 },
+ { "vdivsd", { XMScalar, VexScalar, EXq, EXxEVexR }, 0 },
},
/* EVEX_W_0F5F_P_1 */
{
- { "vmaxss", { XMScalar, VexScalar, EXxmm_md, EXxEVexS }, 0 },
+ { "vmaxss", { XMScalar, VexScalar, EXd, EXxEVexS }, 0 },
},
/* EVEX_W_0F5F_P_3 */
{
{ Bad_Opcode },
- { "vmaxsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexS }, 0 },
+ { "vmaxsd", { XMScalar, VexScalar, EXq, EXxEVexS }, 0 },
},
/* EVEX_W_0F62 */
{
@@ -260,12 +260,12 @@
},
/* EVEX_W_0FC2_P_1 */
{
- { "vcmpss", { MaskG, VexScalar, EXxmm_md, EXxEVexS, CMP }, 0 },
+ { "vcmpss", { MaskG, VexScalar, EXd, EXxEVexS, CMP }, 0 },
},
/* EVEX_W_0FC2_P_3 */
{
{ Bad_Opcode },
- { "vcmpsd", { MaskG, VexScalar, EXxmm_mq, EXxEVexS, CMP }, 0 },
+ { "vcmpsd", { MaskG, VexScalar, EXq, EXxEVexS, CMP }, 0 },
},
/* EVEX_W_0FD2 */
{
@@ -382,8 +382,8 @@
},
/* EVEX_W_0F3819_L_n */
{
- { "vbroadcastf32x2", { XM, EXxmm_mq }, PREFIX_DATA },
- { "vbroadcastsd", { XM, EXxmm_mq }, PREFIX_DATA },
+ { "vbroadcastf32x2", { XM, EXq }, PREFIX_DATA },
+ { "vbroadcastsd", { XM, EXq }, PREFIX_DATA },
},
/* EVEX_W_0F381A_M_0_L_n */
{
@@ -499,8 +499,8 @@
},
/* EVEX_W_0F3859 */
{
- { "vbroadcasti32x2", { XM, EXxmm_mq }, PREFIX_DATA },
- { "vpbroadcastq", { XM, EXxmm_mq }, PREFIX_DATA },
+ { "vbroadcasti32x2", { XM, EXq }, PREFIX_DATA },
+ { "vpbroadcastq", { XM, EXq }, PREFIX_DATA },
},
/* EVEX_W_0F385A_M_0_L_n */
{
@@ -561,12 +561,12 @@
},
/* EVEX_W_0F3A0A */
{
- { "vrndscaless", { XMScalar, VexScalar, EXxmm_md, EXxEVexS, Ib }, PREFIX_DATA },
+ { "vrndscaless", { XMScalar, VexScalar, EXd, EXxEVexS, Ib }, PREFIX_DATA },
},
/* EVEX_W_0F3A0B */
{
{ Bad_Opcode },
- { "vrndscalesd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexS, Ib }, PREFIX_DATA },
+ { "vrndscalesd", { XMScalar, VexScalar, EXq, EXxEVexS, Ib }, PREFIX_DATA },
},
/* EVEX_W_0F3A18_L_n */
{
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index e750c94704a..27b6b8e8f44 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -352,6 +352,7 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
#define EMd { OP_EM, d_mode }
#define EMx { OP_EM, x_mode }
#define EXbwUnit { OP_EX, bw_unit_mode }
+#define EXb { OP_EX, b_mode }
#define EXw { OP_EX, w_mode }
#define EXd { OP_EX, d_mode }
#define EXdS { OP_EX, d_swap_mode }
@@ -364,10 +365,6 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
#define EXtmm { OP_EX, tmm_mode }
#define EXxmmq { OP_EX, xmmq_mode }
#define EXEvexHalfBcstXmmq { OP_EX, evex_half_bcst_xmmq_mode }
-#define EXxmm_mb { OP_EX, xmm_mb_mode }
-#define EXxmm_mw { OP_EX, xmm_mw_mode }
-#define EXxmm_md { OP_EX, xmm_md_mode }
-#define EXxmm_mq { OP_EX, xmm_mq_mode }
#define EXxmmdw { OP_EX, xmmdw_mode }
#define EXxmmqd { OP_EX, xmmqd_mode }
#define EXymmq { OP_EX, ymmq_mode }
@@ -488,14 +485,6 @@ enum
xmmq_mode,
/* Same as xmmq_mode, but broadcast is allowed. */
evex_half_bcst_xmmq_mode,
- /* XMM register or byte memory operand */
- xmm_mb_mode,
- /* XMM register or word memory operand */
- xmm_mw_mode,
- /* XMM register or double word memory operand */
- xmm_md_mode,
- /* XMM register or quad word memory operand */
- xmm_mq_mode,
/* 16-byte XMM, word, double word or quad word operand. */
xmmdw_mode,
/* 16-byte XMM, double word, quad word operand or xmm word operand. */
@@ -3610,9 +3599,9 @@ static const struct dis386 prefix_table[][4] = {
/* PREFIX_VEX_0F10 */
{
{ "vmovups", { XM, EXx }, 0 },
- { "vmovss", { XMScalar, VexScalarR, EXxmm_md }, 0 },
+ { "vmovss", { XMScalar, VexScalarR, EXd }, 0 },
{ "vmovupd", { XM, EXx }, 0 },
- { "vmovsd", { XMScalar, VexScalarR, EXxmm_mq }, 0 },
+ { "vmovsd", { XMScalar, VexScalarR, EXq }, 0 },
},
/* PREFIX_VEX_0F11 */
@@ -3649,31 +3638,31 @@ static const struct dis386 prefix_table[][4] = {
/* PREFIX_VEX_0F2C */
{
{ Bad_Opcode },
- { "vcvttss2si", { Gdq, EXxmm_md, EXxEVexS }, 0 },
+ { "vcvttss2si", { Gdq, EXd, EXxEVexS }, 0 },
{ Bad_Opcode },
- { "vcvttsd2si", { Gdq, EXxmm_mq, EXxEVexS }, 0 },
+ { "vcvttsd2si", { Gdq, EXq, EXxEVexS }, 0 },
},
/* PREFIX_VEX_0F2D */
{
{ Bad_Opcode },
- { "vcvtss2si", { Gdq, EXxmm_md, EXxEVexR }, 0 },
+ { "vcvtss2si", { Gdq, EXd, EXxEVexR }, 0 },
{ Bad_Opcode },
- { "vcvtsd2si", { Gdq, EXxmm_mq, EXxEVexR }, 0 },
+ { "vcvtsd2si", { Gdq, EXq, EXxEVexR }, 0 },
},
/* PREFIX_VEX_0F2E */
{
- { "vucomisX", { XMScalar, EXxmm_md, EXxEVexS }, PREFIX_OPCODE },
+ { "vucomisX", { XMScalar, EXd, EXxEVexS }, PREFIX_OPCODE },
{ Bad_Opcode },
- { "vucomisX", { XMScalar, EXxmm_mq, EXxEVexS }, PREFIX_OPCODE },
+ { "vucomisX", { XMScalar, EXq, EXxEVexS }, PREFIX_OPCODE },
},
/* PREFIX_VEX_0F2F */
{
- { "vcomisX", { XMScalar, EXxmm_md, EXxEVexS }, PREFIX_OPCODE },
+ { "vcomisX", { XMScalar, EXd, EXxEVexS }, PREFIX_OPCODE },
{ Bad_Opcode },
- { "vcomisX", { XMScalar, EXxmm_mq, EXxEVexS }, PREFIX_OPCODE },
+ { "vcomisX", { XMScalar, EXq, EXxEVexS }, PREFIX_OPCODE },
},
/* PREFIX_VEX_0F41_L_1_M_1_W_0 */
@@ -3789,45 +3778,45 @@ static const struct dis386 prefix_table[][4] = {
/* PREFIX_VEX_0F51 */
{
{ "vsqrtps", { XM, EXx }, 0 },
- { "vsqrtss", { XMScalar, VexScalar, EXxmm_md }, 0 },
+ { "vsqrtss", { XMScalar, VexScalar, EXd }, 0 },
{ "vsqrtpd", { XM, EXx }, 0 },
- { "vsqrtsd", { XMScalar, VexScalar, EXxmm_mq }, 0 },
+ { "vsqrtsd", { XMScalar, VexScalar, EXq }, 0 },
},
/* PREFIX_VEX_0F52 */
{
{ "vrsqrtps", { XM, EXx }, 0 },
- { "vrsqrtss", { XMScalar, VexScalar, EXxmm_md }, 0 },
+ { "vrsqrtss", { XMScalar, VexScalar, EXd }, 0 },
},
/* PREFIX_VEX_0F53 */
{
{ "vrcpps", { XM, EXx }, 0 },
- { "vrcpss", { XMScalar, VexScalar, EXxmm_md }, 0 },
+ { "vrcpss", { XMScalar, VexScalar, EXd }, 0 },
},
/* PREFIX_VEX_0F58 */
{
{ "vaddps", { XM, Vex, EXx }, 0 },
- { "vaddss", { XMScalar, VexScalar, EXxmm_md }, 0 },
+ { "vaddss", { XMScalar, VexScalar, EXd }, 0 },
{ "vaddpd", { XM, Vex, EXx }, 0 },
- { "vaddsd", { XMScalar, VexScalar, EXxmm_mq }, 0 },
+ { "vaddsd", { XMScalar, VexScalar, EXq }, 0 },
},
/* PREFIX_VEX_0F59 */
{
{ "vmulps", { XM, Vex, EXx }, 0 },
- { "vmulss", { XMScalar, VexScalar, EXxmm_md }, 0 },
+ { "vmulss", { XMScalar, VexScalar, EXd }, 0 },
{ "vmulpd", { XM, Vex, EXx }, 0 },
- { "vmulsd", { XMScalar, VexScalar, EXxmm_mq }, 0 },
+ { "vmulsd", { XMScalar, VexScalar, EXq }, 0 },
},
/* PREFIX_VEX_0F5A */
{
{ "vcvtps2pd", { XM, EXxmmq }, 0 },
- { "vcvtss2sd", { XMScalar, VexScalar, EXxmm_md }, 0 },
+ { "vcvtss2sd", { XMScalar, VexScalar, EXd }, 0 },
{ "vcvtpd2ps%XY",{ XMM, EXx }, 0 },
- { "vcvtsd2ss", { XMScalar, VexScalar, EXxmm_mq }, 0 },
+ { "vcvtsd2ss", { XMScalar, VexScalar, EXq }, 0 },
},
/* PREFIX_VEX_0F5B */
@@ -3840,33 +3829,33 @@ static const struct dis386 prefix_table[][4] = {
/* PREFIX_VEX_0F5C */
{
{ "vsubps", { XM, Vex, EXx }, 0 },
- { "vsubss", { XMScalar, VexScalar, EXxmm_md }, 0 },
+ { "vsubss", { XMScalar, VexScalar, EXd }, 0 },
{ "vsubpd", { XM, Vex, EXx }, 0 },
- { "vsubsd", { XMScalar, VexScalar, EXxmm_mq }, 0 },
+ { "vsubsd", { XMScalar, VexScalar, EXq }, 0 },
},
/* PREFIX_VEX_0F5D */
{
{ "vminps", { XM, Vex, EXx }, 0 },
- { "vminss", { XMScalar, VexScalar, EXxmm_md }, 0 },
+ { "vminss", { XMScalar, VexScalar, EXd }, 0 },
{ "vminpd", { XM, Vex, EXx }, 0 },
- { "vminsd", { XMScalar, VexScalar, EXxmm_mq }, 0 },
+ { "vminsd", { XMScalar, VexScalar, EXq }, 0 },
},
/* PREFIX_VEX_0F5E */
{
{ "vdivps", { XM, Vex, EXx }, 0 },
- { "vdivss", { XMScalar, VexScalar, EXxmm_md }, 0 },
+ { "vdivss", { XMScalar, VexScalar, EXd }, 0 },
{ "vdivpd", { XM, Vex, EXx }, 0 },
- { "vdivsd", { XMScalar, VexScalar, EXxmm_mq }, 0 },
+ { "vdivsd", { XMScalar, VexScalar, EXq }, 0 },
},
/* PREFIX_VEX_0F5F */
{
{ "vmaxps", { XM, Vex, EXx }, 0 },
- { "vmaxss", { XMScalar, VexScalar, EXxmm_md }, 0 },
+ { "vmaxss", { XMScalar, VexScalar, EXd }, 0 },
{ "vmaxpd", { XM, Vex, EXx }, 0 },
- { "vmaxsd", { XMScalar, VexScalar, EXxmm_mq }, 0 },
+ { "vmaxsd", { XMScalar, VexScalar, EXq }, 0 },
},
/* PREFIX_VEX_0F6F */
@@ -4005,9 +3994,9 @@ static const struct dis386 prefix_table[][4] = {
/* PREFIX_VEX_0FC2 */
{
{ "vcmpps", { XM, Vex, EXx, CMP }, 0 },
- { "vcmpss", { XMScalar, VexScalar, EXxmm_md, CMP }, 0 },
+ { "vcmpss", { XMScalar, VexScalar, EXd, CMP }, 0 },
{ "vcmppd", { XM, Vex, EXx, CMP }, 0 },
- { "vcmpsd", { XMScalar, VexScalar, EXxmm_mq, CMP }, 0 },
+ { "vcmpsd", { XMScalar, VexScalar, EXq, CMP }, 0 },
},
/* PREFIX_VEX_0FD0 */
@@ -6441,8 +6430,8 @@ static const struct dis386 vex_table[][256] = {
/* 08 */
{ "vroundps", { XM, EXx, Ib }, PREFIX_DATA },
{ "vroundpd", { XM, EXx, Ib }, PREFIX_DATA },
- { "vroundss", { XMScalar, VexScalar, EXxmm_md, Ib }, PREFIX_DATA },
- { "vroundsd", { XMScalar, VexScalar, EXxmm_mq, Ib }, PREFIX_DATA },
+ { "vroundss", { XMScalar, VexScalar, EXd, Ib }, PREFIX_DATA },
+ { "vroundsd", { XMScalar, VexScalar, EXq, Ib }, PREFIX_DATA },
{ "vblendps", { XM, Vex, EXx, Ib }, PREFIX_DATA },
{ "vblendpd", { XM, Vex, EXx, Ib }, PREFIX_DATA },
{ "vpblendw", { XM, Vex, EXx, Ib }, PREFIX_DATA },
@@ -6549,12 +6538,12 @@ static const struct dis386 vex_table[][256] = {
/* 68 */
{ "vfmaddps", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA },
{ "vfmaddpd", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA },
- { "vfmaddss", { XMScalar, VexScalar, EXxmm_md, XMVexScalarI4 }, PREFIX_DATA },
- { "vfmaddsd", { XMScalar, VexScalar, EXxmm_mq, XMVexScalarI4 }, PREFIX_DATA },
+ { "vfmaddss", { XMScalar, VexScalar, EXd, XMVexScalarI4 }, PREFIX_DATA },
+ { "vfmaddsd", { XMScalar, VexScalar, EXq, XMVexScalarI4 }, PREFIX_DATA },
{ "vfmsubps", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA },
{ "vfmsubpd", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA },
- { "vfmsubss", { XMScalar, VexScalar, EXxmm_md, XMVexScalarI4 }, PREFIX_DATA },
- { "vfmsubsd", { XMScalar, VexScalar, EXxmm_mq, XMVexScalarI4 }, PREFIX_DATA },
+ { "vfmsubss", { XMScalar, VexScalar, EXd, XMVexScalarI4 }, PREFIX_DATA },
+ { "vfmsubsd", { XMScalar, VexScalar, EXq, XMVexScalarI4 }, PREFIX_DATA },
/* 70 */
{ Bad_Opcode },
{ Bad_Opcode },
@@ -6567,12 +6556,12 @@ static const struct dis386 vex_table[][256] = {
/* 78 */
{ "vfnmaddps", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA },
{ "vfnmaddpd", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA },
- { "vfnmaddss", { XMScalar, VexScalar, EXxmm_md, XMVexScalarI4 }, PREFIX_DATA },
- { "vfnmaddsd", { XMScalar, VexScalar, EXxmm_mq, XMVexScalarI4 }, PREFIX_DATA },
+ { "vfnmaddss", { XMScalar, VexScalar, EXd, XMVexScalarI4 }, PREFIX_DATA },
+ { "vfnmaddsd", { XMScalar, VexScalar, EXq, XMVexScalarI4 }, PREFIX_DATA },
{ "vfnmsubps", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA },
{ "vfnmsubpd", { XM, Vex, EXx, XMVexI4 }, PREFIX_DATA },
- { "vfnmsubss", { XMScalar, VexScalar, EXxmm_md, XMVexScalarI4 }, PREFIX_DATA },
- { "vfnmsubsd", { XMScalar, VexScalar, EXxmm_mq, XMVexScalarI4 }, PREFIX_DATA },
+ { "vfnmsubss", { XMScalar, VexScalar, EXd, XMVexScalarI4 }, PREFIX_DATA },
+ { "vfnmsubsd", { XMScalar, VexScalar, EXq, XMVexScalarI4 }, PREFIX_DATA },
/* 80 */
{ Bad_Opcode },
{ Bad_Opcode },
@@ -6813,7 +6802,7 @@ static const struct dis386 vex_len_table[][2] = {
/* VEX_LEN_0F7E_P_1 */
{
- { "vmovq", { XMScalar, EXxmm_mq }, 0 },
+ { "vmovq", { XMScalar, EXq }, 0 },
},
/* VEX_LEN_0F7E_P_2 */
@@ -7533,11 +7522,11 @@ static const struct dis386 vex_w_table[][2] = {
},
{
/* VEX_W_0F3818 */
- { "vbroadcastss", { XM, EXxmm_md }, PREFIX_DATA },
+ { "vbroadcastss", { XM, EXd }, PREFIX_DATA },
},
{
/* VEX_W_0F3819_L_1 */
- { "vbroadcastsd", { XM, EXxmm_mq }, PREFIX_DATA },
+ { "vbroadcastsd", { XM, EXq }, PREFIX_DATA },
},
{
/* VEX_W_0F381A_M_0_L_1 */
@@ -7609,11 +7598,11 @@ static const struct dis386 vex_w_table[][2] = {
},
{
/* VEX_W_0F3858 */
- { "vpbroadcastd", { XM, EXxmm_md }, PREFIX_DATA },
+ { "vpbroadcastd", { XM, EXd }, PREFIX_DATA },
},
{
/* VEX_W_0F3859 */
- { "vpbroadcastq", { XM, EXxmm_mq }, PREFIX_DATA },
+ { "vpbroadcastq", { XM, EXq }, PREFIX_DATA },
},
{
/* VEX_W_0F385A_M_0_L_0 */
@@ -7641,11 +7630,11 @@ static const struct dis386 vex_w_table[][2] = {
},
{
/* VEX_W_0F3878 */
- { "vpbroadcastb", { XM, EXxmm_mb }, PREFIX_DATA },
+ { "vpbroadcastb", { XM, EXb }, PREFIX_DATA },
},
{
/* VEX_W_0F3879 */
- { "vpbroadcastw", { XM, EXxmm_mw }, PREFIX_DATA },
+ { "vpbroadcastw", { XM, EXw }, PREFIX_DATA },
},
{
/* VEX_W_0F38CF */
@@ -11107,66 +11096,6 @@ intel_operand_size (int bytemode, int sizeflag)
abort ();
}
break;
- case xmm_mb_mode:
- if (!need_vex)
- abort ();
-
- switch (vex.length)
- {
- case 128:
- case 256:
- case 512:
- oappend ("BYTE PTR ");
- break;
- default:
- abort ();
- }
- break;
- case xmm_mw_mode:
- if (!need_vex)
- abort ();
-
- switch (vex.length)
- {
- case 128:
- case 256:
- case 512:
- oappend ("WORD PTR ");
- break;
- default:
- abort ();
- }
- break;
- case xmm_md_mode:
- if (!need_vex)
- abort ();
-
- switch (vex.length)
- {
- case 128:
- case 256:
- case 512:
- oappend ("DWORD PTR ");
- break;
- default:
- abort ();
- }
- break;
- case xmm_mq_mode:
- if (!need_vex)
- abort ();
-
- switch (vex.length)
- {
- case 128:
- case 256:
- case 512:
- oappend ("QWORD PTR ");
- break;
- default:
- abort ();
- }
- break;
case xmmdw_mode:
if (!need_vex)
abort ();
@@ -11424,19 +11353,18 @@ OP_E_memory (int bytemode, int sizeflag)
{
case dqw_mode:
case dw_mode:
- case xmm_mw_mode:
+ case w_mode:
shift = 1;
break;
case dqb_mode:
case db_mode:
- case xmm_mb_mode:
+ case b_mode:
shift = 0;
break;
case dq_mode:
if (address_mode != mode_64bit)
{
case dqd_mode:
- case xmm_md_mode:
case d_mode:
case d_swap_mode:
shift = 2;
@@ -11493,7 +11421,6 @@ OP_E_memory (int bytemode, int sizeflag)
case xmm_mode:
shift = 4;
break;
- case xmm_mq_mode:
case q_mode:
case q_swap_mode:
shift = 3;
@@ -12566,10 +12493,10 @@ print_vector_reg (unsigned int reg, int bytemode)
&& bytemode != scalar_mode
&& bytemode != xmmdw_mode
&& bytemode != xmmqd_mode
- && bytemode != xmm_mb_mode
- && bytemode != xmm_mw_mode
- && bytemode != xmm_md_mode
- && bytemode != xmm_mq_mode
+ && bytemode != b_mode
+ && bytemode != w_mode
+ && bytemode != d_mode
+ && bytemode != q_mode
&& bytemode != vex_scalar_w_dq_mode)
{
switch (vex.length)
--
2.33.0

302
0012-x86-drop-vex_scalar_w_dq_mode.patch
View File

@ -1,302 +0,0 @@
From eb34d29be8766b7466becebdd94e8121e88a44d4 Mon Sep 17 00:00:00 2001
From: Jan Beulich <jbeulich@suse.com>
Date: Thu, 22 Jul 2021 13:09:03 +0200
Subject: [PATCH] x86: drop vex_scalar_w_dq_mode
It has only a single use and can easily be represented by dq_mode
instead. Plus its handling in intel_operand_size() was duplicating
that of vex_vsib_{d,q}_w_dq_mode anyway.
diff --git a/opcodes/i386-dis-evex-prefix.h b/opcodes/i386-dis-evex-prefix.h
index 417eb1bfbff..5c24618bec4 100644
--- a/opcodes/i386-dis-evex-prefix.h
+++ b/opcodes/i386-dis-evex-prefix.h
@@ -358,7 +358,7 @@
{
{ Bad_Opcode },
{ Bad_Opcode },
- { "vfmsub132s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 },
+ { "vfmsub132s%XW", { XMScalar, VexScalar, EXdq, EXxEVexR }, 0 },
{ "v4fmaddss", { XMScalar, VexScalar, Mxmm }, 0 },
},
/* PREFIX_EVEX_0F38AA */
@@ -372,6 +372,6 @@
{
{ Bad_Opcode },
{ Bad_Opcode },
- { "vfmsub213s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 },
+ { "vfmsub213s%XW", { XMScalar, VexScalar, EXdq, EXxEVexR }, 0 },
{ "v4fnmaddss", { XMScalar, VexScalar, Mxmm }, 0 },
},
diff --git a/opcodes/i386-dis-evex.h b/opcodes/i386-dis-evex.h
index 5f1ebaded85..287c7a84635 100644
--- a/opcodes/i386-dis-evex.h
+++ b/opcodes/i386-dis-evex.h
@@ -343,7 +343,7 @@ static const struct dis386 evex_table[][256] = {
{ PREFIX_TABLE (PREFIX_EVEX_0F382A) },
{ VEX_W_TABLE (EVEX_W_0F382B) },
{ "vscalefp%XW", { XM, Vex, EXx, EXxEVexR }, PREFIX_DATA },
- { "vscalefs%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, PREFIX_DATA },
+ { "vscalefs%XW", { XMScalar, VexScalar, EXdq, EXxEVexR }, PREFIX_DATA },
{ Bad_Opcode },
{ Bad_Opcode },
/* 30 */
@@ -368,7 +368,7 @@ static const struct dis386 evex_table[][256] = {
{ "vpmull%DQ", { XM, Vex, EXx }, PREFIX_DATA },
{ Bad_Opcode },
{ "vgetexpp%XW", { XM, EXx, EXxEVexS }, PREFIX_DATA },
- { "vgetexps%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexS }, PREFIX_DATA },
+ { "vgetexps%XW", { XMScalar, VexScalar, EXdq, EXxEVexS }, PREFIX_DATA },
{ "vplzcnt%DQ", { XM, EXx }, PREFIX_DATA },
{ "vpsrlv%DQ", { XM, Vex, EXx }, PREFIX_DATA },
{ "vpsrav%DQ", { XM, Vex, EXx }, PREFIX_DATA },
@@ -379,9 +379,9 @@ static const struct dis386 evex_table[][256] = {
{ Bad_Opcode },
{ Bad_Opcode },
{ "vrcp14p%XW", { XM, EXx }, PREFIX_DATA },
- { "vrcp14s%XW", { XMScalar, VexScalar, EXVexWdqScalar }, PREFIX_DATA },
+ { "vrcp14s%XW", { XMScalar, VexScalar, EXdq }, PREFIX_DATA },
{ "vrsqrt14p%XW", { XM, EXx }, 0 },
- { "vrsqrt14s%XW", { XMScalar, VexScalar, EXVexWdqScalar }, PREFIX_DATA },
+ { "vrsqrt14s%XW", { XMScalar, VexScalar, EXdq }, PREFIX_DATA },
/* 50 */
{ "vpdpbusd", { XM, Vex, EXx }, PREFIX_DATA },
{ "vpdpbusds", { XM, Vex, EXx }, PREFIX_DATA },
@@ -465,13 +465,13 @@ static const struct dis386 evex_table[][256] = {
{ "vfmsubadd132p%XW", { XM, Vex, EXx, EXxEVexR }, PREFIX_DATA },
/* 98 */
{ "vfmadd132p%XW", { XM, Vex, EXx, EXxEVexR }, PREFIX_DATA },
- { "vfmadd132s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, PREFIX_DATA },
+ { "vfmadd132s%XW", { XMScalar, VexScalar, EXdq, EXxEVexR }, PREFIX_DATA },
{ PREFIX_TABLE (PREFIX_EVEX_0F389A) },
{ PREFIX_TABLE (PREFIX_EVEX_0F389B) },
{ "vfnmadd132p%XW", { XM, Vex, EXx, EXxEVexR }, PREFIX_DATA },
- { "vfnmadd132s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, PREFIX_DATA },
+ { "vfnmadd132s%XW", { XMScalar, VexScalar, EXdq, EXxEVexR }, PREFIX_DATA },
{ "vfnmsub132p%XW", { XM, Vex, EXx, EXxEVexR }, PREFIX_DATA },
- { "vfnmsub132s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, PREFIX_DATA },
+ { "vfnmsub132s%XW", { XMScalar, VexScalar, EXdq, EXxEVexR }, PREFIX_DATA },
/* A0 */
{ "vpscatterd%DQ", { MVexVSIBDWpX, XM }, PREFIX_DATA },
{ "vpscatterq%DQ", { MVexVSIBQWpX, XMGatherQ }, PREFIX_DATA },
@@ -483,13 +483,13 @@ static const struct dis386 evex_table[][256] = {
{ "vfmsubadd213p%XW", { XM, Vex, EXx, EXxEVexR }, PREFIX_DATA },
/* A8 */
{ "vfmadd213p%XW", { XM, Vex, EXx, EXxEVexR }, PREFIX_DATA },
- { "vfmadd213s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, PREFIX_DATA },
+ { "vfmadd213s%XW", { XMScalar, VexScalar, EXdq, EXxEVexR }, PREFIX_DATA },
{ PREFIX_TABLE (PREFIX_EVEX_0F38AA) },
{ PREFIX_TABLE (PREFIX_EVEX_0F38AB) },
{ "vfnmadd213p%XW", { XM, Vex, EXx, EXxEVexR }, PREFIX_DATA },
- { "vfnmadd213s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, PREFIX_DATA },
+ { "vfnmadd213s%XW", { XMScalar, VexScalar, EXdq, EXxEVexR }, PREFIX_DATA },
{ "vfnmsub213p%XW", { XM, Vex, EXx, EXxEVexR }, PREFIX_DATA },
- { "vfnmsub213s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, PREFIX_DATA },
+ { "vfnmsub213s%XW", { XMScalar, VexScalar, EXdq, EXxEVexR }, PREFIX_DATA },
/* B0 */
{ Bad_Opcode },
{ Bad_Opcode },
@@ -501,13 +501,13 @@ static const struct dis386 evex_table[][256] = {
{ "vfmsubadd231p%XW", { XM, Vex, EXx, EXxEVexR }, PREFIX_DATA },
/* B8 */
{ "vfmadd231p%XW", { XM, Vex, EXx, EXxEVexR }, PREFIX_DATA },
- { "vfmadd231s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, PREFIX_DATA },
+ { "vfmadd231s%XW", { XMScalar, VexScalar, EXdq, EXxEVexR }, PREFIX_DATA },
{ "vfmsub231p%XW", { XM, Vex, EXx, EXxEVexR }, PREFIX_DATA },
- { "vfmsub231s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, PREFIX_DATA },
+ { "vfmsub231s%XW", { XMScalar, VexScalar, EXdq, EXxEVexR }, PREFIX_DATA },
{ "vfnmadd231p%XW", { XM, Vex, EXx, EXxEVexR }, PREFIX_DATA },
- { "vfnmadd231s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, PREFIX_DATA },
+ { "vfnmadd231s%XW", { XMScalar, VexScalar, EXdq, EXxEVexR }, PREFIX_DATA },
{ "vfnmsub231p%XW", { XM, Vex, EXx, EXxEVexR }, PREFIX_DATA },
- { "vfnmsub231s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, PREFIX_DATA },
+ { "vfnmsub231s%XW", { XMScalar, VexScalar, EXdq, EXxEVexR }, PREFIX_DATA },
/* C0 */
{ Bad_Opcode },
{ Bad_Opcode },
@@ -521,9 +521,9 @@ static const struct dis386 evex_table[][256] = {
{ "vexp2p%XW", { XM, EXx, EXxEVexS }, PREFIX_DATA },
{ Bad_Opcode },
{ "vrcp28p%XW", { XM, EXx, EXxEVexS }, PREFIX_DATA },
- { "vrcp28s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexS }, PREFIX_DATA },
+ { "vrcp28s%XW", { XMScalar, VexScalar, EXdq, EXxEVexS }, PREFIX_DATA },
{ "vrsqrt28p%XW", { XM, EXx, EXxEVexS }, PREFIX_DATA },
- { "vrsqrt28s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexS }, PREFIX_DATA },
+ { "vrsqrt28s%XW", { XMScalar, VexScalar, EXdq, EXxEVexS }, PREFIX_DATA },
{ Bad_Opcode },
{ VEX_W_TABLE (VEX_W_0F38CF) },
/* D0 */
@@ -627,7 +627,7 @@ static const struct dis386 evex_table[][256] = {
{ Bad_Opcode },
{ "vpternlog%DQ", { XM, Vex, EXx, Ib }, PREFIX_DATA },
{ "vgetmantp%XW", { XM, EXx, EXxEVexS, Ib }, PREFIX_DATA },
- { "vgetmants%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexS, Ib }, PREFIX_DATA },
+ { "vgetmants%XW", { XMScalar, VexScalar, EXdq, EXxEVexS, Ib }, PREFIX_DATA },
/* 28 */
{ Bad_Opcode },
{ Bad_Opcode },
@@ -675,13 +675,13 @@ static const struct dis386 evex_table[][256] = {
{ Bad_Opcode },
/* 50 */
{ "vrangep%XW", { XM, Vex, EXx, EXxEVexS, Ib }, PREFIX_DATA },
- { "vranges%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexS, Ib }, PREFIX_DATA },
+ { "vranges%XW", { XMScalar, VexScalar, EXdq, EXxEVexS, Ib }, PREFIX_DATA },
{ Bad_Opcode },
{ Bad_Opcode },
{ "vfixupimmp%XW", { XM, Vex, EXx, EXxEVexS, Ib }, PREFIX_DATA },
- { "vfixupimms%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexS, Ib }, PREFIX_DATA },
+ { "vfixupimms%XW", { XMScalar, VexScalar, EXdq, EXxEVexS, Ib }, PREFIX_DATA },
{ "vreducep%XW", { XM, EXx, EXxEVexS, Ib }, PREFIX_DATA },
- { "vreduces%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexS, Ib }, PREFIX_DATA },
+ { "vreduces%XW", { XMScalar, VexScalar, EXdq, EXxEVexS, Ib }, PREFIX_DATA },
/* 58 */
{ Bad_Opcode },
{ Bad_Opcode },
@@ -699,7 +699,7 @@ static const struct dis386 evex_table[][256] = {
{ Bad_Opcode },
{ Bad_Opcode },
{ "vfpclassp%XW%XZ", { MaskG, EXx, Ib }, PREFIX_DATA },
- { "vfpclasss%XW", { MaskG, EXVexWdqScalar, Ib }, PREFIX_DATA },
+ { "vfpclasss%XW", { MaskG, EXdq, Ib }, PREFIX_DATA },
/* 68 */
{ Bad_Opcode },
{ Bad_Opcode },
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 27b6b8e8f44..6efc15b851b 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -358,6 +358,7 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
#define EXdS { OP_EX, d_swap_mode }
#define EXq { OP_EX, q_mode }
#define EXqS { OP_EX, q_swap_mode }
+#define EXdq { OP_EX, dq_mode }
#define EXx { OP_EX, x_mode }
#define EXxS { OP_EX, x_swap_mode }
#define EXxmm { OP_EX, xmm_mode }
@@ -368,7 +369,6 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
#define EXxmmdw { OP_EX, xmmdw_mode }
#define EXxmmqd { OP_EX, xmmqd_mode }
#define EXymmq { OP_EX, ymmq_mode }
-#define EXVexWdqScalar { OP_EX, vex_scalar_w_dq_mode }
#define EXEvexXGscat { OP_EX, evex_x_gscat_mode }
#define EXEvexXNoBcst { OP_EX, evex_x_nobcst_mode }
#define MS { OP_MS, v_mode }
@@ -507,7 +507,7 @@ enum
v_bnd_mode,
/* like v_bnd_mode in 32bit, no RIP-rel in 64bit mode. */
v_bndmk_mode,
- /* operand size depends on REX prefixes. */
+ /* operand size depends on REX.W / VEX.W. */
dq_mode,
/* registers like dq_mode, memory like w_mode, displacements like
v_mode without considering Intel64 ISA. */
@@ -545,8 +545,6 @@ enum
/* scalar, ignore vector length. */
scalar_mode,
- /* Operand size depends on the VEX.W bit, ignore vector length. */
- vex_scalar_w_dq_mode,
/* Static rounding. */
evex_rounding_mode,
@@ -6300,13 +6298,13 @@ static const struct dis386 vex_table[][256] = {
{ "vfmsubadd132p%XW", { XM, Vex, EXx }, PREFIX_DATA },
/* 98 */
{ "vfmadd132p%XW", { XM, Vex, EXx }, PREFIX_DATA },
- { "vfmadd132s%XW", { XMScalar, VexScalar, EXVexWdqScalar }, PREFIX_DATA },
+ { "vfmadd132s%XW", { XMScalar, VexScalar, EXdq }, PREFIX_DATA },
{ "vfmsub132p%XW", { XM, Vex, EXx }, PREFIX_DATA },
- { "vfmsub132s%XW", { XMScalar, VexScalar, EXVexWdqScalar }, PREFIX_DATA },
+ { "vfmsub132s%XW", { XMScalar, VexScalar, EXdq }, PREFIX_DATA },
{ "vfnmadd132p%XW", { XM, Vex, EXx }, PREFIX_DATA },
- { "vfnmadd132s%XW", { XMScalar, VexScalar, EXVexWdqScalar }, PREFIX_DATA },
+ { "vfnmadd132s%XW", { XMScalar, VexScalar, EXdq }, PREFIX_DATA },
{ "vfnmsub132p%XW", { XM, Vex, EXx }, PREFIX_DATA },
- { "vfnmsub132s%XW", { XMScalar, VexScalar, EXVexWdqScalar }, PREFIX_DATA },
+ { "vfnmsub132s%XW", { XMScalar, VexScalar, EXdq }, PREFIX_DATA },
/* a0 */
{ Bad_Opcode },
{ Bad_Opcode },
@@ -6318,13 +6316,13 @@ static const struct dis386 vex_table[][256] = {
{ "vfmsubadd213p%XW", { XM, Vex, EXx }, PREFIX_DATA },
/* a8 */
{ "vfmadd213p%XW", { XM, Vex, EXx }, PREFIX_DATA },
- { "vfmadd213s%XW", { XMScalar, VexScalar, EXVexWdqScalar }, PREFIX_DATA },
+ { "vfmadd213s%XW", { XMScalar, VexScalar, EXdq }, PREFIX_DATA },
{ "vfmsub213p%XW", { XM, Vex, EXx }, PREFIX_DATA },
- { "vfmsub213s%XW", { XMScalar, VexScalar, EXVexWdqScalar }, PREFIX_DATA },
+ { "vfmsub213s%XW", { XMScalar, VexScalar, EXdq }, PREFIX_DATA },
{ "vfnmadd213p%XW", { XM, Vex, EXx }, PREFIX_DATA },
- { "vfnmadd213s%XW", { XMScalar, VexScalar, EXVexWdqScalar }, PREFIX_DATA },
+ { "vfnmadd213s%XW", { XMScalar, VexScalar, EXdq }, PREFIX_DATA },
{ "vfnmsub213p%XW", { XM, Vex, EXx }, PREFIX_DATA },
- { "vfnmsub213s%XW", { XMScalar, VexScalar, EXVexWdqScalar }, PREFIX_DATA },
+ { "vfnmsub213s%XW", { XMScalar, VexScalar, EXdq }, PREFIX_DATA },
/* b0 */
{ Bad_Opcode },
{ Bad_Opcode },
@@ -6336,13 +6334,13 @@ static const struct dis386 vex_table[][256] = {
{ "vfmsubadd231p%XW", { XM, Vex, EXx }, PREFIX_DATA },
/* b8 */
{ "vfmadd231p%XW", { XM, Vex, EXx }, PREFIX_DATA },
- { "vfmadd231s%XW", { XMScalar, VexScalar, EXVexWdqScalar }, PREFIX_DATA },
+ { "vfmadd231s%XW", { XMScalar, VexScalar, EXdq }, PREFIX_DATA },
{ "vfmsub231p%XW", { XM, Vex, EXx }, PREFIX_DATA },
- { "vfmsub231s%XW", { XMScalar, VexScalar, EXVexWdqScalar }, PREFIX_DATA },
+ { "vfmsub231s%XW", { XMScalar, VexScalar, EXdq }, PREFIX_DATA },
{ "vfnmadd231p%XW", { XM, Vex, EXx }, PREFIX_DATA },
- { "vfnmadd231s%XW", { XMScalar, VexScalar, EXVexWdqScalar }, PREFIX_DATA },
+ { "vfnmadd231s%XW", { XMScalar, VexScalar, EXdq }, PREFIX_DATA },
{ "vfnmsub231p%XW", { XM, Vex, EXx }, PREFIX_DATA },
- { "vfnmsub231s%XW", { XMScalar, VexScalar, EXVexWdqScalar }, PREFIX_DATA },
+ { "vfnmsub231s%XW", { XMScalar, VexScalar, EXdq }, PREFIX_DATA },
/* c0 */
{ Bad_Opcode },
{ Bad_Opcode },
@@ -11170,15 +11168,6 @@ intel_operand_size (int bytemode, int sizeflag)
case o_mode:
oappend ("OWORD PTR ");
break;
- case vex_scalar_w_dq_mode:
- if (!need_vex)
- abort ();
-
- if (vex.w)
- oappend ("QWORD PTR ");
- else
- oappend ("DWORD PTR ");
- break;
case vex_vsib_d_w_dq_mode:
case vex_vsib_q_w_dq_mode:
if (!need_vex)
@@ -11371,7 +11360,6 @@ OP_E_memory (int bytemode, int sizeflag)
break;
}
/* fall through */
- case vex_scalar_w_dq_mode:
case vex_vsib_d_w_dq_mode:
case vex_vsib_q_w_dq_mode:
case evex_x_gscat_mode:
@@ -12496,8 +12484,7 @@ print_vector_reg (unsigned int reg, int bytemode)
&& bytemode != b_mode
&& bytemode != w_mode
&& bytemode != d_mode
- && bytemode != q_mode
- && bytemode != vex_scalar_w_dq_mode)
+ && bytemode != q_mode)
{
switch (vex.length)
{
@@ -12627,6 +12614,9 @@ OP_EX (int bytemode, int sizeflag)
MODRM_CHECK;
codep++;
+ if (bytemode == dq_mode)
+ bytemode = vex.w ? q_mode : d_mode;
+
if (modrm.mod != 3)
{
OP_E_memory (bytemode, sizeflag);
--
2.33.0

528
0013-x86-drop-dq-b-d-_mode.patch
View File

@ -1,528 +0,0 @@
From 5fbe0f28ae6dec9736e504cf79cdb76a9fa09dc9 Mon Sep 17 00:00:00 2001
From: Jan Beulich <jbeulich@suse.com>
Date: Thu, 22 Jul 2021 13:09:21 +0200
Subject: [PATCH] x86: drop dq{b,d}_mode
Their sole use is for {,V}EXTRACTPS / {,V}P{EXT,INS}RB respectively; for
consistency also limit use of dqw_mode to Jdqw. 64-bit disassembly
reflecting REX.W / VEX.W is not in line with the assembler's opcode
table having NoRex64 / VexWIG in all respective templates, i.e. assembly
input isn't being honored there either. Obviously the 0FC5 encodings of
{,V}PEXTRW then also need adjustment for consistency reasons.
diff --git a/gas/testsuite/gas/i386/x86-64-avx-wig.d b/gas/testsuite/gas/i386/x86-64-avx-wig.d
index 14edfb3de7d..2144746bdf0 100644
--- a/gas/testsuite/gas/i386/x86-64-avx-wig.d
+++ b/gas/testsuite/gas/i386/x86-64-avx-wig.d
@@ -58,7 +58,7 @@ Disassembly of section .text:
+[a-f0-9]+: c4 e1 ca 5e d4 vdivss %xmm4,%xmm6,%xmm2
+[a-f0-9]+: c4 e3 c9 41 d4 07 vdppd \$0x7,%xmm4,%xmm6,%xmm2
+[a-f0-9]+: c4 e3 cd 40 d4 07 vdpps \$0x7,%ymm4,%ymm6,%ymm2
- +[a-f0-9]+: c4 e3 f9 17 e1 07 vextractps \$0x7,%xmm4,%rcx
+ +[a-f0-9]+: c4 e3 f9 17 e1 07 vextractps \$0x7,%xmm4,%ecx
+[a-f0-9]+: c4 e1 cd 7c d4 vhaddpd %ymm4,%ymm6,%ymm2
+[a-f0-9]+: c4 e1 cf 7c d4 vhaddps %ymm4,%ymm6,%ymm2
+[a-f0-9]+: c4 e1 cd 7d d4 vhsubpd %ymm4,%ymm6,%ymm2
@@ -157,10 +157,10 @@ Disassembly of section .text:
+[a-f0-9]+: c4 e1 c9 65 d4 vpcmpgtw %xmm4,%xmm6,%xmm2
+[a-f0-9]+: c4 e3 f9 63 f4 07 vpcmpistri \$0x7,%xmm4,%xmm6
+[a-f0-9]+: c4 e3 f9 62 f4 07 vpcmpistrm \$0x7,%xmm4,%xmm6
- +[a-f0-9]+: c4 e3 f9 14 c0 00 vpextrb \$0x0,%xmm0,%rax
+ +[a-f0-9]+: c4 e3 f9 14 c0 00 vpextrb \$0x0,%xmm0,%eax
+[a-f0-9]+: c4 e3 f9 14 00 00 vpextrb \$0x0,%xmm0,\(%rax\)
- +[a-f0-9]+: c4 e1 f9 c5 c0 00 vpextrw \$0x0,%xmm0,%rax
- +[a-f0-9]+: c4 e3 f9 15 c0 00 vpextrw \$0x0,%xmm0,%rax
+ +[a-f0-9]+: c4 e1 f9 c5 c0 00 vpextrw \$0x0,%xmm0,%eax
+ +[a-f0-9]+: c4 e3 f9 15 c0 00 vpextrw \$0x0,%xmm0,%eax
+[a-f0-9]+: c4 e3 f9 15 00 00 vpextrw \$0x0,%xmm0,\(%rax\)
+[a-f0-9]+: c4 e2 c9 02 d4 vphaddd %xmm4,%xmm6,%xmm2
+[a-f0-9]+: c4 e2 c9 03 d4 vphaddsw %xmm4,%xmm6,%xmm2
@@ -169,9 +169,9 @@ Disassembly of section .text:
+[a-f0-9]+: c4 e2 c9 06 d4 vphsubd %xmm4,%xmm6,%xmm2
+[a-f0-9]+: c4 e2 c9 07 d4 vphsubsw %xmm4,%xmm6,%xmm2
+[a-f0-9]+: c4 e2 c9 05 d4 vphsubw %xmm4,%xmm6,%xmm2
- +[a-f0-9]+: c4 e3 f9 20 c0 00 vpinsrb \$0x0,%rax,%xmm0,%xmm0
+ +[a-f0-9]+: c4 e3 f9 20 c0 00 vpinsrb \$0x0,%eax,%xmm0,%xmm0
+[a-f0-9]+: c4 e3 f9 20 00 00 vpinsrb \$0x0,\(%rax\),%xmm0,%xmm0
- +[a-f0-9]+: c4 e1 f9 c4 c0 00 vpinsrw \$0x0,%rax,%xmm0,%xmm0
+ +[a-f0-9]+: c4 e1 f9 c4 c0 00 vpinsrw \$0x0,%eax,%xmm0,%xmm0
+[a-f0-9]+: c4 e1 f9 c4 00 00 vpinsrw \$0x0,\(%rax\),%xmm0,%xmm0
+[a-f0-9]+: c4 e2 c9 04 d4 vpmaddubsw %xmm4,%xmm6,%xmm2
+[a-f0-9]+: c4 e1 c9 f5 d4 vpmaddwd %xmm4,%xmm6,%xmm2
diff --git a/gas/testsuite/gas/i386/x86-64-avx512bw-wig1-intel.d b/gas/testsuite/gas/i386/x86-64-avx512bw-wig1-intel.d
index 79b0fdc6a1f..3a1141866aa 100644
--- a/gas/testsuite/gas/i386/x86-64-avx512bw-wig1-intel.d
+++ b/gas/testsuite/gas/i386/x86-64-avx512bw-wig1-intel.d
@@ -159,9 +159,9 @@ Disassembly of section \.text:
[ ]*[a-f0-9]+:[ ]*62 f1 8d 40 65 aa 00 20 00 00[ ]*vpcmpgtw k5,zmm30,ZMMWORD PTR \[rdx\+0x2000\]
[ ]*[a-f0-9]+:[ ]*62 f1 8d 40 65 6a 80[ ]*vpcmpgtw k5,zmm30,ZMMWORD PTR \[rdx-0x2000\]
[ ]*[a-f0-9]+:[ ]*62 f1 8d 40 65 aa c0 df ff ff[ ]*vpcmpgtw k5,zmm30,ZMMWORD PTR \[rdx-0x2040\]
-[ ]*[a-f0-9]+:[ ]*62 63 fd 08 14 e8 ab[ ]*vpextrb rax,xmm29,0xab
-[ ]*[a-f0-9]+:[ ]*62 63 fd 08 14 e8 7b[ ]*vpextrb rax,xmm29,0x7b
-[ ]*[a-f0-9]+:[ ]*62 43 fd 08 14 e8 7b[ ]*vpextrb r8,xmm29,0x7b
+[ ]*[a-f0-9]+:[ ]*62 63 fd 08 14 e8 ab[ ]*vpextrb eax,xmm29,0xab
+[ ]*[a-f0-9]+:[ ]*62 63 fd 08 14 e8 7b[ ]*vpextrb eax,xmm29,0x7b
+[ ]*[a-f0-9]+:[ ]*62 43 fd 08 14 e8 7b[ ]*vpextrb r8d,xmm29,0x7b
[ ]*[a-f0-9]+:[ ]*62 63 fd 08 14 29 7b[ ]*vpextrb BYTE PTR \[rcx\],xmm29,0x7b
[ ]*[a-f0-9]+:[ ]*62 23 fd 08 14 ac f0 23 01 00 00 7b[ ]*vpextrb BYTE PTR \[rax\+r14\*8\+0x123\],xmm29,0x7b
[ ]*[a-f0-9]+:[ ]*62 63 fd 08 14 6a 7f 7b[ ]*vpextrb BYTE PTR \[rdx\+0x7f\],xmm29,0x7b
@@ -174,23 +174,23 @@ Disassembly of section \.text:
[ ]*[a-f0-9]+:[ ]*62 63 fd 08 15 aa 00 01 00 00 7b[ ]*vpextrw WORD PTR \[rdx\+0x100\],xmm29,0x7b
[ ]*[a-f0-9]+:[ ]*62 63 fd 08 15 6a 80 7b[ ]*vpextrw WORD PTR \[rdx-0x100\],xmm29,0x7b
[ ]*[a-f0-9]+:[ ]*62 63 fd 08 15 aa fe fe ff ff 7b[ ]*vpextrw WORD PTR \[rdx-0x102\],xmm29,0x7b
-[ ]*[a-f0-9]+:[ ]*62 91 fd 08 c5 c6 ab[ ]*vpextrw rax,xmm30,0xab
-[ ]*[a-f0-9]+:[ ]*62 91 fd 08 c5 c6 7b[ ]*vpextrw rax,xmm30,0x7b
-[ ]*[a-f0-9]+:[ ]*62 11 fd 08 c5 c6 7b[ ]*vpextrw r8,xmm30,0x7b
-[ ]*[a-f0-9]+:[ ]*62 63 95 00 20 f0 ab[ ]*vpinsrb xmm30,xmm29,rax,0xab
-[ ]*[a-f0-9]+:[ ]*62 63 95 00 20 f0 7b[ ]*vpinsrb xmm30,xmm29,rax,0x7b
-[ ]*[a-f0-9]+:[ ]*62 63 95 00 20 f5 7b[ ]*vpinsrb xmm30,xmm29,rbp,0x7b
-[ ]*[a-f0-9]+:[ ]*62 43 95 00 20 f5 7b[ ]*vpinsrb xmm30,xmm29,r13,0x7b
+[ ]*[a-f0-9]+:[ ]*62 91 fd 08 c5 c6 ab[ ]*vpextrw eax,xmm30,0xab
+[ ]*[a-f0-9]+:[ ]*62 91 fd 08 c5 c6 7b[ ]*vpextrw eax,xmm30,0x7b
+[ ]*[a-f0-9]+:[ ]*62 11 fd 08 c5 c6 7b[ ]*vpextrw r8d,xmm30,0x7b
+[ ]*[a-f0-9]+:[ ]*62 63 95 00 20 f0 ab[ ]*vpinsrb xmm30,xmm29,eax,0xab
+[ ]*[a-f0-9]+:[ ]*62 63 95 00 20 f0 7b[ ]*vpinsrb xmm30,xmm29,eax,0x7b
+[ ]*[a-f0-9]+:[ ]*62 63 95 00 20 f5 7b[ ]*vpinsrb xmm30,xmm29,ebp,0x7b
+[ ]*[a-f0-9]+:[ ]*62 43 95 00 20 f5 7b[ ]*vpinsrb xmm30,xmm29,r13d,0x7b
[ ]*[a-f0-9]+:[ ]*62 63 95 00 20 31 7b[ ]*vpinsrb xmm30,xmm29,BYTE PTR \[rcx\],0x7b
[ ]*[a-f0-9]+:[ ]*62 23 95 00 20 b4 f0 23 01 00 00 7b[ ]*vpinsrb xmm30,xmm29,BYTE PTR \[rax\+r14\*8\+0x123\],0x7b
[ ]*[a-f0-9]+:[ ]*62 63 95 00 20 72 7f 7b[ ]*vpinsrb xmm30,xmm29,BYTE PTR \[rdx\+0x7f\],0x7b
[ ]*[a-f0-9]+:[ ]*62 63 95 00 20 b2 80 00 00 00 7b[ ]*vpinsrb xmm30,xmm29,BYTE PTR \[rdx\+0x80\],0x7b
[ ]*[a-f0-9]+:[ ]*62 63 95 00 20 72 80 7b[ ]*vpinsrb xmm30,xmm29,BYTE PTR \[rdx-0x80\],0x7b
[ ]*[a-f0-9]+:[ ]*62 63 95 00 20 b2 7f ff ff ff 7b[ ]*vpinsrb xmm30,xmm29,BYTE PTR \[rdx-0x81\],0x7b
-[ ]*[a-f0-9]+:[ ]*62 61 95 00 c4 f0 ab[ ]*vpinsrw xmm30,xmm29,rax,0xab
-[ ]*[a-f0-9]+:[ ]*62 61 95 00 c4 f0 7b[ ]*vpinsrw xmm30,xmm29,rax,0x7b
-[ ]*[a-f0-9]+:[ ]*62 61 95 00 c4 f5 7b[ ]*vpinsrw xmm30,xmm29,rbp,0x7b
-[ ]*[a-f0-9]+:[ ]*62 41 95 00 c4 f5 7b[ ]*vpinsrw xmm30,xmm29,r13,0x7b
+[ ]*[a-f0-9]+:[ ]*62 61 95 00 c4 f0 ab[ ]*vpinsrw xmm30,xmm29,eax,0xab
+[ ]*[a-f0-9]+:[ ]*62 61 95 00 c4 f0 7b[ ]*vpinsrw xmm30,xmm29,eax,0x7b
+[ ]*[a-f0-9]+:[ ]*62 61 95 00 c4 f5 7b[ ]*vpinsrw xmm30,xmm29,ebp,0x7b
+[ ]*[a-f0-9]+:[ ]*62 41 95 00 c4 f5 7b[ ]*vpinsrw xmm30,xmm29,r13d,0x7b
[ ]*[a-f0-9]+:[ ]*62 61 95 00 c4 31 7b[ ]*vpinsrw xmm30,xmm29,WORD PTR \[rcx\],0x7b
[ ]*[a-f0-9]+:[ ]*62 21 95 00 c4 b4 f0 23 01 00 00 7b[ ]*vpinsrw xmm30,xmm29,WORD PTR \[rax\+r14\*8\+0x123\],0x7b
[ ]*[a-f0-9]+:[ ]*62 61 95 00 c4 72 7f 7b[ ]*vpinsrw xmm30,xmm29,WORD PTR \[rdx\+0xfe\],0x7b
@@ -690,9 +690,9 @@ Disassembly of section \.text:
[ ]*[a-f0-9]+:[ ]*62 f1 8d 40 65 aa 00 20 00 00[ ]*vpcmpgtw k5,zmm30,ZMMWORD PTR \[rdx\+0x2000\]
[ ]*[a-f0-9]+:[ ]*62 f1 8d 40 65 6a 80[ ]*vpcmpgtw k5,zmm30,ZMMWORD PTR \[rdx-0x2000\]
[ ]*[a-f0-9]+:[ ]*62 f1 8d 40 65 aa c0 df ff ff[ ]*vpcmpgtw k5,zmm30,ZMMWORD PTR \[rdx-0x2040\]
-[ ]*[a-f0-9]+:[ ]*62 63 fd 08 14 e8 ab[ ]*vpextrb rax,xmm29,0xab
-[ ]*[a-f0-9]+:[ ]*62 63 fd 08 14 e8 7b[ ]*vpextrb rax,xmm29,0x7b
-[ ]*[a-f0-9]+:[ ]*62 43 fd 08 14 e8 7b[ ]*vpextrb r8,xmm29,0x7b
+[ ]*[a-f0-9]+:[ ]*62 63 fd 08 14 e8 ab[ ]*vpextrb eax,xmm29,0xab
+[ ]*[a-f0-9]+:[ ]*62 63 fd 08 14 e8 7b[ ]*vpextrb eax,xmm29,0x7b
+[ ]*[a-f0-9]+:[ ]*62 43 fd 08 14 e8 7b[ ]*vpextrb r8d,xmm29,0x7b
[ ]*[a-f0-9]+:[ ]*62 63 fd 08 14 29 7b[ ]*vpextrb BYTE PTR \[rcx\],xmm29,0x7b
[ ]*[a-f0-9]+:[ ]*62 23 fd 08 14 ac f0 34 12 00 00 7b[ ]*vpextrb BYTE PTR \[rax\+r14\*8\+0x1234\],xmm29,0x7b
[ ]*[a-f0-9]+:[ ]*62 63 fd 08 14 6a 7f 7b[ ]*vpextrb BYTE PTR \[rdx\+0x7f\],xmm29,0x7b
@@ -705,23 +705,23 @@ Disassembly of section \.text:
[ ]*[a-f0-9]+:[ ]*62 63 fd 08 15 aa 00 01 00 00 7b[ ]*vpextrw WORD PTR \[rdx\+0x100\],xmm29,0x7b
[ ]*[a-f0-9]+:[ ]*62 63 fd 08 15 6a 80 7b[ ]*vpextrw WORD PTR \[rdx-0x100\],xmm29,0x7b
[ ]*[a-f0-9]+:[ ]*62 63 fd 08 15 aa fe fe ff ff 7b[ ]*vpextrw WORD PTR \[rdx-0x102\],xmm29,0x7b
-[ ]*[a-f0-9]+:[ ]*62 91 fd 08 c5 c6 ab[ ]*vpextrw rax,xmm30,0xab
-[ ]*[a-f0-9]+:[ ]*62 91 fd 08 c5 c6 7b[ ]*vpextrw rax,xmm30,0x7b
-[ ]*[a-f0-9]+:[ ]*62 11 fd 08 c5 c6 7b[ ]*vpextrw r8,xmm30,0x7b
-[ ]*[a-f0-9]+:[ ]*62 63 95 00 20 f0 ab[ ]*vpinsrb xmm30,xmm29,rax,0xab
-[ ]*[a-f0-9]+:[ ]*62 63 95 00 20 f0 7b[ ]*vpinsrb xmm30,xmm29,rax,0x7b
-[ ]*[a-f0-9]+:[ ]*62 63 95 00 20 f5 7b[ ]*vpinsrb xmm30,xmm29,rbp,0x7b
-[ ]*[a-f0-9]+:[ ]*62 43 95 00 20 f5 7b[ ]*vpinsrb xmm30,xmm29,r13,0x7b
+[ ]*[a-f0-9]+:[ ]*62 91 fd 08 c5 c6 ab[ ]*vpextrw eax,xmm30,0xab
+[ ]*[a-f0-9]+:[ ]*62 91 fd 08 c5 c6 7b[ ]*vpextrw eax,xmm30,0x7b
+[ ]*[a-f0-9]+:[ ]*62 11 fd 08 c5 c6 7b[ ]*vpextrw r8d,xmm30,0x7b
+[ ]*[a-f0-9]+:[ ]*62 63 95 00 20 f0 ab[ ]*vpinsrb xmm30,xmm29,eax,0xab
+[ ]*[a-f0-9]+:[ ]*62 63 95 00 20 f0 7b[ ]*vpinsrb xmm30,xmm29,eax,0x7b
+[ ]*[a-f0-9]+:[ ]*62 63 95 00 20 f5 7b[ ]*vpinsrb xmm30,xmm29,ebp,0x7b
+[ ]*[a-f0-9]+:[ ]*62 43 95 00 20 f5 7b[ ]*vpinsrb xmm30,xmm29,r13d,0x7b
[ ]*[a-f0-9]+:[ ]*62 63 95 00 20 31 7b[ ]*vpinsrb xmm30,xmm29,BYTE PTR \[rcx\],0x7b
[ ]*[a-f0-9]+:[ ]*62 23 95 00 20 b4 f0 34 12 00 00 7b[ ]*vpinsrb xmm30,xmm29,BYTE PTR \[rax\+r14\*8\+0x1234\],0x7b
[ ]*[a-f0-9]+:[ ]*62 63 95 00 20 72 7f 7b[ ]*vpinsrb xmm30,xmm29,BYTE PTR \[rdx\+0x7f\],0x7b
[ ]*[a-f0-9]+:[ ]*62 63 95 00 20 b2 80 00 00 00 7b[ ]*vpinsrb xmm30,xmm29,BYTE PTR \[rdx\+0x80\],0x7b
[ ]*[a-f0-9]+:[ ]*62 63 95 00 20 72 80 7b[ ]*vpinsrb xmm30,xmm29,BYTE PTR \[rdx-0x80\],0x7b
[ ]*[a-f0-9]+:[ ]*62 63 95 00 20 b2 7f ff ff ff 7b[ ]*vpinsrb xmm30,xmm29,BYTE PTR \[rdx-0x81\],0x7b
-[ ]*[a-f0-9]+:[ ]*62 61 95 00 c4 f0 ab[ ]*vpinsrw xmm30,xmm29,rax,0xab
-[ ]*[a-f0-9]+:[ ]*62 61 95 00 c4 f0 7b[ ]*vpinsrw xmm30,xmm29,rax,0x7b
-[ ]*[a-f0-9]+:[ ]*62 61 95 00 c4 f5 7b[ ]*vpinsrw xmm30,xmm29,rbp,0x7b
-[ ]*[a-f0-9]+:[ ]*62 41 95 00 c4 f5 7b[ ]*vpinsrw xmm30,xmm29,r13,0x7b
+[ ]*[a-f0-9]+:[ ]*62 61 95 00 c4 f0 ab[ ]*vpinsrw xmm30,xmm29,eax,0xab
+[ ]*[a-f0-9]+:[ ]*62 61 95 00 c4 f0 7b[ ]*vpinsrw xmm30,xmm29,eax,0x7b
+[ ]*[a-f0-9]+:[ ]*62 61 95 00 c4 f5 7b[ ]*vpinsrw xmm30,xmm29,ebp,0x7b
+[ ]*[a-f0-9]+:[ ]*62 41 95 00 c4 f5 7b[ ]*vpinsrw xmm30,xmm29,r13d,0x7b
[ ]*[a-f0-9]+:[ ]*62 61 95 00 c4 31 7b[ ]*vpinsrw xmm30,xmm29,WORD PTR \[rcx\],0x7b
[ ]*[a-f0-9]+:[ ]*62 21 95 00 c4 b4 f0 34 12 00 00 7b[ ]*vpinsrw xmm30,xmm29,WORD PTR \[rax\+r14\*8\+0x1234\],0x7b
[ ]*[a-f0-9]+:[ ]*62 61 95 00 c4 72 7f 7b[ ]*vpinsrw xmm30,xmm29,WORD PTR \[rdx\+0xfe\],0x7b
diff --git a/gas/testsuite/gas/i386/x86-64-avx512bw-wig1.d b/gas/testsuite/gas/i386/x86-64-avx512bw-wig1.d
index f48e5e6ff85..d2687009a24 100644
--- a/gas/testsuite/gas/i386/x86-64-avx512bw-wig1.d
+++ b/gas/testsuite/gas/i386/x86-64-avx512bw-wig1.d
@@ -159,9 +159,9 @@ Disassembly of section \.text:
[ ]*[a-f0-9]+:[ ]*62 f1 8d 40 65 aa 00 20 00 00[ ]*vpcmpgtw 0x2000\(%rdx\),%zmm30,%k5
[ ]*[a-f0-9]+:[ ]*62 f1 8d 40 65 6a 80[ ]*vpcmpgtw -0x2000\(%rdx\),%zmm30,%k5
[ ]*[a-f0-9]+:[ ]*62 f1 8d 40 65 aa c0 df ff ff[ ]*vpcmpgtw -0x2040\(%rdx\),%zmm30,%k5
-[ ]*[a-f0-9]+:[ ]*62 63 fd 08 14 e8 ab[ ]*vpextrb \$0xab,%xmm29,%rax
-[ ]*[a-f0-9]+:[ ]*62 63 fd 08 14 e8 7b[ ]*vpextrb \$0x7b,%xmm29,%rax
-[ ]*[a-f0-9]+:[ ]*62 43 fd 08 14 e8 7b[ ]*vpextrb \$0x7b,%xmm29,%r8
+[ ]*[a-f0-9]+:[ ]*62 63 fd 08 14 e8 ab[ ]*vpextrb \$0xab,%xmm29,%eax
+[ ]*[a-f0-9]+:[ ]*62 63 fd 08 14 e8 7b[ ]*vpextrb \$0x7b,%xmm29,%eax
+[ ]*[a-f0-9]+:[ ]*62 43 fd 08 14 e8 7b[ ]*vpextrb \$0x7b,%xmm29,%r8d
[ ]*[a-f0-9]+:[ ]*62 63 fd 08 14 29 7b[ ]*vpextrb \$0x7b,%xmm29,\(%rcx\)
[ ]*[a-f0-9]+:[ ]*62 23 fd 08 14 ac f0 23 01 00 00 7b[ ]*vpextrb \$0x7b,%xmm29,0x123\(%rax,%r14,8\)
[ ]*[a-f0-9]+:[ ]*62 63 fd 08 14 6a 7f 7b[ ]*vpextrb \$0x7b,%xmm29,0x7f\(%rdx\)
@@ -174,23 +174,23 @@ Disassembly of section \.text:
[ ]*[a-f0-9]+:[ ]*62 63 fd 08 15 aa 00 01 00 00 7b[ ]*vpextrw \$0x7b,%xmm29,0x100\(%rdx\)
[ ]*[a-f0-9]+:[ ]*62 63 fd 08 15 6a 80 7b[ ]*vpextrw \$0x7b,%xmm29,-0x100\(%rdx\)
[ ]*[a-f0-9]+:[ ]*62 63 fd 08 15 aa fe fe ff ff 7b[ ]*vpextrw \$0x7b,%xmm29,-0x102\(%rdx\)
-[ ]*[a-f0-9]+:[ ]*62 91 fd 08 c5 c6 ab[ ]*vpextrw \$0xab,%xmm30,%rax
-[ ]*[a-f0-9]+:[ ]*62 91 fd 08 c5 c6 7b[ ]*vpextrw \$0x7b,%xmm30,%rax
-[ ]*[a-f0-9]+:[ ]*62 11 fd 08 c5 c6 7b[ ]*vpextrw \$0x7b,%xmm30,%r8
-[ ]*[a-f0-9]+:[ ]*62 63 95 00 20 f0 ab[ ]*vpinsrb \$0xab,%rax,%xmm29,%xmm30
-[ ]*[a-f0-9]+:[ ]*62 63 95 00 20 f0 7b[ ]*vpinsrb \$0x7b,%rax,%xmm29,%xmm30
-[ ]*[a-f0-9]+:[ ]*62 63 95 00 20 f5 7b[ ]*vpinsrb \$0x7b,%rbp,%xmm29,%xmm30
-[ ]*[a-f0-9]+:[ ]*62 43 95 00 20 f5 7b[ ]*vpinsrb \$0x7b,%r13,%xmm29,%xmm30
+[ ]*[a-f0-9]+:[ ]*62 91 fd 08 c5 c6 ab[ ]*vpextrw \$0xab,%xmm30,%eax
+[ ]*[a-f0-9]+:[ ]*62 91 fd 08 c5 c6 7b[ ]*vpextrw \$0x7b,%xmm30,%eax
+[ ]*[a-f0-9]+:[ ]*62 11 fd 08 c5 c6 7b[ ]*vpextrw \$0x7b,%xmm30,%r8d
+[ ]*[a-f0-9]+:[ ]*62 63 95 00 20 f0 ab[ ]*vpinsrb \$0xab,%eax,%xmm29,%xmm30
+[ ]*[a-f0-9]+:[ ]*62 63 95 00 20 f0 7b[ ]*vpinsrb \$0x7b,%eax,%xmm29,%xmm30
+[ ]*[a-f0-9]+:[ ]*62 63 95 00 20 f5 7b[ ]*vpinsrb \$0x7b,%ebp,%xmm29,%xmm30
+[ ]*[a-f0-9]+:[ ]*62 43 95 00 20 f5 7b[ ]*vpinsrb \$0x7b,%r13d,%xmm29,%xmm30
[ ]*[a-f0-9]+:[ ]*62 63 95 00 20 31 7b[ ]*vpinsrb \$0x7b,\(%rcx\),%xmm29,%xmm30
[ ]*[a-f0-9]+:[ ]*62 23 95 00 20 b4 f0 23 01 00 00 7b[ ]*vpinsrb \$0x7b,0x123\(%rax,%r14,8\),%xmm29,%xmm30
[ ]*[a-f0-9]+:[ ]*62 63 95 00 20 72 7f 7b[ ]*vpinsrb \$0x7b,0x7f\(%rdx\),%xmm29,%xmm30
[ ]*[a-f0-9]+:[ ]*62 63 95 00 20 b2 80 00 00 00 7b[ ]*vpinsrb \$0x7b,0x80\(%rdx\),%xmm29,%xmm30
[ ]*[a-f0-9]+:[ ]*62 63 95 00 20 72 80 7b[ ]*vpinsrb \$0x7b,-0x80\(%rdx\),%xmm29,%xmm30
[ ]*[a-f0-9]+:[ ]*62 63 95 00 20 b2 7f ff ff ff 7b[ ]*vpinsrb \$0x7b,-0x81\(%rdx\),%xmm29,%xmm30
-[ ]*[a-f0-9]+:[ ]*62 61 95 00 c4 f0 ab[ ]*vpinsrw \$0xab,%rax,%xmm29,%xmm30
-[ ]*[a-f0-9]+:[ ]*62 61 95 00 c4 f0 7b[ ]*vpinsrw \$0x7b,%rax,%xmm29,%xmm30
-[ ]*[a-f0-9]+:[ ]*62 61 95 00 c4 f5 7b[ ]*vpinsrw \$0x7b,%rbp,%xmm29,%xmm30
-[ ]*[a-f0-9]+:[ ]*62 41 95 00 c4 f5 7b[ ]*vpinsrw \$0x7b,%r13,%xmm29,%xmm30
+[ ]*[a-f0-9]+:[ ]*62 61 95 00 c4 f0 ab[ ]*vpinsrw \$0xab,%eax,%xmm29,%xmm30
+[ ]*[a-f0-9]+:[ ]*62 61 95 00 c4 f0 7b[ ]*vpinsrw \$0x7b,%eax,%xmm29,%xmm30
+[ ]*[a-f0-9]+:[ ]*62 61 95 00 c4 f5 7b[ ]*vpinsrw \$0x7b,%ebp,%xmm29,%xmm30
+[ ]*[a-f0-9]+:[ ]*62 41 95 00 c4 f5 7b[ ]*vpinsrw \$0x7b,%r13d,%xmm29,%xmm30
[ ]*[a-f0-9]+:[ ]*62 61 95 00 c4 31 7b[ ]*vpinsrw \$0x7b,\(%rcx\),%xmm29,%xmm30
[ ]*[a-f0-9]+:[ ]*62 21 95 00 c4 b4 f0 23 01 00 00 7b[ ]*vpinsrw \$0x7b,0x123\(%rax,%r14,8\),%xmm29,%xmm30
[ ]*[a-f0-9]+:[ ]*62 61 95 00 c4 72 7f 7b[ ]*vpinsrw \$0x7b,0xfe\(%rdx\),%xmm29,%xmm30
@@ -690,9 +690,9 @@ Disassembly of section \.text:
[ ]*[a-f0-9]+:[ ]*62 f1 8d 40 65 aa 00 20 00 00[ ]*vpcmpgtw 0x2000\(%rdx\),%zmm30,%k5
[ ]*[a-f0-9]+:[ ]*62 f1 8d 40 65 6a 80[ ]*vpcmpgtw -0x2000\(%rdx\),%zmm30,%k5
[ ]*[a-f0-9]+:[ ]*62 f1 8d 40 65 aa c0 df ff ff[ ]*vpcmpgtw -0x2040\(%rdx\),%zmm30,%k5
-[ ]*[a-f0-9]+:[ ]*62 63 fd 08 14 e8 ab[ ]*vpextrb \$0xab,%xmm29,%rax
-[ ]*[a-f0-9]+:[ ]*62 63 fd 08 14 e8 7b[ ]*vpextrb \$0x7b,%xmm29,%rax
-[ ]*[a-f0-9]+:[ ]*62 43 fd 08 14 e8 7b[ ]*vpextrb \$0x7b,%xmm29,%r8
+[ ]*[a-f0-9]+:[ ]*62 63 fd 08 14 e8 ab[ ]*vpextrb \$0xab,%xmm29,%eax
+[ ]*[a-f0-9]+:[ ]*62 63 fd 08 14 e8 7b[ ]*vpextrb \$0x7b,%xmm29,%eax
+[ ]*[a-f0-9]+:[ ]*62 43 fd 08 14 e8 7b[ ]*vpextrb \$0x7b,%xmm29,%r8d
[ ]*[a-f0-9]+:[ ]*62 63 fd 08 14 29 7b[ ]*vpextrb \$0x7b,%xmm29,\(%rcx\)
[ ]*[a-f0-9]+:[ ]*62 23 fd 08 14 ac f0 34 12 00 00 7b[ ]*vpextrb \$0x7b,%xmm29,0x1234\(%rax,%r14,8\)
[ ]*[a-f0-9]+:[ ]*62 63 fd 08 14 6a 7f 7b[ ]*vpextrb \$0x7b,%xmm29,0x7f\(%rdx\)
@@ -705,23 +705,23 @@ Disassembly of section \.text:
[ ]*[a-f0-9]+:[ ]*62 63 fd 08 15 aa 00 01 00 00 7b[ ]*vpextrw \$0x7b,%xmm29,0x100\(%rdx\)
[ ]*[a-f0-9]+:[ ]*62 63 fd 08 15 6a 80 7b[ ]*vpextrw \$0x7b,%xmm29,-0x100\(%rdx\)
[ ]*[a-f0-9]+:[ ]*62 63 fd 08 15 aa fe fe ff ff 7b[ ]*vpextrw \$0x7b,%xmm29,-0x102\(%rdx\)
-[ ]*[a-f0-9]+:[ ]*62 91 fd 08 c5 c6 ab[ ]*vpextrw \$0xab,%xmm30,%rax
-[ ]*[a-f0-9]+:[ ]*62 91 fd 08 c5 c6 7b[ ]*vpextrw \$0x7b,%xmm30,%rax
-[ ]*[a-f0-9]+:[ ]*62 11 fd 08 c5 c6 7b[ ]*vpextrw \$0x7b,%xmm30,%r8
-[ ]*[a-f0-9]+:[ ]*62 63 95 00 20 f0 ab[ ]*vpinsrb \$0xab,%rax,%xmm29,%xmm30
-[ ]*[a-f0-9]+:[ ]*62 63 95 00 20 f0 7b[ ]*vpinsrb \$0x7b,%rax,%xmm29,%xmm30
-[ ]*[a-f0-9]+:[ ]*62 63 95 00 20 f5 7b[ ]*vpinsrb \$0x7b,%rbp,%xmm29,%xmm30
-[ ]*[a-f0-9]+:[ ]*62 43 95 00 20 f5 7b[ ]*vpinsrb \$0x7b,%r13,%xmm29,%xmm30
+[ ]*[a-f0-9]+:[ ]*62 91 fd 08 c5 c6 ab[ ]*vpextrw \$0xab,%xmm30,%eax
+[ ]*[a-f0-9]+:[ ]*62 91 fd 08 c5 c6 7b[ ]*vpextrw \$0x7b,%xmm30,%eax
+[ ]*[a-f0-9]+:[ ]*62 11 fd 08 c5 c6 7b[ ]*vpextrw \$0x7b,%xmm30,%r8d
+[ ]*[a-f0-9]+:[ ]*62 63 95 00 20 f0 ab[ ]*vpinsrb \$0xab,%eax,%xmm29,%xmm30
+[ ]*[a-f0-9]+:[ ]*62 63 95 00 20 f0 7b[ ]*vpinsrb \$0x7b,%eax,%xmm29,%xmm30
+[ ]*[a-f0-9]+:[ ]*62 63 95 00 20 f5 7b[ ]*vpinsrb \$0x7b,%ebp,%xmm29,%xmm30
+[ ]*[a-f0-9]+:[ ]*62 43 95 00 20 f5 7b[ ]*vpinsrb \$0x7b,%r13d,%xmm29,%xmm30
[ ]*[a-f0-9]+:[ ]*62 63 95 00 20 31 7b[ ]*vpinsrb \$0x7b,\(%rcx\),%xmm29,%xmm30
[ ]*[a-f0-9]+:[ ]*62 23 95 00 20 b4 f0 34 12 00 00 7b[ ]*vpinsrb \$0x7b,0x1234\(%rax,%r14,8\),%xmm29,%xmm30
[ ]*[a-f0-9]+:[ ]*62 63 95 00 20 72 7f 7b[ ]*vpinsrb \$0x7b,0x7f\(%rdx\),%xmm29,%xmm30
[ ]*[a-f0-9]+:[ ]*62 63 95 00 20 b2 80 00 00 00 7b[ ]*vpinsrb \$0x7b,0x80\(%rdx\),%xmm29,%xmm30
[ ]*[a-f0-9]+:[ ]*62 63 95 00 20 72 80 7b[ ]*vpinsrb \$0x7b,-0x80\(%rdx\),%xmm29,%xmm30
[ ]*[a-f0-9]+:[ ]*62 63 95 00 20 b2 7f ff ff ff 7b[ ]*vpinsrb \$0x7b,-0x81\(%rdx\),%xmm29,%xmm30
-[ ]*[a-f0-9]+:[ ]*62 61 95 00 c4 f0 ab[ ]*vpinsrw \$0xab,%rax,%xmm29,%xmm30
-[ ]*[a-f0-9]+:[ ]*62 61 95 00 c4 f0 7b[ ]*vpinsrw \$0x7b,%rax,%xmm29,%xmm30
-[ ]*[a-f0-9]+:[ ]*62 61 95 00 c4 f5 7b[ ]*vpinsrw \$0x7b,%rbp,%xmm29,%xmm30
-[ ]*[a-f0-9]+:[ ]*62 41 95 00 c4 f5 7b[ ]*vpinsrw \$0x7b,%r13,%xmm29,%xmm30
+[ ]*[a-f0-9]+:[ ]*62 61 95 00 c4 f0 ab[ ]*vpinsrw \$0xab,%eax,%xmm29,%xmm30
+[ ]*[a-f0-9]+:[ ]*62 61 95 00 c4 f0 7b[ ]*vpinsrw \$0x7b,%eax,%xmm29,%xmm30
+[ ]*[a-f0-9]+:[ ]*62 61 95 00 c4 f5 7b[ ]*vpinsrw \$0x7b,%ebp,%xmm29,%xmm30
+[ ]*[a-f0-9]+:[ ]*62 41 95 00 c4 f5 7b[ ]*vpinsrw \$0x7b,%r13d,%xmm29,%xmm30
[ ]*[a-f0-9]+:[ ]*62 61 95 00 c4 31 7b[ ]*vpinsrw \$0x7b,\(%rcx\),%xmm29,%xmm30
[ ]*[a-f0-9]+:[ ]*62 21 95 00 c4 b4 f0 34 12 00 00 7b[ ]*vpinsrw \$0x7b,0x1234\(%rax,%r14,8\),%xmm29,%xmm30
[ ]*[a-f0-9]+:[ ]*62 61 95 00 c4 72 7f 7b[ ]*vpinsrw \$0x7b,0xfe\(%rdx\),%xmm29,%xmm30
diff --git a/gas/testsuite/gas/i386/x86-64-evex-wig1-intel.d b/gas/testsuite/gas/i386/x86-64-evex-wig1-intel.d
index f6031f27968..e1abc7ecb35 100644
--- a/gas/testsuite/gas/i386/x86-64-evex-wig1-intel.d
+++ b/gas/testsuite/gas/i386/x86-64-evex-wig1-intel.d
@@ -9,23 +9,23 @@
Disassembly of section .text:
0+ <_start>:
-[ ]*[a-f0-9]+: 62 63 fd 08 17 e8 ab vextractps rax,xmm29,0xab
-[ ]*[a-f0-9]+: 62 63 fd 08 17 e8 7b vextractps rax,xmm29,0x7b
-[ ]*[a-f0-9]+: 62 43 fd 08 17 e8 7b vextractps r8,xmm29,0x7b
+[ ]*[a-f0-9]+: 62 63 fd 08 17 e8 ab vextractps eax,xmm29,0xab
+[ ]*[a-f0-9]+: 62 63 fd 08 17 e8 7b vextractps eax,xmm29,0x7b
+[ ]*[a-f0-9]+: 62 43 fd 08 17 e8 7b vextractps r8d,xmm29,0x7b
[ ]*[a-f0-9]+: 62 63 fd 08 17 29 7b vextractps DWORD PTR \[rcx\],xmm29,0x7b
[ ]*[a-f0-9]+: 62 23 fd 08 17 ac f0 23 01 00 00 7b vextractps DWORD PTR \[rax\+r14\*8\+0x123\],xmm29,0x7b
[ ]*[a-f0-9]+: 62 63 fd 08 17 6a 7f 7b vextractps DWORD PTR \[rdx\+0x1fc\],xmm29,0x7b
[ ]*[a-f0-9]+: 62 63 fd 08 17 aa 00 02 00 00 7b vextractps DWORD PTR \[rdx\+0x200\],xmm29,0x7b
[ ]*[a-f0-9]+: 62 63 fd 08 17 6a 80 7b vextractps DWORD PTR \[rdx-0x200\],xmm29,0x7b
[ ]*[a-f0-9]+: 62 63 fd 08 17 aa fc fd ff ff 7b vextractps DWORD PTR \[rdx-0x204\],xmm29,0x7b
-[ ]*[a-f0-9]+: 62 f3 fd 08 14 c0 00 vpextrb rax,xmm0,0x0
+[ ]*[a-f0-9]+: 62 f3 fd 08 14 c0 00 vpextrb eax,xmm0,0x0
[ ]*[a-f0-9]+: 62 f3 fd 08 14 00 00 vpextrb BYTE PTR \[rax\],xmm0,0x0
-[ ]*[a-f0-9]+: 62 f1 fd 08 c5 c0 00 vpextrw rax,xmm0,0x0
-[ ]*[a-f0-9]+: 62 f3 fd 08 15 c0 00 vpextrw rax,xmm0,0x0
+[ ]*[a-f0-9]+: 62 f1 fd 08 c5 c0 00 vpextrw eax,xmm0,0x0
+[ ]*[a-f0-9]+: 62 f3 fd 08 15 c0 00 vpextrw eax,xmm0,0x0
[ ]*[a-f0-9]+: 62 f3 fd 08 15 00 00 vpextrw WORD PTR \[rax\],xmm0,0x0
-[ ]*[a-f0-9]+: 62 f3 fd 08 20 c0 00 vpinsrb xmm0,xmm0,rax,0x0
+[ ]*[a-f0-9]+: 62 f3 fd 08 20 c0 00 vpinsrb xmm0,xmm0,eax,0x0
[ ]*[a-f0-9]+: 62 f3 fd 08 20 00 00 vpinsrb xmm0,xmm0,BYTE PTR \[rax\],0x0
-[ ]*[a-f0-9]+: 62 f1 fd 08 c4 c0 00 vpinsrw xmm0,xmm0,rax,0x0
+[ ]*[a-f0-9]+: 62 f1 fd 08 c4 c0 00 vpinsrw xmm0,xmm0,eax,0x0
[ ]*[a-f0-9]+: 62 f1 fd 08 c4 00 00 vpinsrw xmm0,xmm0,WORD PTR \[rax\],0x0
[ ]*[a-f0-9]+: 62 02 fd 4f 21 f5 vpmovsxbd zmm30\{k7\},xmm29
[ ]*[a-f0-9]+: 62 02 fd cf 21 f5 vpmovsxbd zmm30\{k7\}\{z\},xmm29
@@ -91,9 +91,9 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 62 62 fd 4f 34 b2 00 08 00 00 vpmovzxwq zmm30\{k7\},XMMWORD PTR \[rdx\+0x800\]
[ ]*[a-f0-9]+: 62 62 fd 4f 34 72 80 vpmovzxwq zmm30\{k7\},XMMWORD PTR \[rdx-0x800\]
[ ]*[a-f0-9]+: 62 62 fd 4f 34 b2 f0 f7 ff ff vpmovzxwq zmm30\{k7\},XMMWORD PTR \[rdx-0x810\]
-[ ]*[a-f0-9]+: 62 63 fd 08 17 e8 ab vextractps rax,xmm29,0xab
-[ ]*[a-f0-9]+: 62 63 fd 08 17 e8 7b vextractps rax,xmm29,0x7b
-[ ]*[a-f0-9]+: 62 43 fd 08 17 e8 7b vextractps r8,xmm29,0x7b
+[ ]*[a-f0-9]+: 62 63 fd 08 17 e8 ab vextractps eax,xmm29,0xab
+[ ]*[a-f0-9]+: 62 63 fd 08 17 e8 7b vextractps eax,xmm29,0x7b
+[ ]*[a-f0-9]+: 62 43 fd 08 17 e8 7b vextractps r8d,xmm29,0x7b
[ ]*[a-f0-9]+: 62 63 fd 08 17 29 7b vextractps DWORD PTR \[rcx\],xmm29,0x7b
[ ]*[a-f0-9]+: 62 23 fd 08 17 ac f0 34 12 00 00 7b vextractps DWORD PTR \[rax\+r14\*8\+0x1234\],xmm29,0x7b
[ ]*[a-f0-9]+: 62 63 fd 08 17 6a 7f 7b vextractps DWORD PTR \[rdx\+0x1fc\],xmm29,0x7b
diff --git a/gas/testsuite/gas/i386/x86-64-evex-wig1.d b/gas/testsuite/gas/i386/x86-64-evex-wig1.d
index 9c49f1c7105..e62e8f4405f 100644
--- a/gas/testsuite/gas/i386/x86-64-evex-wig1.d
+++ b/gas/testsuite/gas/i386/x86-64-evex-wig1.d
@@ -9,23 +9,23 @@
Disassembly of section .text:
0+ <_start>:
-[ ]*[a-f0-9]+: 62 63 fd 08 17 e8 ab vextractps \$0xab,%xmm29,%rax
-[ ]*[a-f0-9]+: 62 63 fd 08 17 e8 7b vextractps \$0x7b,%xmm29,%rax
-[ ]*[a-f0-9]+: 62 43 fd 08 17 e8 7b vextractps \$0x7b,%xmm29,%r8
+[ ]*[a-f0-9]+: 62 63 fd 08 17 e8 ab vextractps \$0xab,%xmm29,%eax
+[ ]*[a-f0-9]+: 62 63 fd 08 17 e8 7b vextractps \$0x7b,%xmm29,%eax
+[ ]*[a-f0-9]+: 62 43 fd 08 17 e8 7b vextractps \$0x7b,%xmm29,%r8d
[ ]*[a-f0-9]+: 62 63 fd 08 17 29 7b vextractps \$0x7b,%xmm29,\(%rcx\)
[ ]*[a-f0-9]+: 62 23 fd 08 17 ac f0 23 01 00 00 7b vextractps \$0x7b,%xmm29,0x123\(%rax,%r14,8\)
[ ]*[a-f0-9]+: 62 63 fd 08 17 6a 7f 7b vextractps \$0x7b,%xmm29,0x1fc\(%rdx\)
[ ]*[a-f0-9]+: 62 63 fd 08 17 aa 00 02 00 00 7b vextractps \$0x7b,%xmm29,0x200\(%rdx\)
[ ]*[a-f0-9]+: 62 63 fd 08 17 6a 80 7b vextractps \$0x7b,%xmm29,-0x200\(%rdx\)
[ ]*[a-f0-9]+: 62 63 fd 08 17 aa fc fd ff ff 7b vextractps \$0x7b,%xmm29,-0x204\(%rdx\)
-[ ]*[a-f0-9]+: 62 f3 fd 08 14 c0 00 vpextrb \$0x0,%xmm0,%rax
+[ ]*[a-f0-9]+: 62 f3 fd 08 14 c0 00 vpextrb \$0x0,%xmm0,%eax
[ ]*[a-f0-9]+: 62 f3 fd 08 14 00 00 vpextrb \$0x0,%xmm0,\(%rax\)
-[ ]*[a-f0-9]+: 62 f1 fd 08 c5 c0 00 vpextrw \$0x0,%xmm0,%rax
-[ ]*[a-f0-9]+: 62 f3 fd 08 15 c0 00 vpextrw \$0x0,%xmm0,%rax
+[ ]*[a-f0-9]+: 62 f1 fd 08 c5 c0 00 vpextrw \$0x0,%xmm0,%eax
+[ ]*[a-f0-9]+: 62 f3 fd 08 15 c0 00 vpextrw \$0x0,%xmm0,%eax
[ ]*[a-f0-9]+: 62 f3 fd 08 15 00 00 vpextrw \$0x0,%xmm0,\(%rax\)
-[ ]*[a-f0-9]+: 62 f3 fd 08 20 c0 00 vpinsrb \$0x0,%rax,%xmm0,%xmm0
+[ ]*[a-f0-9]+: 62 f3 fd 08 20 c0 00 vpinsrb \$0x0,%eax,%xmm0,%xmm0
[ ]*[a-f0-9]+: 62 f3 fd 08 20 00 00 vpinsrb \$0x0,\(%rax\),%xmm0,%xmm0
-[ ]*[a-f0-9]+: 62 f1 fd 08 c4 c0 00 vpinsrw \$0x0,%rax,%xmm0,%xmm0
+[ ]*[a-f0-9]+: 62 f1 fd 08 c4 c0 00 vpinsrw \$0x0,%eax,%xmm0,%xmm0
[ ]*[a-f0-9]+: 62 f1 fd 08 c4 00 00 vpinsrw \$0x0,\(%rax\),%xmm0,%xmm0
[ ]*[a-f0-9]+: 62 02 fd 4f 21 f5 vpmovsxbd %xmm29,%zmm30\{%k7\}
[ ]*[a-f0-9]+: 62 02 fd cf 21 f5 vpmovsxbd %xmm29,%zmm30\{%k7\}\{z\}
@@ -91,9 +91,9 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 62 62 fd 4f 34 b2 00 08 00 00 vpmovzxwq 0x800\(%rdx\),%zmm30\{%k7\}
[ ]*[a-f0-9]+: 62 62 fd 4f 34 72 80 vpmovzxwq -0x800\(%rdx\),%zmm30\{%k7\}
[ ]*[a-f0-9]+: 62 62 fd 4f 34 b2 f0 f7 ff ff vpmovzxwq -0x810\(%rdx\),%zmm30\{%k7\}
-[ ]*[a-f0-9]+: 62 63 fd 08 17 e8 ab vextractps \$0xab,%xmm29,%rax
-[ ]*[a-f0-9]+: 62 63 fd 08 17 e8 7b vextractps \$0x7b,%xmm29,%rax
-[ ]*[a-f0-9]+: 62 43 fd 08 17 e8 7b vextractps \$0x7b,%xmm29,%r8
+[ ]*[a-f0-9]+: 62 63 fd 08 17 e8 ab vextractps \$0xab,%xmm29,%eax
+[ ]*[a-f0-9]+: 62 63 fd 08 17 e8 7b vextractps \$0x7b,%xmm29,%eax
+[ ]*[a-f0-9]+: 62 43 fd 08 17 e8 7b vextractps \$0x7b,%xmm29,%r8d
[ ]*[a-f0-9]+: 62 63 fd 08 17 29 7b vextractps \$0x7b,%xmm29,\(%rcx\)
[ ]*[a-f0-9]+: 62 23 fd 08 17 ac f0 34 12 00 00 7b vextractps \$0x7b,%xmm29,0x1234\(%rax,%r14,8\)
[ ]*[a-f0-9]+: 62 63 fd 08 17 6a 7f 7b vextractps \$0x7b,%xmm29,0x1fc\(%rdx\)
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 6efc15b851b..521d6899338 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -240,11 +240,8 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
#define EvS { OP_E, v_swap_mode }
#define Ed { OP_E, d_mode }
#define Edq { OP_E, dq_mode }
-#define Edqw { OP_E, dqw_mode }
-#define Edqb { OP_E, dqb_mode }
#define Edb { OP_E, db_mode }
#define Edw { OP_E, dw_mode }
-#define Edqd { OP_E, dqd_mode }
#define Eq { OP_E, q_mode }
#define indirEv { OP_indirE, indir_v_mode }
#define indirEp { OP_indirE, f_mode }
@@ -509,8 +506,7 @@ enum
v_bndmk_mode,
/* operand size depends on REX.W / VEX.W. */
dq_mode,
- /* registers like dq_mode, memory like w_mode, displacements like
- v_mode without considering Intel64 ISA. */
+ /* Displacements like v_mode without considering Intel64 ISA. */
dqw_mode,
/* bounds operand */
bnd_mode,
@@ -527,14 +523,10 @@ enum
z_mode,
/* 16-byte operand */
o_mode,
- /* registers like dq_mode, memory like b_mode. */
- dqb_mode,
/* registers like d_mode, memory like b_mode. */
db_mode,
/* registers like d_mode, memory like w_mode. */
dw_mode,
- /* registers like dq_mode, memory like d_mode. */
- dqd_mode,
/* Operand size depends on the VEX.W bit, with VSIB dword indices. */
vex_vsib_d_w_dq_mode,
@@ -2182,8 +2174,8 @@ static const struct dis386 dis386_twobyte[] = {
{ "xaddS", { Evh1, Gv }, 0 },
{ PREFIX_TABLE (PREFIX_0FC2) },
{ MOD_TABLE (MOD_0FC3) },
- { "pinsrw", { MX, Edqw, Ib }, PREFIX_OPCODE },
- { "pextrw", { Gdq, MS, Ib }, PREFIX_OPCODE },
+ { "pinsrw", { MX, Edw, Ib }, PREFIX_OPCODE },
+ { "pextrw", { Gd, MS, Ib }, PREFIX_OPCODE },
{ "shufpX", { XM, EXx, Ib }, PREFIX_OPCODE },
{ REG_TABLE (REG_0FC7) },
/* c8 */
@@ -4687,10 +4679,10 @@ static const struct dis386 three_byte_table[][256] = {
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
- { "pextrb", { Edqb, XM, Ib }, PREFIX_DATA },
- { "pextrw", { Edqw, XM, Ib }, PREFIX_DATA },
+ { "pextrb", { Edb, XM, Ib }, PREFIX_DATA },
+ { "pextrw", { Edw, XM, Ib }, PREFIX_DATA },
{ "pextrK", { Edq, XM, Ib }, PREFIX_DATA },
- { "extractps", { Edqd, XM, Ib }, PREFIX_DATA },
+ { "extractps", { Ed, XM, Ib }, PREFIX_DATA },
/* 18 */
{ Bad_Opcode },
{ Bad_Opcode },
@@ -4701,7 +4693,7 @@ static const struct dis386 three_byte_table[][256] = {
{ Bad_Opcode },
{ Bad_Opcode },
/* 20 */
- { "pinsrb", { XM, Edqb, Ib }, PREFIX_DATA },
+ { "pinsrb", { XM, Edb, Ib }, PREFIX_DATA },
{ "insertps", { XM, EXd, Ib }, PREFIX_DATA },
{ "pinsrK", { XM, Edq, Ib }, PREFIX_DATA },
{ Bad_Opcode },
@@ -6850,12 +6842,12 @@ static const struct dis386 vex_len_table[][2] = {
/* VEX_LEN_0FC4 */
{
- { "vpinsrw", { XM, Vex, Edqw, Ib }, PREFIX_DATA },
+ { "vpinsrw", { XM, Vex, Edw, Ib }, PREFIX_DATA },
},
/* VEX_LEN_0FC5 */
{
- { "vpextrw", { Gdq, XS, Ib }, PREFIX_DATA },
+ { "vpextrw", { Gd, XS, Ib }, PREFIX_DATA },
},
/* VEX_LEN_0FD6 */
@@ -7012,12 +7004,12 @@ static const struct dis386 vex_len_table[][2] = {
/* VEX_LEN_0F3A14 */
{
- { "vpextrb", { Edqb, XM, Ib }, PREFIX_DATA },
+ { "vpextrb", { Edb, XM, Ib }, PREFIX_DATA },
},
/* VEX_LEN_0F3A15 */
{
- { "vpextrw", { Edqw, XM, Ib }, PREFIX_DATA },
+ { "vpextrw", { Edw, XM, Ib }, PREFIX_DATA },
},
/* VEX_LEN_0F3A16 */
@@ -7027,7 +7019,7 @@ static const struct dis386 vex_len_table[][2] = {
/* VEX_LEN_0F3A17 */
{
- { "vextractps", { Edqd, XM, Ib }, PREFIX_DATA },
+ { "vextractps", { Ed, XM, Ib }, PREFIX_DATA },
},
/* VEX_LEN_0F3A18 */
@@ -7044,7 +7036,7 @@ static const struct dis386 vex_len_table[][2] = {
/* VEX_LEN_0F3A20 */
{
- { "vpinsrb", { XM, Vex, Edqb, Ib }, PREFIX_DATA },
+ { "vpinsrb", { XM, Vex, Edb, Ib }, PREFIX_DATA },
},
/* VEX_LEN_0F3A21 */
@@ -10957,13 +10949,11 @@ intel_operand_size (int bytemode, int sizeflag)
{
case b_mode:
case b_swap_mode:
- case dqb_mode:
case db_mode:
oappend ("BYTE PTR ");
break;
case w_mode:
case dw_mode:
- case dqw_mode:
oappend ("WORD PTR ");
break;
case indir_v_mode:
@@ -11020,7 +11010,6 @@ intel_operand_size (int bytemode, int sizeflag)
break;
case d_mode:
case d_swap_mode:
- case dqd_mode:
oappend ("DWORD PTR ");
break;
case q_mode:
@@ -11263,9 +11252,6 @@ print_register (unsigned int reg, unsigned int rexmask, int bytemode, int sizefl
case v_mode:
case v_swap_mode:
case dq_mode:
- case dqb_mode:
- case dqd_mode:
- case dqw_mode:
USED_REX (REX_W);
if (rex & REX_W)
names = names64;
@@ -11340,12 +11326,10 @@ OP_E_memory (int bytemode, int sizeflag)
}
switch (bytemode)
{
- case dqw_mode:
case dw_mode:
case w_mode:
shift = 1;
break;
- case dqb_mode:
case db_mode:
case b_mode:
shift = 0;
@@ -11353,7 +11337,6 @@ OP_E_memory (int bytemode, int sizeflag)
case dq_mode:
if (address_mode != mode_64bit)
{
- case dqd_mode:
case d_mode:
case d_swap_mode:
shift = 2;
--
2.33.0

304
0014-x86-express-unduly-set-rounding-control-bits-in-disa.patch
View File

@ -1,304 +0,0 @@
From 0e4cc77316732e67cff33e493eff2aa7feed4587 Mon Sep 17 00:00:00 2001
From: Jan Beulich <jbeulich@suse.com>
Date: Fri, 23 Jul 2021 08:03:21 +0200
Subject: [PATCH] x86: express unduly set rounding control bits in disassembly
While EVEX.L'L are indeed ignored when EVEX.b stands for just SAE,
EVEX.b itself is not ignored when an insn permits neither rounding
control nor SAE.
While changing this aspect of EVEX.b handling, also alter unduly set
embedded broadcast: Don't call BadOp(), screwing up subsequent
disassembly, but emit "{bad}" instead.
diff --git a/gas/testsuite/gas/i386/avx512f-nondef.d b/gas/testsuite/gas/i386/avx512f-nondef.d
index f19edceb6bb..07ffe60e177 100644
--- a/gas/testsuite/gas/i386/avx512f-nondef.d
+++ b/gas/testsuite/gas/i386/avx512f-nondef.d
@@ -10,12 +10,11 @@ Disassembly of section .text:
0+ <.text>:
[ ]*[a-f0-9]+: 62 f3 d5 1f 0b f4 7b vrndscalesd \$0x7b,\{sae\},%xmm4,%xmm5,%xmm6\{%k7\}
[ ]*[a-f0-9]+: 62 f3 d5 5f 0b f4 7b vrndscalesd \$0x7b,\{sae\},%xmm4,%xmm5,%xmm6\{%k7\}
-[ ]*[a-f0-9]+: 62 f2 55 1f 3b f4 vpminud %zmm4,%zmm5,%zmm6\{%k7\}
-[ ]*[a-f0-9]+: 62 c2 55 1f 3b f4 vpminud %zmm4,%zmm5,%zmm6\{%k7\}
+[ ]*[a-f0-9]+: 62 f2 55 4f 3b f4 vpminud %zmm4,%zmm5,%zmm6\{%k7\}
+[ ]*[a-f0-9]+: 62 c2 55 4f 3b f4 vpminud %zmm4,%zmm5,%zmm6\{%k7\}
+[ ]*[a-f0-9]+: 62 f2 55 1f 3b f4 vpminud \{rn-bad\},%zmm4,%zmm5,%zmm6\{%k7\}
[ ]*[a-f0-9]+: 62 f2 7e 48 31 72 7f vpmovdb %zmm6,0x7f0\(%edx\)
-[ ]*[a-f0-9]+: 62 vpmovdb %zmm6,\(bad\)
-[ ]*[a-f0-9]+: f2 7e 58 bnd jle (0x7d|7d <.text\+0x7d>)
-[ ]*[a-f0-9]+: 31 72 7f xor %esi,0x7f\(%edx\)
+[ ]*[a-f0-9]+: 62 f2 7e 58 31 72 7f vpmovdb %zmm6,0x7f0\(%edx\)\{bad\}
[ ]*[a-f0-9]+: 62 f1 7c 88 58 \(bad\)
[ ]*[a-f0-9]+: c3 ret *
[ ]*[a-f0-9]+: 62 f2 7d 4f 92 01 vgatherdps \(bad\),%zmm0\{%k7\}
diff --git a/gas/testsuite/gas/i386/avx512f-nondef.s b/gas/testsuite/gas/i386/avx512f-nondef.s
index 676c4e0fe4b..96d04666248 100644
--- a/gas/testsuite/gas/i386/avx512f-nondef.s
+++ b/gas/testsuite/gas/i386/avx512f-nondef.s
@@ -5,13 +5,15 @@
.byte 0x62, 0xf3, 0xd5, 0x1f, 0x0b, 0xf4, 0x7b
# vrndscalesd {sae}, $123, %xmm4, %xmm5, %xmm6{%k7} # with not-null RC
.byte 0x62, 0xf3, 0xd5, 0x5f, 0x0b, 0xf4, 0x7b
-# vpminud %zmm4, %zmm5, %zmm6{%k7} # with 111 REX
+# vpminud %zmm4, %zmm5, %zmm6{%k7} # with 11 EVEX.{B,R'}
+.byte 0x62, 0xf2, 0x55, 0x4f, 0x3b, 0xf4
+# vpminud %zmm4, %zmm5, %zmm6{%k7} # with not-11 EVEX.{B,R'}
+.byte 0x62, 0xc2, 0x55, 0x4f, 0x3b, 0xf4
+# vpminud %zmm4, %zmm5, %zmm6{%k7} # with set EVEX.b bit
.byte 0x62, 0xf2, 0x55, 0x1f, 0x3b, 0xf4
-# vpminud %zmm4, %zmm5, %zmm6{%k7} # with not-111 REX
-.byte 0x62, 0xc2, 0x55, 0x1f, 0x3b, 0xf4
-# vpmovdb %zmm6, 2032(%rdx) # with unset EVEX.B bit
+# vpmovdb %zmm6, 2032(%rdx) # with unset EVEX.b bit
.byte 0x62, 0xf2, 0x7e, 0x48, 0x31, 0x72, 0x7f
-# vpmovdb %zmm6, 2032(%rdx) # with set EVEX.B bit - we should get (bad) operand
+# vpmovdb %zmm6, 2032(%rdx) # with set EVEX.b bit - we should get (bad) operand
.byte 0x62, 0xf2, 0x7e, 0x58, 0x31, 0x72, 0x7f
# vaddps xmm0, xmm0, xmm3 # with EVEX.z set
.byte 0x62, 0xf1, 0x7c, 0x88, 0x58, 0xc3
diff --git a/gas/testsuite/gas/i386/evex.d b/gas/testsuite/gas/i386/evex.d
index 367b2eb1321..4afcc6db728 100644
--- a/gas/testsuite/gas/i386/evex.d
+++ b/gas/testsuite/gas/i386/evex.d
@@ -8,14 +8,14 @@ Disassembly of section .text:
0+ <_start>:
+[a-f0-9]+: 62 f1 d6 38 2a f0 vcvtsi2ssl %eax,\{rd-sae\},%xmm5,%xmm6
- +[a-f0-9]+: 62 f1 57 38 2a f0 vcvtsi2sdl %eax,\(bad\),%xmm5,%xmm6
- +[a-f0-9]+: 62 f1 d7 38 2a f0 vcvtsi2sdl %eax,\(bad\),%xmm5,%xmm6
+ +[a-f0-9]+: 62 f1 57 38 2a f0 vcvtsi2sdl %eax,\{rd-bad\},%xmm5,%xmm6
+ +[a-f0-9]+: 62 f1 d7 38 2a f0 vcvtsi2sdl %eax,\{rd-bad\},%xmm5,%xmm6
+[a-f0-9]+: 62 f1 d6 08 7b f0 vcvtusi2ssl %eax,%xmm5,%xmm6
+[a-f0-9]+: 62 f1 57 08 7b f0 vcvtusi2sdl %eax,%xmm5,%xmm6
+[a-f0-9]+: 62 f1 d7 08 7b f0 vcvtusi2sdl %eax,%xmm5,%xmm6
+[a-f0-9]+: 62 f1 d6 38 7b f0 vcvtusi2ssl %eax,\{rd-sae\},%xmm5,%xmm6
- +[a-f0-9]+: 62 f1 57 38 7b f0 vcvtusi2sdl %eax,\(bad\),%xmm5,%xmm6
- +[a-f0-9]+: 62 f1 d7 38 7b f0 vcvtusi2sdl %eax,\(bad\),%xmm5,%xmm6
+ +[a-f0-9]+: 62 f1 57 38 7b f0 vcvtusi2sdl %eax,\{rd-bad\},%xmm5,%xmm6
+ +[a-f0-9]+: 62 f1 d7 38 7b f0 vcvtusi2sdl %eax,\{rd-bad\},%xmm5,%xmm6
+[a-f0-9]+: 62 e1 7e 08 2d c0 vcvtss2si %xmm0,%eax
+[a-f0-9]+: 62 e1 7c 08 c2 c0 00 vcmpeqps %xmm0,%xmm0,%k0
#pass
diff --git a/gas/testsuite/gas/i386/x86-64-avx512f-nondef.d b/gas/testsuite/gas/i386/x86-64-avx512f-nondef.d
index bce2d80588d..e8ddfd58870 100644
--- a/gas/testsuite/gas/i386/x86-64-avx512f-nondef.d
+++ b/gas/testsuite/gas/i386/x86-64-avx512f-nondef.d
@@ -10,10 +10,9 @@ Disassembly of section .text:
0+ <.text>:
[ ]*[a-f0-9]+: 62 f3 d5 1f 0b f4 7b vrndscalesd \$0x7b,\{sae\},%xmm4,%xmm5,%xmm6\{%k7\}
[ ]*[a-f0-9]+: 62 f3 d5 5f 0b f4 7b vrndscalesd \$0x7b,\{sae\},%xmm4,%xmm5,%xmm6\{%k7\}
-[ ]*[a-f0-9]+: 62 f2 55 1f 3b f4 vpminud %zmm4,%zmm5,%zmm6\{%k7\}
-[ ]*[a-f0-9]+: 62 c2 55 1f 3b f4 vpminud %zmm12,%zmm5,%zmm22\{%k7\}
+[ ]*[a-f0-9]+: 62 f2 55 4f 3b f4 vpminud %zmm4,%zmm5,%zmm6\{%k7\}
+[ ]*[a-f0-9]+: 62 c2 55 4f 3b f4 vpminud %zmm12,%zmm5,%zmm22\{%k7\}
+[ ]*[a-f0-9]+: 62 f2 55 1f 3b f4 vpminud \{rn-bad\},%zmm4,%zmm5,%zmm6\{%k7\}
[ ]*[a-f0-9]+: 62 f2 7e 48 31 72 7f vpmovdb %zmm6,0x7f0\(%rdx\)
-[ ]*[a-f0-9]+: 62 vpmovdb %zmm6,\(bad\)
-[ ]*[a-f0-9]+: f2 7e 58 bnd jle (0x7d|7d <.text\+0x7d>)
-[ ]*[a-f0-9]+: 31 72 7f xor %esi,0x7f\(%rdx\)
+[ ]*[a-f0-9]+: 62 f2 7e 58 31 72 7f vpmovdb %zmm6,0x7f0\(%rdx\)\{bad\}
#pass
diff --git a/gas/testsuite/gas/i386/x86-64-avx512f-nondef.s b/gas/testsuite/gas/i386/x86-64-avx512f-nondef.s
index 255d2c931f1..952f2db76b3 100644
--- a/gas/testsuite/gas/i386/x86-64-avx512f-nondef.s
+++ b/gas/testsuite/gas/i386/x86-64-avx512f-nondef.s
@@ -5,11 +5,13 @@
.byte 0x62, 0xf3, 0xd5, 0x1f, 0x0b, 0xf4, 0x7b
# vrndscalesd {sae}, $123, %xmm4, %xmm5, %xmm6{%k7} # with not-null RC
.byte 0x62, 0xf3, 0xd5, 0x5f, 0x0b, 0xf4, 0x7b
-# vpminud %zmm4, %zmm5, %zmm6{%k7} # with 111 REX
+# vpminud %zmm4, %zmm5, %zmm6{%k7} # with 11 EVEX.{B,R'}
+.byte 0x62, 0xf2, 0x55, 0x4f, 0x3b, 0xf4
+# vpminud %zmm4, %zmm5, %zmm6{%k7} # with not-11 EVEX.{B,R'}
+.byte 0x62, 0xc2, 0x55, 0x4f, 0x3b, 0xf4
+# vpminud %zmm4, %zmm5, %zmm6{%k7} # with set EVEX.b bit
.byte 0x62, 0xf2, 0x55, 0x1f, 0x3b, 0xf4
-# vpminud %zmm4, %zmm5, %zmm6{%k7} # with not-111 REX
-.byte 0x62, 0xc2, 0x55, 0x1f, 0x3b, 0xf4
-# vpmovdb %zmm6, 2032(%rdx) # with unset EVEX.B bit
+# vpmovdb %zmm6, 2032(%rdx) # with unset EVEX.b bit
.byte 0x62, 0xf2, 0x7e, 0x48, 0x31, 0x72, 0x7f
-# vpmovdb %zmm6, 2032(%rdx) # with set EVEX.B bit - we should get (bad) operand
+# vpmovdb %zmm6, 2032(%rdx) # with set EVEX.b bit - we should get (bad) operand
.byte 0x62, 0xf2, 0x7e, 0x58, 0x31, 0x72, 0x7f
diff --git a/gas/testsuite/gas/i386/x86-64-evex.d b/gas/testsuite/gas/i386/x86-64-evex.d
index 3a7b48e0bf9..041747db892 100644
--- a/gas/testsuite/gas/i386/x86-64-evex.d
+++ b/gas/testsuite/gas/i386/x86-64-evex.d
@@ -9,13 +9,13 @@ Disassembly of section .text:
0+ <_start>:
+[a-f0-9]+: 62 f1 d6 38 2a f0 vcvtsi2ss %rax,\{rd-sae\},%xmm5,%xmm6
- +[a-f0-9]+: 62 f1 57 38 2a f0 vcvtsi2sd %eax,\(bad\),%xmm5,%xmm6
+ +[a-f0-9]+: 62 f1 57 38 2a f0 vcvtsi2sd %eax,\{rd-bad\},%xmm5,%xmm6
+[a-f0-9]+: 62 f1 d7 38 2a f0 vcvtsi2sd %rax,\{rd-sae\},%xmm5,%xmm6
+[a-f0-9]+: 62 f1 d6 08 7b f0 vcvtusi2ss %rax,%xmm5,%xmm6
+[a-f0-9]+: 62 f1 57 08 7b f0 vcvtusi2sd %eax,%xmm5,%xmm6
+[a-f0-9]+: 62 f1 d7 08 7b f0 vcvtusi2sd %rax,%xmm5,%xmm6
+[a-f0-9]+: 62 f1 d6 38 7b f0 vcvtusi2ss %rax,\{rd-sae\},%xmm5,%xmm6
- +[a-f0-9]+: 62 f1 57 38 7b f0 vcvtusi2sd %eax,\(bad\),%xmm5,%xmm6
+ +[a-f0-9]+: 62 f1 57 38 7b f0 vcvtusi2sd %eax,\{rd-bad\},%xmm5,%xmm6
+[a-f0-9]+: 62 f1 d7 38 7b f0 vcvtusi2sd %rax,\{rd-sae\},%xmm5,%xmm6
+[a-f0-9]+: 62 e1 7e 08 2d c0 vcvtss2si %xmm0,\(bad\)
+[a-f0-9]+: 62 e1 7c 08 c2 c0 00 vcmpeqps %xmm0,%xmm0,\(bad\)
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 521d6899338..b25a9f324c0 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -159,6 +159,11 @@ static int rex_used;
current instruction. */
static int used_prefixes;
+/* Flags for EVEX bits which we somehow handled when printing the
+ current instruction. */
+#define EVEX_b_used 1
+static int evex_used;
+
/* Flags stored in PREFIXES. */
#define PREFIX_REPZ 1
#define PREFIX_REPNZ 2
@@ -2524,12 +2529,12 @@ static const char *att_names_mask[] = {
"%k0", "%k1", "%k2", "%k3", "%k4", "%k5", "%k6", "%k7"
};
-static const char *names_rounding[] =
+static const char *const names_rounding[] =
{
- "{rn-sae}",
- "{rd-sae}",
- "{ru-sae}",
- "{rz-sae}"
+ "{rn-",
+ "{rd-",
+ "{ru-",
+ "{rz-"
};
static const struct dis386 reg_table[][8] = {
@@ -8578,6 +8583,7 @@ ckprefix (void)
prefixes = 0;
used_prefixes = 0;
rex_used = 0;
+ evex_used = 0;
last_lock_prefix = -1;
last_repz_prefix = -1;
last_repnz_prefix = -1;
@@ -9661,6 +9667,21 @@ print_insn (bfd_vma pc, disassemble_info *info)
oappend ("/(bad)");
}
}
+
+ /* Check whether rounding control was enabled for an insn not
+ supporting it. */
+ if (modrm.mod == 3 && vex.b && !(evex_used & EVEX_b_used))
+ {
+ for (i = 0; i < MAX_OPERANDS; ++i)
+ {
+ obufp = op_out[i];
+ if (*obufp)
+ continue;
+ oappend (names_rounding[vex.ll]);
+ oappend ("bad}");
+ break;
+ }
+ }
}
}
@@ -11316,14 +11337,6 @@ OP_E_memory (int bytemode, int sizeflag)
if (vex.evex)
{
- /* In EVEX, if operand doesn't allow broadcast, vex.b should be 0. */
- if (vex.b
- && bytemode != x_mode
- && bytemode != evex_half_bcst_xmmq_mode)
- {
- BadOp ();
- return;
- }
switch (bytemode)
{
case dw_mode:
@@ -11764,10 +11777,9 @@ OP_E_memory (int bytemode, int sizeflag)
oappend (scratchbuf);
}
}
- if (vex.b
- && (bytemode == x_mode
- || bytemode == evex_half_bcst_xmmq_mode))
+ if (vex.b)
{
+ evex_used |= EVEX_b_used;
if (vex.w
|| bytemode == evex_half_bcst_xmmq_mode)
{
@@ -11786,7 +11798,7 @@ OP_E_memory (int bytemode, int sizeflag)
abort ();
}
}
- else
+ else if (bytemode == x_mode)
{
switch (vex.length)
{
@@ -11803,6 +11815,9 @@ OP_E_memory (int bytemode, int sizeflag)
abort ();
}
}
+ else
+ /* If operand doesn't allow broadcast, vex.b should be 0. */
+ oappend ("{bad}");
}
}
@@ -13495,24 +13510,25 @@ MOVSXD_Fixup (int bytemode, int sizeflag)
static void
OP_Rounding (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
{
- if (modrm.mod == 3 && vex.b)
- switch (bytemode)
- {
- case evex_rounding_64_mode:
- if (address_mode != mode_64bit || !vex.w)
- {
- oappend ("(bad)");
- break;
- }
- /* Fall through. */
- case evex_rounding_mode:
- oappend (names_rounding[vex.ll]);
- break;
- case evex_sae_mode:
- oappend ("{sae}");
- break;
- default:
- abort ();
- break;
- }
+ if (modrm.mod != 3 || !vex.b)
+ return;
+
+ switch (bytemode)
+ {
+ case evex_rounding_64_mode:
+ if (address_mode != mode_64bit || !vex.w)
+ return;
+ /* Fall through. */
+ case evex_rounding_mode:
+ evex_used |= EVEX_b_used;
+ oappend (names_rounding[vex.ll]);
+ break;
+ case evex_sae_mode:
+ evex_used |= EVEX_b_used;
+ oappend ("{");
+ break;
+ default:
+ abort ();
+ }
+ oappend ("sae}");
}
--
2.33.0

52
0015-x86-Simplify-check-for-distinct-TMM-register-operand.patch
View File

@ -1,52 +0,0 @@
From fc141319027485a7cfcbae2451b048ddc6c33b48 Mon Sep 17 00:00:00 2001
From: "H.J. Lu" <hjl.tools@gmail.com>
Date: Wed, 28 Jul 2021 10:42:47 -0700
Subject: [PATCH] x86: Simplify check for distinct TMM register operands
If any pair of operands in AMX instructions with 3 TMM register operands
are the same, the instruction will UD. Don't call register_number to
check for distinct TMM register operands since all TMM register operands
have the same size.
* config/tc-i386.c (check_VecOperands): Remove register_number
call when checking for distinct TMM register operands.
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index d98c6c4e949..1235c3e7733 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -6076,21 +6076,16 @@ check_VecOperands (const insn_template *t)
}
}
- /* For AMX instructions with three tmmword operands, all tmmword operand must be
- distinct */
- if (t->operand_types[0].bitfield.tmmword
- && i.reg_operands == 3)
- {
- if (register_number (i.op[0].regs)
- == register_number (i.op[1].regs)
- || register_number (i.op[0].regs)
- == register_number (i.op[2].regs)
- || register_number (i.op[1].regs)
- == register_number (i.op[2].regs))
- {
- i.error = invalid_tmm_register_set;
- return 1;
- }
+ /* For AMX instructions with 3 TMM register operands, all operands
+ must be distinct. */
+ if (i.reg_operands == 3
+ && t->operand_types[0].bitfield.tmmword
+ && (i.op[0].regs == i.op[1].regs
+ || i.op[0].regs == i.op[2].regs
+ || i.op[1].regs == i.op[2].regs))
+ {
+ i.error = invalid_tmm_register_set;
+ return 1;
}
/* Check if broadcast is supported by the instruction and is applied
--
2.33.0

90788
0016-PATCH-1-2-Enable-Intel-AVX512_FP16-instructions.patch
View File

File diff suppressed because it is too large Load Diff

26295
0017-PATCH-2-2-Add-tests-for-Intel-AVX512_FP16-instructio.patch
View File

File diff suppressed because it is too large Load Diff

204
0018-x86-ELF-fix-.tfloat-output.patch
View File

@ -1,204 +0,0 @@
From e2295dade838ad296e1e1cd1096177058139b6b3 Mon Sep 17 00:00:00 2001
From: Jan Beulich <jbeulich@suse.com>
Date: Wed, 11 Aug 2021 08:30:26 +0200
Subject: [PATCH] x86/ELF: fix .tfloat output
The ELF psABI-s are quite clear here: On 32-bit the data type is 12
bytes long (with 2 bytes of trailing padding), while on 64-bit it is 16
bytes long (with 6 bytes of padding). Make ieee_md_atof() capable of
handling such padding, and specify the needed padding for x86 (leaving
non-ELF targets alone for now). Split the existing x86 testcase.
diff --git a/gas/config/atof-ieee.c b/gas/config/atof-ieee.c
index fa988aa36ee..e6e8879b51b 100644
--- a/gas/config/atof-ieee.c
+++ b/gas/config/atof-ieee.c
@@ -30,7 +30,13 @@ extern FLONUM_TYPE generic_floating_point_number;
#define F_PRECISION 2
#define D_PRECISION 4
#define X_PRECISION 5
+#ifndef X_PRECISION_PAD
+#define X_PRECISION_PAD 0
+#endif
#define P_PRECISION 5
+#ifndef P_PRECISION_PAD
+#define P_PRECISION_PAD X_PRECISION_PAD
+#endif
/* Length in LittleNums of guard bits. */
#define GUARD 2
@@ -760,7 +766,7 @@ ieee_md_atof (int type,
LITTLENUM_TYPE words[MAX_LITTLENUMS];
LITTLENUM_TYPE *wordP;
char *t;
- int prec = 0;
+ int prec = 0, pad = 0;
if (strchr (FLT_CHARS, type) != NULL)
{
@@ -788,6 +794,7 @@ ieee_md_atof (int type,
case 't':
case 'T':
prec = X_PRECISION;
+ pad = X_PRECISION_PAD;
type = 'x'; /* This is what atof_ieee() understands. */
break;
@@ -803,6 +810,7 @@ ieee_md_atof (int type,
#else
prec = P_PRECISION;
#endif
+ pad = P_PRECISION_PAD;
break;
default:
@@ -835,7 +843,7 @@ ieee_md_atof (int type,
if (t)
input_line_pointer = t;
- *sizeP = prec * sizeof (LITTLENUM_TYPE);
+ *sizeP = (prec + pad) * sizeof (LITTLENUM_TYPE);
if (big_wordian)
{
@@ -854,5 +862,8 @@ ieee_md_atof (int type,
}
}
+ memset (litP, 0, pad * sizeof (LITTLENUM_TYPE));
+ litP += pad * sizeof (LITTLENUM_TYPE);
+
return NULL;
}
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index cdc660f79a4..0fa8b0d5a04 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -10229,6 +10229,19 @@ x86_cons_fix_new (fragS *frag, unsigned int off, unsigned int len,
fix_new_exp (frag, off, len, exp, 0, r);
}
+/* Return the number of padding LITTLENUMs following a tbyte floating
+ point value. */
+
+int
+x86_tfloat_pad (void)
+{
+#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
+ if (IS_ELF)
+ return object_64bit ? 3 : 1;
+#endif
+ return 0;
+}
+
/* Export the ABI address size for use by TC_ADDRESS_BYTES for the
purpose of the `.dc.a' internal pseudo-op. */
diff --git a/gas/config/tc-i386.h b/gas/config/tc-i386.h
index 90d23da7d91..f94226edf78 100644
--- a/gas/config/tc-i386.h
+++ b/gas/config/tc-i386.h
@@ -134,6 +134,9 @@ extern bfd_reloc_code_real_type x86_cons (expressionS *, int);
extern void x86_cons_fix_new
(fragS *, unsigned int, unsigned int, expressionS *, bfd_reloc_code_real_type);
+#define X_PRECISION_PAD x86_tfloat_pad ()
+extern int x86_tfloat_pad (void);
+
#define TC_ADDRESS_BYTES x86_address_bytes
extern int x86_address_bytes (void);
diff --git a/gas/testsuite/gas/i386/fp-elf32.d b/gas/testsuite/gas/i386/fp-elf32.d
new file mode 100644
index 00000000000..6ef9c83ac54
--- /dev/null
+++ b/gas/testsuite/gas/i386/fp-elf32.d
@@ -0,0 +1,12 @@
+#objdump: -s -j .data
+#name: i386 fp (ELF)
+#source: fp.s
+
+.*: file format .*
+
+Contents of section .data:
+ 0000 00881bcd 4b789ad4 00400000 71a37909 .*
+ 0010 4f930a40 789a5440 789a5440 00000000 .*
+ 0020 e65e1710 20395e3b e65e1710 20395e3b .*
+ 0030 00000000 0000a044 01000000 0000a044 .*
+ 0040 00000000 0000f03f .*
diff --git a/gas/testsuite/gas/i386/fp-elf64.d b/gas/testsuite/gas/i386/fp-elf64.d
new file mode 100644
index 00000000000..2e68ac8ebca
--- /dev/null
+++ b/gas/testsuite/gas/i386/fp-elf64.d
@@ -0,0 +1,12 @@
+#objdump: -s -j .data
+#name: x86-64 fp (ELF)
+#source: fp.s
+
+.*: file format .*
+
+Contents of section .data:
+ 0000 00881bcd 4b789ad4 00400000 00000000 .*
+ 0010 71a37909 4f930a40 789a5440 789a5440 .*
+ 0020 e65e1710 20395e3b e65e1710 20395e3b .*
+ 0030 00000000 0000a044 01000000 0000a044 .*
+ 0040 00000000 0000f03f .*
diff --git a/gas/testsuite/gas/i386/fp.s b/gas/testsuite/gas/i386/fp.s
index 11a50cf2683..fca56f29ac1 100644
--- a/gas/testsuite/gas/i386/fp.s
+++ b/gas/testsuite/gas/i386/fp.s
@@ -7,10 +7,10 @@
# .byte 0x71, 0xa3, 0x79, 0x09, 0x4f, 0x93, 0x0a, 0x40
# The next two are 32-bit floating point format.
.float 3.32192809488736218171e0
-# .byte 0x78, 0x9a, 0x54, 0x40, 0, 0, 0, 0
+# .byte 0x78, 0x9a, 0x54, 0x40
.single 3.32192809488736218171e0
-# .byte 0x78, 0x9a, 0x54, 0x40, 0, 0, 0, 0
- .byte 0, 0, 0, 0, 0, 0
+# .byte 0x78, 0x9a, 0x54, 0x40
+ .p2align 4,0
# The assembler used to treat the next value as zero instead of 1e-22.
.double .0000000000000000000001
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index 3464bc2702b..122da6a2315 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -118,7 +118,6 @@ if [gas_32_check] then {
run_list_test "lockbad-1" "-al"
run_dump_test "long-1"
run_dump_test "long-1-intel"
- run_dump_test "fp"
run_dump_test "nops"
run_dump_test "nops16-1"
run_dump_test "nops-1"
@@ -624,6 +623,7 @@ if [gas_32_check] then {
run_dump_test "intel-movs16"
run_dump_test "intel-cmps32"
run_dump_test "intel-cmps16"
+ run_dump_test "fp-elf32"
run_list_test "inval-equ-1" "-al"
run_list_test "inval-equ-2" "-al"
run_dump_test "ifunc"
@@ -697,6 +697,8 @@ if [gas_32_check] then {
run_dump_test "iamcu-5"
run_list_test "iamcu-inval-1" "-march=iamcu -al"
}
+ } else {
+ run_dump_test "fp"
}
# This is a PE specific test.
@@ -1274,6 +1276,7 @@ if [gas_64_check] then {
run_list_test "reloc64" "--defsym _bad_=1"
run_dump_test "mixed-mode-reloc64"
run_dump_test "rela"
+ run_dump_test "fp-elf64"
run_dump_test "x86-64-ifunc"
run_dump_test "x86-64-opcode-inval"
run_dump_test "x86-64-opcode-inval-intel"
--
2.33.0

155
0019-x86-ELF-fix-.ds.x-output.patch
View File

@ -1,155 +0,0 @@
From e74e2b4c336fad993b0dd31b859af919ad52ec9e Mon Sep 17 00:00:00 2001
From: Jan Beulich <jbeulich@suse.com>
Date: Wed, 11 Aug 2021 08:31:03 +0200
Subject: [PATCH] x86/ELF: fix .ds.x output
The ELF psABI-s are quite clear here: On 32-bit the underlying data type
is 12 bytes long (with 2 bytes of trailing padding), while on 64-bit it
is 16 bytes long (with 6 bytes of padding). Make s_space() capable of
handling 'x' (and 'p') type floating point being other than 12 bytes
wide (also adjusting documentation). This requires duplicating the
definition of X_PRECISION in the target speciifc header; the compiler
would complain if this was out of sync with config/atof-ieee.c.
Note that for now padding space doesn't get separated from actual
storage, which means that things will work correctly only for little-
endian cases, and which also means that by specifying large enough
numbers padding space can be set to non-zero. Since the logic is needed
for a single little-endian architecture only for now, I'm hoping that
this might be acceptable for the time being; otherwise the change will
become more intrusive.
Note also that this brings the emitted data size of .ds.x vs .tfloat in
line for non-ELF targets as well; the issue will be even more obvious
when further taking into account a subsequent patch fixing .dc.x/.dcb.x
(where output sizes currently differ depending on input format).
Extend existing x86 testcases.
diff --git a/gas/config/tc-i386.h b/gas/config/tc-i386.h
index f94226edf78..2dc6312f28e 100644
--- a/gas/config/tc-i386.h
+++ b/gas/config/tc-i386.h
@@ -134,6 +134,7 @@ extern bfd_reloc_code_real_type x86_cons (expressionS *, int);
extern void x86_cons_fix_new
(fragS *, unsigned int, unsigned int, expressionS *, bfd_reloc_code_real_type);
+#define X_PRECISION 5
#define X_PRECISION_PAD x86_tfloat_pad ()
extern int x86_tfloat_pad (void);
diff --git a/gas/doc/as.texi b/gas/doc/as.texi
index 292c4af2bb6..b8d5b9be15e 100644
--- a/gas/doc/as.texi
+++ b/gas/doc/as.texi
@@ -5125,13 +5125,13 @@ Emits 8-byte values.
@item @samp{.l}
Emits 4-byte values.
@item @samp{.p}
-Emits 12-byte values.
+Emits values with size matching packed-decimal floating-point ones.
@item @samp{.s}
Emits 4-byte values.
@item @samp{.w}
Emits 2-byte values.
@item @samp{.x}
-Emits 12-byte values.
+Emits values with size matching long double precision floating-point ones.
@end table
Note - unlike the @code{.dcb} directive the @samp{.d}, @samp{.s} and @samp{.x}
diff --git a/gas/read.c b/gas/read.c
index ea9261e639b..6bba696cebc 100644
--- a/gas/read.c
+++ b/gas/read.c
@@ -382,10 +382,10 @@ static const pseudo_typeS potable[] = {
{"ds.b", s_space, 1},
{"ds.d", s_space, 8},
{"ds.l", s_space, 4},
- {"ds.p", s_space, 12},
+ {"ds.p", s_space, 'p'},
{"ds.s", s_space, 4},
{"ds.w", s_space, 2},
- {"ds.x", s_space, 12},
+ {"ds.x", s_space, 'x'},
{"debug", s_ignore, 0},
#ifdef S_SET_DESC
{"desc", s_desc, 0},
@@ -3327,6 +3327,29 @@ s_space (int mult)
md_flush_pending_output ();
#endif
+ switch (mult)
+ {
+ case 'x':
+#ifdef X_PRECISION
+# ifndef P_PRECISION
+# define P_PRECISION X_PRECISION
+# define P_PRECISION_PAD X_PRECISION_PAD
+# endif
+ mult = (X_PRECISION + X_PRECISION_PAD) * sizeof (LITTLENUM_TYPE);
+ if (!mult)
+#endif
+ mult = 12;
+ break;
+
+ case 'p':
+#ifdef P_PRECISION
+ mult = (P_PRECISION + P_PRECISION_PAD) * sizeof (LITTLENUM_TYPE);
+ if (!mult)
+#endif
+ mult = 12;
+ break;
+ }
+
#ifdef md_cons_align
md_cons_align (1);
#endif
diff --git a/gas/testsuite/gas/i386/fp-elf32.d b/gas/testsuite/gas/i386/fp-elf32.d
index 6ef9c83ac54..9e1254615ec 100644
--- a/gas/testsuite/gas/i386/fp-elf32.d
+++ b/gas/testsuite/gas/i386/fp-elf32.d
@@ -9,4 +9,5 @@ Contents of section .data:
0010 4f930a40 789a5440 789a5440 00000000 .*
0020 e65e1710 20395e3b e65e1710 20395e3b .*
0030 00000000 0000a044 01000000 0000a044 .*
- 0040 00000000 0000f03f .*
+ 0040 00000000 0000f03f 00000000 00000000 .*
+ 0050 ffffffff ffffffff ffffffff cccccccc .*
diff --git a/gas/testsuite/gas/i386/fp-elf64.d b/gas/testsuite/gas/i386/fp-elf64.d
index 2e68ac8ebca..0314929cf9c 100644
--- a/gas/testsuite/gas/i386/fp-elf64.d
+++ b/gas/testsuite/gas/i386/fp-elf64.d
@@ -9,4 +9,5 @@ Contents of section .data:
0010 71a37909 4f930a40 789a5440 789a5440 .*
0020 e65e1710 20395e3b e65e1710 20395e3b .*
0030 00000000 0000a044 01000000 0000a044 .*
- 0040 00000000 0000f03f .*
+ 0040 00000000 0000f03f 00000000 00000000 .*
+ 0050 ffffffff ffffffff ffffffff ffffffff .*
diff --git a/gas/testsuite/gas/i386/fp.d b/gas/testsuite/gas/i386/fp.d
index edf79ff9996..dd7e028b44b 100644
--- a/gas/testsuite/gas/i386/fp.d
+++ b/gas/testsuite/gas/i386/fp.d
@@ -8,4 +8,5 @@ Contents of section .data:
0010 0a40789a 5440789a 54400000 00000000 .*
0020 e65e1710 20395e3b e65e1710 20395e3b .*
0030 00000000 0000a044 01000000 0000a044 .*
- 0040 00000000 0000f03f .*
+ 0040 00000000 0000f03f 00000000 00000000 .*
+ 0050 ffffffff ffffffff ffffcccc cccccccc .*
diff --git a/gas/testsuite/gas/i386/fp.s b/gas/testsuite/gas/i386/fp.s
index fca56f29ac1..601709c2196 100644
--- a/gas/testsuite/gas/i386/fp.s
+++ b/gas/testsuite/gas/i386/fp.s
@@ -20,3 +20,7 @@
.double 37778931862957165903873.0
# Ensure we handle a crazy number of digits
.double 1.000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001
+ .p2align 4,0
+
+ .ds.x 1, -1
+ .p2align 4,0xcc
--
2.33.0

113
0020-x86-ELF-fix-.tfloat-output-with-hex-input.patch
View File

@ -1,113 +0,0 @@
From 8f2200fe8e7f17295ed6d9bbc908da533c95e089 Mon Sep 17 00:00:00 2001
From: Jan Beulich <jbeulich@suse.com>
Date: Wed, 11 Aug 2021 08:31:41 +0200
Subject: [PATCH] x86/ELF: fix .tfloat output with hex input
The ELF psABI-s are quite clear here: On 32-bit the data type is 12
bytes long (with 2 bytes of trailing padding), while on 64-bit it is 16
bytes long (with 6 bytes of padding). Make hex_float() capable of
handling such padding.
Note that this brings the emitted data size of .dc.x / .dcb.x in line
also for non-ELF targets; so far they were different depending on input
format (dec vs hex).
Extend the existing x86 testcases.
diff --git a/gas/read.c b/gas/read.c
index 6bba696cebc..b8e845dd569 100644
--- a/gas/read.c
+++ b/gas/read.c
@@ -4847,7 +4847,7 @@ parse_repeat_cons (expressionS *exp, unsigned int nbytes)
static int
hex_float (int float_type, char *bytes)
{
- int length;
+ int length, pad = 0;
int i;
switch (float_type)
@@ -4868,12 +4868,22 @@ hex_float (int float_type, char *bytes)
case 'x':
case 'X':
- length = 12;
+#ifdef X_PRECISION
+ length = X_PRECISION * sizeof (LITTLENUM_TYPE);
+ pad = X_PRECISION_PAD * sizeof (LITTLENUM_TYPE);
+ if (!length)
+#endif
+ length = 12;
break;
case 'p':
case 'P':
- length = 12;
+#ifdef P_PRECISION
+ length = P_PRECISION * sizeof (LITTLENUM_TYPE);
+ pad = P_PRECISION_PAD * sizeof (LITTLENUM_TYPE);
+ if (!length)
+#endif
+ length = 12;
break;
default:
@@ -4926,7 +4936,9 @@ hex_float (int float_type, char *bytes)
memset (bytes, 0, length - i);
}
- return length;
+ memset (bytes + length, 0, pad);
+
+ return length + pad;
}
/* float_cons()
diff --git a/gas/testsuite/gas/i386/fp-elf32.d b/gas/testsuite/gas/i386/fp-elf32.d
index 9e1254615ec..eefe84db310 100644
--- a/gas/testsuite/gas/i386/fp-elf32.d
+++ b/gas/testsuite/gas/i386/fp-elf32.d
@@ -11,3 +11,6 @@ Contents of section .data:
0030 00000000 0000a044 01000000 0000a044 .*
0040 00000000 0000f03f 00000000 00000000 .*
0050 ffffffff ffffffff ffffffff cccccccc .*
+ 0060 00000000 00000080 fe3f0000 00000000 .*
+ 0070 00000080 fdbf0000 00000000 00000080 .*
+ 0080 ff030000 aaaaaaaa aaaaaaaa aaaaaaaa .*
diff --git a/gas/testsuite/gas/i386/fp-elf64.d b/gas/testsuite/gas/i386/fp-elf64.d
index 0314929cf9c..0756aa1e36a 100644
--- a/gas/testsuite/gas/i386/fp-elf64.d
+++ b/gas/testsuite/gas/i386/fp-elf64.d
@@ -11,3 +11,6 @@ Contents of section .data:
0030 00000000 0000a044 01000000 0000a044 .*
0040 00000000 0000f03f 00000000 00000000 .*
0050 ffffffff ffffffff ffffffff ffffffff .*
+ 0060 00000000 00000080 fe3f0000 00000000 .*
+ 0070 00000000 00000080 fdbf0000 00000000 .*
+ 0080 00000000 00000080 ff030000 00000000 .*
diff --git a/gas/testsuite/gas/i386/fp.d b/gas/testsuite/gas/i386/fp.d
index dd7e028b44b..b93595ac8c3 100644
--- a/gas/testsuite/gas/i386/fp.d
+++ b/gas/testsuite/gas/i386/fp.d
@@ -10,3 +10,5 @@ Contents of section .data:
0030 00000000 0000a044 01000000 0000a044 .*
0040 00000000 0000f03f 00000000 00000000 .*
0050 ffffffff ffffffff ffffcccc cccccccc .*
+ 0060 00000000 00000080 fe3f0000 00000000 .*
+ 0070 0080fdbf 00000000 00000080 ff03aaaa .*
diff --git a/gas/testsuite/gas/i386/fp.s b/gas/testsuite/gas/i386/fp.s
index 601709c2196..7fe642e5180 100644
--- a/gas/testsuite/gas/i386/fp.s
+++ b/gas/testsuite/gas/i386/fp.s
@@ -24,3 +24,8 @@
.ds.x 1, -1
.p2align 4,0xcc
+
+ .tfloat 0x:3ffe80
+ .dc.x 0x:bffd80
+ .dcb.x 1, 0x:03ff80
+ .p2align 4,0xaa
--
2.33.0

121
0021-x86-introduce-.hfloat-directive.patch
View File

@ -1,121 +0,0 @@
From 7d19d096292acac01d0fde4d99c3e49d69688e03 Mon Sep 17 00:00:00 2001
From: Jan Beulich <jbeulich@suse.com>
Date: Wed, 11 Aug 2021 08:32:54 +0200
Subject: [PATCH] x86: introduce .hfloat directive
This is to be able to generate data passed to {,V}CVTPH2PS and acted
upon by AVX512-FP16 insns. To be able to also use the hex forms
supported for other floating point formats, a small addition to the
generic hex_float() is needed.
Extend existing x86 testcases.
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 0fa8b0d5a04..a9e36213390 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -512,7 +512,7 @@ const char EXP_CHARS[] = "eE";
/* Chars that mean this number is a floating point constant
As in 0f12.456
or 0d1.2345e12. */
-const char FLT_CHARS[] = "fFdDxX";
+const char FLT_CHARS[] = "fFdDxXhH";
/* Tables for lexical analysis. */
static char mnemonic_chars[256];
@@ -1356,6 +1356,7 @@ const pseudo_typeS md_pseudo_table[] =
{"ffloat", float_cons, 'f'},
{"dfloat", float_cons, 'd'},
{"tfloat", float_cons, 'x'},
+ {"hfloat", float_cons, 'h'},
{"value", cons, 2},
{"slong", signed_cons, 4},
{"noopt", s_ignore, 0},
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index 9058ad444b0..664237c75c9 100644
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -1313,18 +1313,21 @@ data type. Constructors build these data types into memory.
@cindex @code{single} directive, i386
@cindex @code{double} directive, i386
@cindex @code{tfloat} directive, i386
+@cindex @code{hfloat} directive, i386
@cindex @code{float} directive, x86-64
@cindex @code{single} directive, x86-64
@cindex @code{double} directive, x86-64
@cindex @code{tfloat} directive, x86-64
+@cindex @code{hfloat} directive, x86-64
@itemize @bullet
@item
Floating point constructors are @samp{.float} or @samp{.single},
-@samp{.double}, and @samp{.tfloat} for 32-, 64-, and 80-bit formats.
-These correspond to instruction mnemonic suffixes @samp{s}, @samp{l},
-and @samp{t}. @samp{t} stands for 80-bit (ten byte) real. The 80387
-only supports this format via the @samp{fldt} (load 80-bit real to stack
-top) and @samp{fstpt} (store 80-bit real and pop stack) instructions.
+@samp{.double}, @samp{.tfloat}, and @samp{.hfloat} for 32-, 64-, 80-, and
+16-bit formats respectively. The former three correspond to instruction
+mnemonic suffixes @samp{s}, @samp{l}, and @samp{t}. @samp{t} stands for
+80-bit (ten byte) real. The 80387 only supports this format via the
+@samp{fldt} (load 80-bit real to stack top) and @samp{fstpt} (store 80-bit
+real and pop stack) instructions.
@cindex @code{word} directive, i386
@cindex @code{long} directive, i386
diff --git a/gas/read.c b/gas/read.c
index b8e845dd569..4170a254030 100644
--- a/gas/read.c
+++ b/gas/read.c
@@ -4852,6 +4852,11 @@ hex_float (int float_type, char *bytes)
switch (float_type)
{
+ case 'h':
+ case 'H':
+ length = 2;
+ break;
+
case 'f':
case 'F':
case 's':
diff --git a/gas/testsuite/gas/i386/fp-elf32.d b/gas/testsuite/gas/i386/fp-elf32.d
index eefe84db310..d25eed8b8ef 100644
--- a/gas/testsuite/gas/i386/fp-elf32.d
+++ b/gas/testsuite/gas/i386/fp-elf32.d
@@ -14,3 +14,4 @@ Contents of section .data:
0060 00000000 00000080 fe3f0000 00000000 .*
0070 00000080 fdbf0000 00000000 00000080 .*
0080 ff030000 aaaaaaaa aaaaaaaa aaaaaaaa .*
+ 0090 003c00c0 003c5555 55555555 55555555 .*
diff --git a/gas/testsuite/gas/i386/fp-elf64.d b/gas/testsuite/gas/i386/fp-elf64.d
index 0756aa1e36a..bdc8f86662e 100644
--- a/gas/testsuite/gas/i386/fp-elf64.d
+++ b/gas/testsuite/gas/i386/fp-elf64.d
@@ -14,3 +14,4 @@ Contents of section .data:
0060 00000000 00000080 fe3f0000 00000000 .*
0070 00000000 00000080 fdbf0000 00000000 .*
0080 00000000 00000080 ff030000 00000000 .*
+ 0090 003c00c0 003c5555 55555555 55555555 .*
diff --git a/gas/testsuite/gas/i386/fp.d b/gas/testsuite/gas/i386/fp.d
index b93595ac8c3..65a5fccd6ee 100644
--- a/gas/testsuite/gas/i386/fp.d
+++ b/gas/testsuite/gas/i386/fp.d
@@ -12,3 +12,4 @@ Contents of section .data:
0050 ffffffff ffffffff ffffcccc cccccccc .*
0060 00000000 00000080 fe3f0000 00000000 .*
0070 0080fdbf 00000000 00000080 ff03aaaa .*
+ 0080 003c00c0 003c5555 55555555 55555555 .*
diff --git a/gas/testsuite/gas/i386/fp.s b/gas/testsuite/gas/i386/fp.s
index 7fe642e5180..8976dd82f60 100644
--- a/gas/testsuite/gas/i386/fp.s
+++ b/gas/testsuite/gas/i386/fp.s
@@ -29,3 +29,6 @@
.dc.x 0x:bffd80
.dcb.x 1, 0x:03ff80
.p2align 4,0xaa
+
+ .hfloat 1, -2, 0x:3c00
+ .p2align 4,0x55
--
2.33.0

103
0022-x86-Avoid-abort-on-invalid-broadcast.patch
View File

@ -1,103 +0,0 @@
From 7e40d574be8b8bc01d3726b90556cff0081e9dd9 Mon Sep 17 00:00:00 2001
From: "H.J. Lu" <hjl.tools@gmail.com>
Date: Thu, 19 Aug 2021 06:38:21 -0700
Subject: [PATCH] x86: Avoid abort on invalid broadcast
Print "{bad}" on invalid broadcast instead of abort.
gas/
PR binutils/28247
* testsuite/gas/i386/bad-bcast.d: New file.
* testsuite/gas/i386/bad-bcast.s: Likewise.
* testsuite/gas/i386/i386.exp: Run bad-bcast.
opcodes/
PR binutils/28247
* i386-dis.c (OP_E_memory): Print "{bad}" on invalid broadcast
instead of abort.
diff --git a/gas/testsuite/gas/i386/bad-bcast.d b/gas/testsuite/gas/i386/bad-bcast.d
new file mode 100644
index 00000000000..9fc474a42ff
--- /dev/null
+++ b/gas/testsuite/gas/i386/bad-bcast.d
@@ -0,0 +1,14 @@
+#objdump: -dw
+#name: Disassemble bad broadcast
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <.text>:
+ +[a-f0-9]+: 62 .byte 0x62
+ +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: 8c 1d 66 90 66 90 mov %ds,0x90669066
+ +[a-f0-9]+: 66 90 xchg %ax,%ax
+#pass
diff --git a/gas/testsuite/gas/i386/bad-bcast.s b/gas/testsuite/gas/i386/bad-bcast.s
new file mode 100644
index 00000000000..e09c3aae5de
--- /dev/null
+++ b/gas/testsuite/gas/i386/bad-bcast.s
@@ -0,0 +1,2 @@
+ .text
+ .byte 0x62, 0xc3, 0x8c, 0x1d, 0x66, 0x90, 0x66, 0x90, 0x66, 0x90
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index f5eda2cf331..80959726d0e 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -646,6 +646,7 @@ if [gas_32_check] then {
run_dump_test "dw2-compress-2"
run_dump_test "dw2-compressed-2"
+ run_dump_test "bad-bcast"
run_dump_test "bad-size"
run_dump_test "size-1"
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 2c7027ca6f1..acb5a0faa88 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -11912,7 +11912,7 @@ OP_E_memory (int bytemode, int sizeflag)
{
if (vex.w)
{
- abort ();
+ oappend ("{bad}");
}
else
{
@@ -11928,7 +11928,7 @@ OP_E_memory (int bytemode, int sizeflag)
oappend ("{1to32}");
break;
default:
- abort ();
+ oappend ("{bad}");
}
}
}
@@ -11948,7 +11948,7 @@ OP_E_memory (int bytemode, int sizeflag)
oappend ("{1to8}");
break;
default:
- abort ();
+ oappend ("{bad}");
}
}
else if (bytemode == x_mode
@@ -11966,7 +11966,7 @@ OP_E_memory (int bytemode, int sizeflag)
oappend ("{1to16}");
break;
default:
- abort ();
+ oappend ("{bad}");
}
}
else
--
2.33.0

59
0023-x86-Put-back-3-aborts-in-OP_E_memory.patch
View File

@ -1,59 +0,0 @@
From ca22cf5ed52c1b4c40dbadf893f558ef09d0c66b Mon Sep 17 00:00:00 2001
From: "H.J. Lu" <hjl.tools@gmail.com>
Date: Thu, 19 Aug 2021 07:39:10 -0700
Subject: [PATCH] x86: Put back 3 aborts in OP_E_memory
Put back 3 aborts where invalid lengths should have been filtered out.
gas/
PR binutils/28247
* testsuite/gas/i386/bad-bcast.s: Add a comment.
opcodes/
PR binutils/28247
* * i386-dis.c (OP_E_memory): Put back 3 aborts.
diff --git a/gas/testsuite/gas/i386/bad-bcast.s b/gas/testsuite/gas/i386/bad-bcast.s
index e09c3aae5de..3e49b2238ed 100644
--- a/gas/testsuite/gas/i386/bad-bcast.s
+++ b/gas/testsuite/gas/i386/bad-bcast.s
@@ -1,2 +1,3 @@
.text
+# Invalid 16-bit broadcast with EVEX.W == 1.
.byte 0x62, 0xc3, 0x8c, 0x1d, 0x66, 0x90, 0x66, 0x90, 0x66, 0x90
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index acb5a0faa88..aa292233d4d 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -11928,7 +11928,7 @@ OP_E_memory (int bytemode, int sizeflag)
oappend ("{1to32}");
break;
default:
- oappend ("{bad}");
+ abort ();
}
}
}
@@ -11948,7 +11948,7 @@ OP_E_memory (int bytemode, int sizeflag)
oappend ("{1to8}");
break;
default:
- oappend ("{bad}");
+ abort ();
}
}
else if (bytemode == x_mode
@@ -11966,7 +11966,7 @@ OP_E_memory (int bytemode, int sizeflag)
oappend ("{1to16}");
break;
default:
- oappend ("{bad}");
+ abort ();
}
}
else
--
2.33.0

279
0024-x86-Print-bad-on-invalid-broadcast-in-OP_E_memory.patch
View File

@ -1,279 +0,0 @@
From 2c02075a8ec5223bc4cbcc9561eb91e28d46a9e5 Mon Sep 17 00:00:00 2001
From: "Cui,Lili" <lili.cui@intel.com>
Date: Tue, 28 Sep 2021 11:13:33 +0800
Subject: [PATCH] x86: Print {bad} on invalid broadcast in OP_E_memory
Don't print broadcast for scalar_mode, and print {bad} for invalid broadcast.
gas/
PR binutils/28381
* testsuite/gas/i386/bad-bcast.s: Add a new testcase.
* testsuite/gas/i386/bad-bcast.d: Likewise.
* testsuite/gas/i386/bad-bcast-intel.d: New.
opcodes/
PR binutils/28381
* i386-dis.c (static struct): Add no_broadcast.
(OP_E_memory): Mark invalid broadcast with no_broadcast=1 and Print "{bad}"for it.
(intel_operand_size): mark invalid broadcast with no_broadcast=1.
(OP_XMM): Mark scalar_mode with no_broadcast=1.
diff --git a/gas/testsuite/gas/i386/bad-bcast-intel.d b/gas/testsuite/gas/i386/bad-bcast-intel.d
new file mode 100644
index 00000000000..29de3de299c
--- /dev/null
+++ b/gas/testsuite/gas/i386/bad-bcast-intel.d
@@ -0,0 +1,15 @@
+#source: bad-bcast.s
+#objdump: -dw -Mintel
+#name: Disassemble bad broadcast (Intel mode)
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <.text>:
+[ ]*[a-f0-9]+:[ ]*62 c3 8c 1d 66\s*\(bad\)
+[ ]*[a-f0-9]+:[ ]*90\s*nop
+[ ]*[a-f0-9]+:[ ]*66 90\s*xchg ax,ax
+[ ]*[a-f0-9]+:[ ]*66 90\s*xchg ax,ax
+[ ]*[a-f0-9]+:[ ]*62 c1 ff 38 2a 20\s*vcvtsi2sd xmm4,xmm0,\[eax\]{bad}
+#pass
diff --git a/gas/testsuite/gas/i386/bad-bcast.d b/gas/testsuite/gas/i386/bad-bcast.d
index 9fc474a42ff..4f829259994 100644
--- a/gas/testsuite/gas/i386/bad-bcast.d
+++ b/gas/testsuite/gas/i386/bad-bcast.d
@@ -7,8 +7,8 @@
Disassembly of section .text:
0+ <.text>:
- +[a-f0-9]+: 62 .byte 0x62
- +[a-f0-9]+: c3 ret
- +[a-f0-9]+: 8c 1d 66 90 66 90 mov %ds,0x90669066
- +[a-f0-9]+: 66 90 xchg %ax,%ax
-#pass
+ +[a-f0-9]+: 62 c3 8c 1d 66\s+\(bad\)
+ +[a-f0-9]+: 90\s+nop
+ +[a-f0-9]+: 66 90\s+xchg %ax,%ax
+ +[a-f0-9]+: 66 90\s+xchg %ax,%ax
+ +[a-f0-9]+: 62 c1 ff 38 2a 20\s+vcvtsi2sd \(%eax\){bad},%xmm0,%xmm4
diff --git a/gas/testsuite/gas/i386/bad-bcast.s b/gas/testsuite/gas/i386/bad-bcast.s
index 3e49b2238ed..6c55dcbbbd8 100644
--- a/gas/testsuite/gas/i386/bad-bcast.s
+++ b/gas/testsuite/gas/i386/bad-bcast.s
@@ -1,3 +1,5 @@
.text
# Invalid 16-bit broadcast with EVEX.W == 1.
.byte 0x62, 0xc3, 0x8c, 0x1d, 0x66, 0x90, 0x66, 0x90, 0x66, 0x90
+# Invalid vcvtsi2sd with EVEX.b == 1.
+ .byte 0x62,0xc1,0xff,0x38,0x2a,0x20
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index 80959726d0e..680259b1c4e 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -646,6 +646,7 @@ if [gas_32_check] then {
run_dump_test "dw2-compress-2"
run_dump_test "dw2-compressed-2"
+ run_dump_test "bad-bcast-intel"
run_dump_test "bad-bcast"
run_dump_test "bad-size"
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index aa292233d4d..926f776de88 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -2422,6 +2422,7 @@ static struct
int zeroing;
int ll;
int b;
+ int no_broadcast;
}
vex;
static unsigned char need_vex;
@@ -11059,23 +11060,25 @@ intel_operand_size (int bytemode, int sizeflag)
{
if (vex.b)
{
- switch (bytemode)
- {
- case x_mode:
- case evex_half_bcst_xmmq_mode:
- if (vex.w)
- oappend ("QWORD PTR ");
- else
- oappend ("DWORD PTR ");
- break;
- case xh_mode:
- case evex_half_bcst_xmmqh_mode:
- case evex_half_bcst_xmmqdh_mode:
- oappend ("WORD PTR ");
- break;
- default:
- abort ();
- }
+ if (!vex.no_broadcast)
+ switch (bytemode)
+ {
+ case x_mode:
+ case evex_half_bcst_xmmq_mode:
+ if (vex.w)
+ oappend ("QWORD PTR ");
+ else
+ oappend ("DWORD PTR ");
+ break;
+ case xh_mode:
+ case evex_half_bcst_xmmqh_mode:
+ case evex_half_bcst_xmmqdh_mode:
+ oappend ("WORD PTR ");
+ break;
+ default:
+ vex.no_broadcast = 1;
+ break;
+ }
return;
}
switch (bytemode)
@@ -11908,69 +11911,71 @@ OP_E_memory (int bytemode, int sizeflag)
if (vex.b)
{
evex_used |= EVEX_b_used;
- if (bytemode == xh_mode)
- {
- if (vex.w)
- {
- oappend ("{bad}");
- }
- else
- {
- switch (vex.length)
- {
- case 128:
- oappend ("{1to8}");
- break;
- case 256:
- oappend ("{1to16}");
- break;
- case 512:
- oappend ("{1to32}");
- break;
- default:
- abort ();
- }
- }
- }
- else if (vex.w
- || bytemode == evex_half_bcst_xmmqdh_mode
- || bytemode == evex_half_bcst_xmmq_mode)
+ if (!vex.no_broadcast)
{
- switch (vex.length)
+ if (bytemode == xh_mode)
{
- case 128:
- oappend ("{1to2}");
- break;
- case 256:
- oappend ("{1to4}");
- break;
- case 512:
- oappend ("{1to8}");
- break;
- default:
- abort ();
+ if (vex.w)
+ oappend ("{bad}");
+ else
+ {
+ switch (vex.length)
+ {
+ case 128:
+ oappend ("{1to8}");
+ break;
+ case 256:
+ oappend ("{1to16}");
+ break;
+ case 512:
+ oappend ("{1to32}");
+ break;
+ default:
+ abort ();
+ }
+ }
}
- }
- else if (bytemode == x_mode
- || bytemode == evex_half_bcst_xmmqh_mode)
- {
- switch (vex.length)
+ else if (vex.w
+ || bytemode == evex_half_bcst_xmmqdh_mode
+ || bytemode == evex_half_bcst_xmmq_mode)
{
- case 128:
- oappend ("{1to4}");
- break;
- case 256:
- oappend ("{1to8}");
- break;
- case 512:
- oappend ("{1to16}");
- break;
- default:
- abort ();
+ switch (vex.length)
+ {
+ case 128:
+ oappend ("{1to2}");
+ break;
+ case 256:
+ oappend ("{1to4}");
+ break;
+ case 512:
+ oappend ("{1to8}");
+ break;
+ default:
+ abort ();
+ }
+ }
+ else if (bytemode == x_mode
+ || bytemode == evex_half_bcst_xmmqh_mode)
+ {
+ switch (vex.length)
+ {
+ case 128:
+ oappend ("{1to4}");
+ break;
+ case 256:
+ oappend ("{1to8}");
+ break;
+ case 512:
+ oappend ("{1to16}");
+ break;
+ default:
+ abort ();
+ }
}
+ else
+ vex.no_broadcast = 1;
}
- else
- /* If operand doesn't allow broadcast, vex.b should be 0. */
+ if (vex.no_broadcast)
oappend ("{bad}");
}
}
@@ -12685,6 +12690,8 @@ OP_XMM (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
if (bytemode == tmm_mode)
modrm.reg = reg;
+ else if (bytemode == scalar_mode)
+ vex.no_broadcast = 1;
print_vector_reg (reg, bytemode);
}
--
2.33.0

1427
0025-x86-Terminate-mnemonicendp-in-swap_operand.patch
View File

File diff suppressed because it is too large Load Diff

6257
0026-opcodes-Make-i386-dis.c-thread-safe.patch
View File

File diff suppressed because it is too large Load Diff

423
0027-x86-reduce-AVX512-FP16-set-of-insns-decoded-through-.patch
View File

@ -1,423 +0,0 @@
From 2235ecb8afebeb56baf29eb98de34cfa1b95f697 Mon Sep 17 00:00:00 2001
From: Jan Beulich <jbeulich@suse.com>
Date: Fri, 14 Jan 2022 10:54:21 +0100
Subject: [PATCH] x86: reduce AVX512-FP16 set of insns decoded through
vex_w_table[]
Like already indicated during review of the original submission, there's
really only very few insns where going through this table is easier /
cheaper than using suitable macros. Utilize %XH more and introduce
similar %XS and %XD (which subsequently can be used for further table
size reduction).
While there also switch to using oappend() in 'XH' macro processing.
diff --git a/opcodes/i386-dis-evex-prefix.h b/opcodes/i386-dis-evex-prefix.h
index 9c8156ac11e..64a43ce02a1 100644
--- a/opcodes/i386-dis-evex-prefix.h
+++ b/opcodes/i386-dis-evex-prefix.h
@@ -375,17 +375,17 @@
{ "vfmsub213s%XW", { XMScalar, VexScalar, EXdq, EXxEVexR }, 0 },
{ "v4fnmaddss", { XMScalar, VexScalar, Mxmm }, 0 },
},
- /* PREFIX_EVEX_0F3A08_W_0 */
+ /* PREFIX_EVEX_0F3A08 */
{
- { "vrndscaleph", { XM, EXxh, EXxEVexS, Ib }, 0 },
+ { "vrndscalep%XH", { XM, EXxh, EXxEVexS, Ib }, 0 },
{ Bad_Opcode },
- { "vrndscaleps", { XM, EXx, EXxEVexS, Ib }, 0 },
+ { "vrndscalep%XS", { XM, EXx, EXxEVexS, Ib }, 0 },
},
- /* PREFIX_EVEX_0F3A0A_W_0 */
+ /* PREFIX_EVEX_0F3A0A */
{
- { "vrndscalesh", { XMScalar, VexScalar, EXw, EXxEVexS, Ib }, 0 },
+ { "vrndscales%XH", { XMScalar, VexScalar, EXw, EXxEVexS, Ib }, 0 },
{ Bad_Opcode },
- { "vrndscaless", { XMScalar, VexScalar, EXd, EXxEVexS, Ib }, 0 },
+ { "vrndscales%XS", { XMScalar, VexScalar, EXd, EXxEVexS, Ib }, 0 },
},
/* PREFIX_EVEX_0F3A26 */
{
@@ -482,27 +482,18 @@
{ "vmulp%XH", { XM, Vex, EXxh, EXxEVexR }, 0 },
{ "vmuls%XH", { XMM, VexScalar, EXw, EXxEVexR }, 0 },
},
- /* PREFIX_EVEX_MAP5_5A_W_0 */
+ /* PREFIX_EVEX_MAP5_5A */
{
- { "vcvtph2pd", { XM, EXxmmqdh, EXxEVexS }, 0 },
- { "vcvtsh2sd", { XMM, VexScalar, EXw, EXxEVexS }, 0 },
+ { "vcvtp%XH2pd", { XM, EXxmmqdh, EXxEVexS }, 0 },
+ { "vcvts%XH2sd", { XMM, VexScalar, EXw, EXxEVexS }, 0 },
+ { "vcvtp%XD2ph%XZ", { XMM, EXx, EXxEVexR }, 0 },
+ { "vcvts%XD2sh", { XMM, VexScalar, EXq, EXxEVexR }, 0 },
},
- /* PREFIX_EVEX_MAP5_5A_W_1 */
+ /* PREFIX_EVEX_MAP5_5B */
{
- { Bad_Opcode },
- { Bad_Opcode },
- { "vcvtpd2ph%XZ", { XMM, EXx, EXxEVexR }, 0 },
- { "vcvtsd2sh", { XMM, VexScalar, EXq, EXxEVexR }, 0 },
- },
- /* PREFIX_EVEX_MAP5_5B_W_0 */
- {
- { "vcvtdq2ph%XY", { XMxmmq, EXx, EXxEVexR }, 0 },
- { "vcvttph2dq", { XM, EXxmmqh, EXxEVexS }, 0 },
- { "vcvtph2dq", { XM, EXxmmqh, EXxEVexR }, 0 },
- },
- /* PREFIX_EVEX_MAP5_5B_W_1 */
- {
- { "vcvtqq2ph%XZ", { XMM, EXx, EXxEVexR }, 0 },
+ { VEX_W_TABLE (EVEX_W_MAP5_5B_P_0) },
+ { "vcvttp%XH2dq", { XM, EXxmmqh, EXxEVexS }, 0 },
+ { "vcvtp%XH2dq", { XM, EXxmmqh, EXxEVexR }, 0 },
},
/* PREFIX_EVEX_MAP5_5C */
{
@@ -526,47 +517,47 @@
},
/* PREFIX_EVEX_MAP5_78 */
{
- { VEX_W_TABLE (EVEX_W_MAP5_78_P_0) },
+ { "vcvttp%XH2udq", { XM, EXxmmqh, EXxEVexS }, 0 },
{ "vcvttsh2usi", { Gdq, EXw, EXxEVexS }, 0 },
- { VEX_W_TABLE (EVEX_W_MAP5_78_P_2) },
+ { "vcvttp%XH2uqq", { XM, EXxmmqdh, EXxEVexS }, 0 },
},
/* PREFIX_EVEX_MAP5_79 */
{
- { VEX_W_TABLE (EVEX_W_MAP5_79_P_0) },
+ { "vcvtp%XH2udq", { XM, EXxmmqh, EXxEVexR }, 0 },
{ "vcvtsh2usi", { Gdq, EXw, EXxEVexR }, 0 },
- { VEX_W_TABLE (EVEX_W_MAP5_79_P_2) },
+ { "vcvtp%XH2uqq", { XM, EXxmmqdh, EXxEVexR }, 0 },
},
/* PREFIX_EVEX_MAP5_7A */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { VEX_W_TABLE (EVEX_W_MAP5_7A_P_2) },
+ { "vcvttp%XH2qq", { XM, EXxmmqdh, EXxEVexS }, 0 },
{ VEX_W_TABLE (EVEX_W_MAP5_7A_P_3) },
},
/* PREFIX_EVEX_MAP5_7B */
{
{ Bad_Opcode },
{ "vcvtusi2sh{%LQ|}", { XMScalar, VexScalar, EXxEVexR, Edq }, 0 },
- { VEX_W_TABLE (EVEX_W_MAP5_7B_P_2) },
+ { "vcvtp%XH2qq", { XM, EXxmmqdh, EXxEVexR }, 0 },
},
/* PREFIX_EVEX_MAP5_7C */
{
- { VEX_W_TABLE (EVEX_W_MAP5_7C_P_0) },
+ { "vcvttp%XH2uw", { XM, EXxh, EXxEVexS }, 0 },
{ Bad_Opcode },
- { VEX_W_TABLE (EVEX_W_MAP5_7C_P_2) },
+ { "vcvttp%XH2w", { XM, EXxh, EXxEVexS }, 0 },
},
- /* PREFIX_EVEX_MAP5_7D_W_0 */
+ /* PREFIX_EVEX_MAP5_7D */
{
- { "vcvtph2uw", { XM, EXxh, EXxEVexR }, 0 },
- { "vcvtw2ph", { XM, EXxh, EXxEVexR }, 0 },
- { "vcvtph2w", { XM, EXxh, EXxEVexR }, 0 },
- { "vcvtuw2ph", { XM, EXxh, EXxEVexR }, 0 },
+ { "vcvtp%XH2uw", { XM, EXxh, EXxEVexR }, 0 },
+ { "vcvtw2p%XH", { XM, EXxh, EXxEVexR }, 0 },
+ { "vcvtp%XH2w", { XM, EXxh, EXxEVexR }, 0 },
+ { "vcvtuw2p%XH", { XM, EXxh, EXxEVexR }, 0 },
},
/* PREFIX_EVEX_MAP6_13 */
{
- { VEX_W_TABLE (EVEX_W_MAP6_13_P_0) },
+ { "vcvts%XH2ss", { XMM, VexScalar, EXw, EXxEVexS }, 0 },
{ Bad_Opcode },
- { VEX_W_TABLE (EVEX_W_MAP6_13_P_2) },
+ { "vcvtp%XH2psx", { XM, EXxmmqh, EXxEVexS }, 0 },
},
/* PREFIX_EVEX_MAP6_56 */
{
diff --git a/opcodes/i386-dis-evex-w.h b/opcodes/i386-dis-evex-w.h
index 62c3d3b9afb..fc0a0791d1d 100644
--- a/opcodes/i386-dis-evex-w.h
+++ b/opcodes/i386-dis-evex-w.h
@@ -550,19 +550,11 @@
{ Bad_Opcode },
{ "vpermilpd", { XM, EXx, Ib }, PREFIX_DATA },
},
- /* EVEX_W_0F3A08 */
- {
- { PREFIX_TABLE (PREFIX_EVEX_0F3A08_W_0) },
- },
/* EVEX_W_0F3A09 */
{
{ Bad_Opcode },
{ "vrndscalepd", { XM, EXx, EXxEVexS, Ib }, PREFIX_DATA },
},
- /* EVEX_W_0F3A0A */
- {
- { PREFIX_TABLE (PREFIX_EVEX_0F3A0A_W_0) },
- },
/* EVEX_W_0F3A0B */
{
{ Bad_Opcode },
@@ -636,62 +628,13 @@
{ Bad_Opcode },
{ "vpshrdw", { XM, Vex, EXx, Ib }, 0 },
},
- /* EVEX_W_MAP5_5A */
- {
- { PREFIX_TABLE (PREFIX_EVEX_MAP5_5A_W_0) },
- { PREFIX_TABLE (PREFIX_EVEX_MAP5_5A_W_1) },
- },
- /* EVEX_W_MAP5_5B */
- {
- { PREFIX_TABLE (PREFIX_EVEX_MAP5_5B_W_0) },
- { PREFIX_TABLE (PREFIX_EVEX_MAP5_5B_W_1) },
- },
- /* EVEX_W_MAP5_78_P_0 */
- {
- { "vcvttph2udq", { XM, EXxmmqh, EXxEVexS }, 0 },
- },
- /* EVEX_W_MAP5_78_P_2 */
- {
- { "vcvttph2uqq", { XM, EXxmmqdh, EXxEVexS }, 0 },
- },
- /* EVEX_W_MAP5_79_P_0 */
- {
- { "vcvtph2udq", { XM, EXxmmqh, EXxEVexR }, 0 },
- },
- /* EVEX_W_MAP5_79_P_2 */
+ /* EVEX_W_MAP5_5B_P_0 */
{
- { "vcvtph2uqq", { XM, EXxmmqdh, EXxEVexR }, 0 },
- },
- /* EVEX_W_MAP5_7A_P_2 */
- {
- { "vcvttph2qq", { XM, EXxmmqdh, EXxEVexS }, 0 },
+ { "vcvtdq2ph%XY", { XMxmmq, EXx, EXxEVexR }, 0 },
+ { "vcvtqq2ph%XZ", { XMM, EXx, EXxEVexR }, 0 },
},
/* EVEX_W_MAP5_7A_P_3 */
{
{ "vcvtudq2ph%XY", { XMxmmq, EXx, EXxEVexR }, 0 },
{ "vcvtuqq2ph%XZ", { XMM, EXx, EXxEVexR }, 0 },
},
- /* EVEX_W_MAP5_7B_P_2 */
- {
- { "vcvtph2qq", { XM, EXxmmqdh, EXxEVexR }, 0 },
- },
- /* EVEX_W_MAP5_7C_P_0 */
- {
- { "vcvttph2uw", { XM, EXxh, EXxEVexS }, 0 },
- },
- /* EVEX_W_MAP5_7C_P_2 */
- {
- { "vcvttph2w", { XM, EXxh, EXxEVexS }, 0 },
- },
- /* EVEX_W_MAP5_7D */
- {
- { PREFIX_TABLE (PREFIX_EVEX_MAP5_7D_W_0) },
- },
- /* EVEX_W_MAP6_13_P_0 */
- {
- { "vcvtsh2ss", { XMM, VexScalar, EXw, EXxEVexS }, 0 },
- },
- /* EVEX_W_MAP6_13_P_2 */
- {
- { "vcvtph2psx", { XM, EXxmmqh, EXxEVexS }, 0 },
- },
diff --git a/opcodes/i386-dis-evex.h b/opcodes/i386-dis-evex.h
index d79c78c1793..11cc257bb2e 100644
--- a/opcodes/i386-dis-evex.h
+++ b/opcodes/i386-dis-evex.h
@@ -593,9 +593,9 @@ static const struct dis386 evex_table[][256] = {
{ Bad_Opcode },
{ Bad_Opcode },
/* 08 */
- { VEX_W_TABLE (EVEX_W_0F3A08) },
+ { PREFIX_TABLE (PREFIX_EVEX_0F3A08) },
{ VEX_W_TABLE (EVEX_W_0F3A09) },
- { VEX_W_TABLE (EVEX_W_0F3A0A) },
+ { PREFIX_TABLE (PREFIX_EVEX_0F3A0A) },
{ VEX_W_TABLE (EVEX_W_0F3A0B) },
{ Bad_Opcode },
{ Bad_Opcode },
@@ -976,8 +976,8 @@ static const struct dis386 evex_table[][256] = {
/* 58 */
{ PREFIX_TABLE (PREFIX_EVEX_MAP5_58) },
{ PREFIX_TABLE (PREFIX_EVEX_MAP5_59) },
- { VEX_W_TABLE (EVEX_W_MAP5_5A) },
- { VEX_W_TABLE (EVEX_W_MAP5_5B) },
+ { PREFIX_TABLE (PREFIX_EVEX_MAP5_5A) },
+ { PREFIX_TABLE (PREFIX_EVEX_MAP5_5B) },
{ PREFIX_TABLE (PREFIX_EVEX_MAP5_5C) },
{ PREFIX_TABLE (PREFIX_EVEX_MAP5_5D) },
{ PREFIX_TABLE (PREFIX_EVEX_MAP5_5E) },
@@ -1015,7 +1015,7 @@ static const struct dis386 evex_table[][256] = {
{ PREFIX_TABLE (PREFIX_EVEX_MAP5_7A) },
{ PREFIX_TABLE (PREFIX_EVEX_MAP5_7B) },
{ PREFIX_TABLE (PREFIX_EVEX_MAP5_7C) },
- { VEX_W_TABLE (EVEX_W_MAP5_7D) },
+ { PREFIX_TABLE (PREFIX_EVEX_MAP5_7D) },
{ "vmovw", { Edw, XMScalar }, PREFIX_DATA },
{ Bad_Opcode },
/* 80 */
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 4e0e1559339..afc3743e4e8 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -1212,8 +1212,8 @@ enum
PREFIX_EVEX_0F38AA,
PREFIX_EVEX_0F38AB,
- PREFIX_EVEX_0F3A08_W_0,
- PREFIX_EVEX_0F3A0A_W_0,
+ PREFIX_EVEX_0F3A08,
+ PREFIX_EVEX_0F3A0A,
PREFIX_EVEX_0F3A26,
PREFIX_EVEX_0F3A27,
PREFIX_EVEX_0F3A56,
@@ -1233,10 +1233,8 @@ enum
PREFIX_EVEX_MAP5_51,
PREFIX_EVEX_MAP5_58,
PREFIX_EVEX_MAP5_59,
- PREFIX_EVEX_MAP5_5A_W_0,
- PREFIX_EVEX_MAP5_5A_W_1,
- PREFIX_EVEX_MAP5_5B_W_0,
- PREFIX_EVEX_MAP5_5B_W_1,
+ PREFIX_EVEX_MAP5_5A,
+ PREFIX_EVEX_MAP5_5B,
PREFIX_EVEX_MAP5_5C,
PREFIX_EVEX_MAP5_5D,
PREFIX_EVEX_MAP5_5E,
@@ -1246,7 +1244,7 @@ enum
PREFIX_EVEX_MAP5_7A,
PREFIX_EVEX_MAP5_7B,
PREFIX_EVEX_MAP5_7C,
- PREFIX_EVEX_MAP5_7D_W_0,
+ PREFIX_EVEX_MAP5_7D,
PREFIX_EVEX_MAP6_13,
PREFIX_EVEX_MAP6_56,
@@ -1746,9 +1744,7 @@ enum
EVEX_W_0F3883,
EVEX_W_0F3A05,
- EVEX_W_0F3A08,
EVEX_W_0F3A09,
- EVEX_W_0F3A0A,
EVEX_W_0F3A0B,
EVEX_W_0F3A18_L_n,
EVEX_W_0F3A19_L_n,
@@ -1765,21 +1761,8 @@ enum
EVEX_W_0F3A70,
EVEX_W_0F3A72,
- EVEX_W_MAP5_5A,
- EVEX_W_MAP5_5B,
- EVEX_W_MAP5_78_P_0,
- EVEX_W_MAP5_78_P_2,
- EVEX_W_MAP5_79_P_0,
- EVEX_W_MAP5_79_P_2,
- EVEX_W_MAP5_7A_P_2,
+ EVEX_W_MAP5_5B_P_0,
EVEX_W_MAP5_7A_P_3,
- EVEX_W_MAP5_7B_P_2,
- EVEX_W_MAP5_7C_P_0,
- EVEX_W_MAP5_7C_P_2,
- EVEX_W_MAP5_7D,
-
- EVEX_W_MAP6_13_P_0,
- EVEX_W_MAP6_13_P_2,
};
typedef void (*op_rtn) (instr_info *ins, int bytemode, int sizeflag);
@@ -1840,7 +1823,9 @@ struct dis386 {
"XZ" => print 'x', 'y', or 'z' if suffix_always is true or no
register operands and no broadcast.
"XW" => print 's', 'd' depending on the VEX.W bit (for FMA)
+ "XD" => print 'd' if EVEX.W=1, EVEX.W=0 is not a valid encoding
"XH" => print 'h' if EVEX.W=0, EVEX.W=1 is not a valid encoding (for FP16)
+ "XS" => print 's' if EVEX.W=0, EVEX.W=1 is not a valid encoding
"XV" => print "{vex3}" pseudo prefix
"LQ" => print 'l' ('d' in Intel mode) or 'q' for memory operand, cond
being false, or no operand at all in 64bit mode, or if suffix_always
@@ -10496,6 +10481,23 @@ putop (instr_info *ins, const char *in_template, int sizeflag)
}
break;
case 'D':
+ if (l == 1)
+ {
+ switch (last[0])
+ {
+ case 'X':
+ if (ins->vex.w)
+ *ins->obufp++ = 'd';
+ else
+ oappend (ins, "{bad}");
+ break;
+ default:
+ abort ();
+ }
+ break;
+ }
+ if (l)
+ abort ();
if (ins->intel_syntax || !(sizeflag & SUFFIX_ALWAYS))
break;
USED_REX (REX_W);
@@ -10582,13 +10584,7 @@ putop (instr_info *ins, const char *in_template, int sizeflag)
if (ins->vex.w == 0)
*ins->obufp++ = 'h';
else
- {
- *ins->obufp++ = '{';
- *ins->obufp++ = 'b';
- *ins->obufp++ = 'a';
- *ins->obufp++ = 'd';
- *ins->obufp++ = '}';
- }
+ oappend (ins, "{bad}");
}
else
abort ();
@@ -10752,9 +10748,13 @@ putop (instr_info *ins, const char *in_template, int sizeflag)
ins->used_prefixes |= (ins->prefixes & PREFIX_DATA);
}
}
+ break;
}
- else if (l == 1 && last[0] == 'L')
+ if (l != 1)
+ abort ();
+ switch (last[0])
{
+ case 'L':
if (ins->address_mode == mode_64bit
&& !(ins->prefixes & PREFIX_ADDR))
{
@@ -10764,9 +10764,15 @@ putop (instr_info *ins, const char *in_template, int sizeflag)
}
goto case_S;
+ case 'X':
+ if (!ins->vex.w)
+ *ins->obufp++ = 's';
+ else
+ oappend (ins, "{bad}");
+ break;
+ default:
+ abort ();
}
- else
- abort ();
break;
case 'V':
if (l == 0)
--
2.33.0

600
0028-x86-reduce-AVX512-FP-set-of-insns-decoded-through-ve.patch
View File

@ -1,600 +0,0 @@
From 740a1e791175987e28cc39dbd11e3fc152ffc40b Mon Sep 17 00:00:00 2001
From: Jan Beulich <jbeulich@suse.com>
Date: Fri, 14 Jan 2022 10:54:55 +0100
Subject: [PATCH] x86: reduce AVX512 FP set of insns decoded through
vex_w_table[]
Like for AVX512-FP16, there's not that many FP insns where going through
this table is easier / cheaper than using suitable macros. Utilize %XS
and %XD more to eliminate a fair number of table entries.
While doing this I noticed a few anomalies. Where lines get touched /
moved anyway, these are being addressed right here:
- vmovshdup used EXx for its 2nd operand, thus displaying seemingly
valid broadcast when EVEX.b is set with a memory operand; use
EXEvexXNoBcst instead just like vmovsldup already does
- vmovlhps used EXx for its 3rd operand, when all sibling entries use
EXq; switch to EXq there for consistency (the two differ only for
memory operands)
diff --git a/opcodes/i386-dis-evex-mod.h b/opcodes/i386-dis-evex-mod.h
index 7a372ce8c0b..2d35bf2a589 100644
--- a/opcodes/i386-dis-evex-mod.h
+++ b/opcodes/i386-dis-evex-mod.h
@@ -1,7 +1,7 @@
{
/* MOD_EVEX_0F12_PREFIX_0 */
{ "vmovlpX", { XMM, Vex, EXq }, PREFIX_OPCODE },
- { VEX_W_TABLE (EVEX_W_0F12_P_0_M_1) },
+ { "vmovhlp%XS", { XMM, Vex, EXq }, 0 },
},
{
/* MOD_EVEX_0F12_PREFIX_2 */
@@ -14,7 +14,7 @@
{
/* MOD_EVEX_0F16_PREFIX_0 */
{ "vmovhpX", { XMM, Vex, EXq }, PREFIX_OPCODE },
- { VEX_W_TABLE (EVEX_W_0F16_P_0_M_1) },
+ { "vmovlhp%XS", { XMM, Vex, EXq }, 0 },
},
{
/* MOD_EVEX_0F16_PREFIX_2 */
diff --git a/opcodes/i386-dis-evex-prefix.h b/opcodes/i386-dis-evex-prefix.h
index 64a43ce02a1..fc5439a1fec 100644
--- a/opcodes/i386-dis-evex-prefix.h
+++ b/opcodes/i386-dis-evex-prefix.h
@@ -1,28 +1,28 @@
/* PREFIX_EVEX_0F10 */
{
{ "vmovupX", { XM, EXEvexXNoBcst }, PREFIX_OPCODE },
- { VEX_W_TABLE (EVEX_W_0F10_P_1) },
+ { "vmovs%XS", { XMScalar, VexScalarR, EXd }, 0 },
{ "vmovupX", { XM, EXEvexXNoBcst }, PREFIX_OPCODE },
- { VEX_W_TABLE (EVEX_W_0F10_P_3) },
+ { "vmovs%XD", { XMScalar, VexScalarR, EXq }, 0 },
},
/* PREFIX_EVEX_0F11 */
{
{ "vmovupX", { EXxS, XM }, PREFIX_OPCODE },
- { VEX_W_TABLE (EVEX_W_0F11_P_1) },
+ { "vmovs%XS", { EXdS, VexScalarR, XMScalar }, 0 },
{ "vmovupX", { EXxS, XM }, PREFIX_OPCODE },
- { VEX_W_TABLE (EVEX_W_0F11_P_3) },
+ { "vmovs%XD", { EXqS, VexScalarR, XMScalar }, 0 },
},
/* PREFIX_EVEX_0F12 */
{
{ MOD_TABLE (MOD_EVEX_0F12_PREFIX_0) },
- { VEX_W_TABLE (EVEX_W_0F12_P_1) },
+ { "vmov%XSldup", { XM, EXEvexXNoBcst }, 0 },
{ MOD_TABLE (MOD_EVEX_0F12_PREFIX_2) },
- { VEX_W_TABLE (EVEX_W_0F12_P_3) },
+ { "vmov%XDdup", { XM, EXymmq }, 0 },
},
/* PREFIX_EVEX_0F16 */
{
{ MOD_TABLE (MOD_EVEX_0F16_PREFIX_0) },
- { VEX_W_TABLE (EVEX_W_0F16_P_1) },
+ { "vmov%XShdup", { XM, EXEvexXNoBcst }, 0 },
{ MOD_TABLE (MOD_EVEX_0F16_PREFIX_2) },
},
/* PREFIX_EVEX_0F2A */
@@ -35,64 +35,64 @@
/* PREFIX_EVEX_0F51 */
{
{ "vsqrtpX", { XM, EXx, EXxEVexR }, PREFIX_OPCODE },
- { VEX_W_TABLE (EVEX_W_0F51_P_1) },
+ { "vsqrts%XS", { XMScalar, VexScalar, EXd, EXxEVexR }, 0 },
{ "vsqrtpX", { XM, EXx, EXxEVexR }, PREFIX_OPCODE },
- { VEX_W_TABLE (EVEX_W_0F51_P_3) },
+ { "vsqrts%XD", { XMScalar, VexScalar, EXq, EXxEVexR }, 0 },
},
/* PREFIX_EVEX_0F58 */
{
{ "vaddpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
- { VEX_W_TABLE (EVEX_W_0F58_P_1) },
+ { "vadds%XS", { XMScalar, VexScalar, EXd, EXxEVexR }, 0 },
{ "vaddpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
- { VEX_W_TABLE (EVEX_W_0F58_P_3) },
+ { "vadds%XD", { XMScalar, VexScalar, EXq, EXxEVexR }, 0 },
},
/* PREFIX_EVEX_0F59 */
{
{ "vmulpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
- { VEX_W_TABLE (EVEX_W_0F59_P_1) },
+ { "vmuls%XS", { XMScalar, VexScalar, EXd, EXxEVexR }, 0 },
{ "vmulpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
- { VEX_W_TABLE (EVEX_W_0F59_P_3) },
+ { "vmuls%XD", { XMScalar, VexScalar, EXq, EXxEVexR }, 0 },
},
/* PREFIX_EVEX_0F5A */
{
- { VEX_W_TABLE (EVEX_W_0F5A_P_0) },
- { VEX_W_TABLE (EVEX_W_0F5A_P_1) },
- { VEX_W_TABLE (EVEX_W_0F5A_P_2) },
- { VEX_W_TABLE (EVEX_W_0F5A_P_3) },
+ { "vcvtp%XS2pd", { XM, EXEvexHalfBcstXmmq, EXxEVexS }, 0 },
+ { "vcvts%XS2sd", { XMScalar, VexScalar, EXd, EXxEVexS }, 0 },
+ { "vcvtp%XD2ps%XY", { XMxmmq, EXx, EXxEVexR }, 0 },
+ { "vcvts%XD2ss", { XMScalar, VexScalar, EXq, EXxEVexR }, 0 },
},
/* PREFIX_EVEX_0F5B */
{
{ VEX_W_TABLE (EVEX_W_0F5B_P_0) },
- { VEX_W_TABLE (EVEX_W_0F5B_P_1) },
- { VEX_W_TABLE (EVEX_W_0F5B_P_2) },
+ { "vcvttp%XS2dq", { XM, EXx, EXxEVexS }, 0 },
+ { "vcvtp%XS2dq", { XM, EXx, EXxEVexR }, 0 },
},
/* PREFIX_EVEX_0F5C */
{
{ "vsubpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
- { VEX_W_TABLE (EVEX_W_0F5C_P_1) },
+ { "vsubs%XS", { XMScalar, VexScalar, EXd, EXxEVexR }, 0 },
{ "vsubpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
- { VEX_W_TABLE (EVEX_W_0F5C_P_3) },
+ { "vsubs%XD", { XMScalar, VexScalar, EXq, EXxEVexR }, 0 },
},
/* PREFIX_EVEX_0F5D */
{
{ "vminpX", { XM, Vex, EXx, EXxEVexS }, PREFIX_OPCODE },
- { VEX_W_TABLE (EVEX_W_0F5D_P_1) },
+ { "vmins%XS", { XMScalar, VexScalar, EXd, EXxEVexS }, 0 },
{ "vminpX", { XM, Vex, EXx, EXxEVexS }, PREFIX_OPCODE },
- { VEX_W_TABLE (EVEX_W_0F5D_P_3) },
+ { "vmins%XD", { XMScalar, VexScalar, EXq, EXxEVexS }, 0 },
},
/* PREFIX_EVEX_0F5E */
{
{ "vdivpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
- { VEX_W_TABLE (EVEX_W_0F5E_P_1) },
+ { "vdivs%XS", { XMScalar, VexScalar, EXd, EXxEVexR }, 0 },
{ "vdivpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
- { VEX_W_TABLE (EVEX_W_0F5E_P_3) },
+ { "vdivs%XD", { XMScalar, VexScalar, EXq, EXxEVexR }, 0 },
},
/* PREFIX_EVEX_0F5F */
{
{ "vmaxpX", { XM, Vex, EXx, EXxEVexS }, PREFIX_OPCODE },
- { VEX_W_TABLE (EVEX_W_0F5F_P_1) },
+ { "vmaxs%XS", { XMScalar, VexScalar, EXd, EXxEVexS }, 0 },
{ "vmaxpX", { XM, Vex, EXx, EXxEVexS }, PREFIX_OPCODE },
- { VEX_W_TABLE (EVEX_W_0F5F_P_3) },
+ { "vmaxs%XD", { XMScalar, VexScalar, EXq, EXxEVexS }, 0 },
},
/* PREFIX_EVEX_0F6F */
{
@@ -152,16 +152,16 @@
/* PREFIX_EVEX_0FC2 */
{
{ "vcmppX", { MaskG, Vex, EXx, EXxEVexS, CMP }, PREFIX_OPCODE },
- { VEX_W_TABLE (EVEX_W_0FC2_P_1) },
+ { "vcmps%XS", { MaskG, VexScalar, EXd, EXxEVexS, CMP }, 0 },
{ "vcmppX", { MaskG, Vex, EXx, EXxEVexS, CMP }, PREFIX_OPCODE },
- { VEX_W_TABLE (EVEX_W_0FC2_P_3) },
+ { "vcmps%XD", { MaskG, VexScalar, EXq, EXxEVexS, CMP }, 0 },
},
/* PREFIX_EVEX_0FE6 */
{
{ Bad_Opcode },
{ VEX_W_TABLE (EVEX_W_0FE6_P_1) },
- { VEX_W_TABLE (EVEX_W_0FE6_P_2) },
- { VEX_W_TABLE (EVEX_W_0FE6_P_3) },
+ { "vcvttp%XD2dq%XY", { XMxmmq, EXx, EXxEVexS }, 0 },
+ { "vcvtp%XD2dq%XY", { XMxmmq, EXx, EXxEVexR }, 0 },
},
/* PREFIX_EVEX_0F3810 */
{
@@ -185,7 +185,7 @@
{
{ Bad_Opcode },
{ VEX_W_TABLE (EVEX_W_0F3813_P_1) },
- { VEX_W_TABLE (EVEX_W_0F3813_P_2) },
+ { "vcvtph2p%XS", { XM, EXxmmq, EXxEVexS }, 0 },
},
/* PREFIX_EVEX_0F3814 */
{
@@ -322,7 +322,7 @@
/* PREFIX_EVEX_0F3852 */
{
{ Bad_Opcode },
- { VEX_W_TABLE (EVEX_W_0F3852_P_1) },
+ { "vdpbf16p%XS", { XM, Vex, EXx }, 0 },
{ "vpdpwssd", { XM, Vex, EXx }, 0 },
{ "vp4dpwssd", { XM, Vex, EXxmm }, 0 },
},
@@ -343,9 +343,9 @@
/* PREFIX_EVEX_0F3872 */
{
{ Bad_Opcode },
- { VEX_W_TABLE (EVEX_W_0F3872_P_1) },
+ { "vcvtnep%XS2bf16%XY", { XMxmmq, EXx }, 0 },
{ VEX_W_TABLE (EVEX_W_0F3872_P_2) },
- { VEX_W_TABLE (EVEX_W_0F3872_P_3) },
+ { "vcvtne2p%XS2bf16", { XM, Vex, EXx}, 0 },
},
/* PREFIX_EVEX_0F389A */
{
diff --git a/opcodes/i386-dis-evex-w.h b/opcodes/i386-dis-evex-w.h
index fc0a0791d1d..9b4bb6a2924 100644
--- a/opcodes/i386-dis-evex-w.h
+++ b/opcodes/i386-dis-evex-w.h
@@ -1,136 +1,8 @@
- /* EVEX_W_0F10_P_1 */
- {
- { "vmovss", { XMScalar, VexScalarR, EXd }, 0 },
- },
- /* EVEX_W_0F10_P_3 */
- {
- { Bad_Opcode },
- { "vmovsd", { XMScalar, VexScalarR, EXq }, 0 },
- },
- /* EVEX_W_0F11_P_1 */
- {
- { "vmovss", { EXdS, VexScalarR, XMScalar }, 0 },
- },
- /* EVEX_W_0F11_P_3 */
- {
- { Bad_Opcode },
- { "vmovsd", { EXqS, VexScalarR, XMScalar }, 0 },
- },
- /* EVEX_W_0F12_P_0_M_1 */
- {
- { "vmovhlps", { XMM, Vex, EXq }, 0 },
- },
- /* EVEX_W_0F12_P_1 */
- {
- { "vmovsldup", { XM, EXEvexXNoBcst }, 0 },
- },
- /* EVEX_W_0F12_P_3 */
- {
- { Bad_Opcode },
- { "vmovddup", { XM, EXymmq }, 0 },
- },
- /* EVEX_W_0F16_P_0_M_1 */
- {
- { "vmovlhps", { XMM, Vex, EXx }, 0 },
- },
- /* EVEX_W_0F16_P_1 */
- {
- { "vmovshdup", { XM, EXx }, 0 },
- },
- /* EVEX_W_0F51_P_1 */
- {
- { "vsqrtss", { XMScalar, VexScalar, EXd, EXxEVexR }, 0 },
- },
- /* EVEX_W_0F51_P_3 */
- {
- { Bad_Opcode },
- { "vsqrtsd", { XMScalar, VexScalar, EXq, EXxEVexR }, 0 },
- },
- /* EVEX_W_0F58_P_1 */
- {
- { "vaddss", { XMScalar, VexScalar, EXd, EXxEVexR }, 0 },
- },
- /* EVEX_W_0F58_P_3 */
- {
- { Bad_Opcode },
- { "vaddsd", { XMScalar, VexScalar, EXq, EXxEVexR }, 0 },
- },
- /* EVEX_W_0F59_P_1 */
- {
- { "vmulss", { XMScalar, VexScalar, EXd, EXxEVexR }, 0 },
- },
- /* EVEX_W_0F59_P_3 */
- {
- { Bad_Opcode },
- { "vmulsd", { XMScalar, VexScalar, EXq, EXxEVexR }, 0 },
- },
- /* EVEX_W_0F5A_P_0 */
- {
- { "vcvtps2pd", { XM, EXEvexHalfBcstXmmq, EXxEVexS }, 0 },
- },
- /* EVEX_W_0F5A_P_1 */
- {
- { "vcvtss2sd", { XMScalar, VexScalar, EXd, EXxEVexS }, 0 },
- },
- /* EVEX_W_0F5A_P_2 */
- {
- { Bad_Opcode },
- { "vcvtpd2ps%XY", { XMxmmq, EXx, EXxEVexR }, 0 },
- },
- /* EVEX_W_0F5A_P_3 */
- {
- { Bad_Opcode },
- { "vcvtsd2ss", { XMScalar, VexScalar, EXq, EXxEVexR }, 0 },
- },
/* EVEX_W_0F5B_P_0 */
{
{ "vcvtdq2ps", { XM, EXx, EXxEVexR }, 0 },
{ "vcvtqq2ps%XY", { XMxmmq, EXx, EXxEVexR }, 0 },
},
- /* EVEX_W_0F5B_P_1 */
- {
- { "vcvttps2dq", { XM, EXx, EXxEVexS }, 0 },
- },
- /* EVEX_W_0F5B_P_2 */
- {
- { "vcvtps2dq", { XM, EXx, EXxEVexR }, 0 },
- },
- /* EVEX_W_0F5C_P_1 */
- {
- { "vsubss", { XMScalar, VexScalar, EXd, EXxEVexR }, 0 },
- },
- /* EVEX_W_0F5C_P_3 */
- {
- { Bad_Opcode },
- { "vsubsd", { XMScalar, VexScalar, EXq, EXxEVexR }, 0 },
- },
- /* EVEX_W_0F5D_P_1 */
- {
- { "vminss", { XMScalar, VexScalar, EXd, EXxEVexS }, 0 },
- },
- /* EVEX_W_0F5D_P_3 */
- {
- { Bad_Opcode },
- { "vminsd", { XMScalar, VexScalar, EXq, EXxEVexS }, 0 },
- },
- /* EVEX_W_0F5E_P_1 */
- {
- { "vdivss", { XMScalar, VexScalar, EXd, EXxEVexR }, 0 },
- },
- /* EVEX_W_0F5E_P_3 */
- {
- { Bad_Opcode },
- { "vdivsd", { XMScalar, VexScalar, EXq, EXxEVexR }, 0 },
- },
- /* EVEX_W_0F5F_P_1 */
- {
- { "vmaxss", { XMScalar, VexScalar, EXd, EXxEVexS }, 0 },
- },
- /* EVEX_W_0F5F_P_3 */
- {
- { Bad_Opcode },
- { "vmaxsd", { XMScalar, VexScalar, EXq, EXxEVexS }, 0 },
- },
/* EVEX_W_0F62 */
{
{ "vpunpckldq", { XM, Vex, EXx }, PREFIX_DATA },
@@ -258,15 +130,6 @@
{ "vmovdqu8", { EXxS, XM }, 0 },
{ "vmovdqu16", { EXxS, XM }, 0 },
},
- /* EVEX_W_0FC2_P_1 */
- {
- { "vcmpss", { MaskG, VexScalar, EXd, EXxEVexS, CMP }, 0 },
- },
- /* EVEX_W_0FC2_P_3 */
- {
- { Bad_Opcode },
- { "vcmpsd", { MaskG, VexScalar, EXq, EXxEVexS, CMP }, 0 },
- },
/* EVEX_W_0FD2 */
{
{ "vpsrld", { XM, Vex, EXxmm }, PREFIX_DATA },
@@ -291,16 +154,6 @@
{ "vcvtdq2pd", { XM, EXEvexHalfBcstXmmq }, 0 },
{ "vcvtqq2pd", { XM, EXx, EXxEVexR }, 0 },
},
- /* EVEX_W_0FE6_P_2 */
- {
- { Bad_Opcode },
- { "vcvttpd2dq%XY", { XMxmmq, EXx, EXxEVexS }, 0 },
- },
- /* EVEX_W_0FE6_P_3 */
- {
- { Bad_Opcode },
- { "vcvtpd2dq%XY", { XMxmmq, EXx, EXxEVexR }, 0 },
- },
/* EVEX_W_0FE7 */
{
{ "vmovntdq", { EXEvexXNoBcst, XM }, PREFIX_DATA },
@@ -332,11 +185,6 @@
{
{ "vpaddd", { XM, Vex, EXx }, PREFIX_DATA },
},
- /* EVEX_W_0F380D */
- {
- { Bad_Opcode },
- { "vpermilpd", { XM, Vex, EXx }, PREFIX_DATA },
- },
/* EVEX_W_0F3810_P_1 */
{
{ "vpmovuswb", { EXxmmq, XM }, 0 },
@@ -368,10 +216,6 @@
{
{ "vpmovusdw", { EXxmmq, XM }, 0 },
},
- /* EVEX_W_0F3813_P_2 */
- {
- { "vcvtph2ps", { XM, EXxmmq, EXxEVexS }, 0 },
- },
/* EVEX_W_0F3814_P_1 */
{
{ "vpmovusqw", { EXxmmqd, XM }, 0 },
@@ -492,11 +336,6 @@
{
{ MOD_TABLE (MOD_EVEX_0F383A_P_1_W_0) },
},
- /* EVEX_W_0F3852_P_1 */
- {
- { "vdpbf16ps", { XM, Vex, EXx }, 0 },
- { Bad_Opcode },
- },
/* EVEX_W_0F3859 */
{
{ "vbroadcasti32x2", { XM, EXq }, PREFIX_DATA },
@@ -517,21 +356,11 @@
{ Bad_Opcode },
{ "vpshldvw", { XM, Vex, EXx }, PREFIX_DATA },
},
- /* EVEX_W_0F3872_P_1 */
- {
- { "vcvtneps2bf16%XY", { XMxmmq, EXx }, 0 },
- { Bad_Opcode },
- },
/* EVEX_W_0F3872_P_2 */
{
{ Bad_Opcode },
{ "vpshrdvw", { XM, Vex, EXx }, 0 },
},
- /* EVEX_W_0F3872_P_3 */
- {
- { "vcvtne2ps2bf16", { XM, Vex, EXx}, 0 },
- { Bad_Opcode },
- },
/* EVEX_W_0F387A */
{
{ MOD_TABLE (MOD_EVEX_0F387A_W_0) },
@@ -545,21 +374,6 @@
{ Bad_Opcode },
{ "vpmultishiftqb", { XM, Vex, EXx }, PREFIX_DATA },
},
- /* EVEX_W_0F3A05 */
- {
- { Bad_Opcode },
- { "vpermilpd", { XM, EXx, Ib }, PREFIX_DATA },
- },
- /* EVEX_W_0F3A09 */
- {
- { Bad_Opcode },
- { "vrndscalepd", { XM, EXx, EXxEVexS, Ib }, PREFIX_DATA },
- },
- /* EVEX_W_0F3A0B */
- {
- { Bad_Opcode },
- { "vrndscalesd", { XMScalar, VexScalar, EXq, EXxEVexS, Ib }, PREFIX_DATA },
- },
/* EVEX_W_0F3A18_L_n */
{
{ "vinsertf32x4", { XM, Vex, EXxmm, Ib }, PREFIX_DATA },
diff --git a/opcodes/i386-dis-evex.h b/opcodes/i386-dis-evex.h
index 11cc257bb2e..5d621cf1557 100644
--- a/opcodes/i386-dis-evex.h
+++ b/opcodes/i386-dis-evex.h
@@ -307,7 +307,7 @@ static const struct dis386 evex_table[][256] = {
{ Bad_Opcode },
{ "vpmulhrsw", { XM, Vex, EXx }, PREFIX_DATA },
{ VEX_W_TABLE (VEX_W_0F380C) },
- { VEX_W_TABLE (EVEX_W_0F380D) },
+ { "vpermilp%XD", { XM, Vex, EXx }, PREFIX_DATA },
{ Bad_Opcode },
{ Bad_Opcode },
/* 10 */
@@ -589,14 +589,14 @@ static const struct dis386 evex_table[][256] = {
{ Bad_Opcode },
{ "valign%DQ", { XM, Vex, EXx, Ib }, PREFIX_DATA },
{ VEX_W_TABLE (VEX_W_0F3A04) },
- { VEX_W_TABLE (EVEX_W_0F3A05) },
+ { "vpermilp%XD", { XM, EXx, Ib }, PREFIX_DATA },
{ Bad_Opcode },
{ Bad_Opcode },
/* 08 */
{ PREFIX_TABLE (PREFIX_EVEX_0F3A08) },
- { VEX_W_TABLE (EVEX_W_0F3A09) },
+ { "vrndscalep%XD", { XM, EXx, EXxEVexS, Ib }, PREFIX_DATA },
{ PREFIX_TABLE (PREFIX_EVEX_0F3A0A) },
- { VEX_W_TABLE (EVEX_W_0F3A0B) },
+ { "vrndscales%XD", { XMScalar, VexScalar, EXq, EXxEVexS, Ib }, PREFIX_DATA },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index afc3743e4e8..ad560b1899c 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -1621,36 +1621,7 @@ enum
VEX_W_0FXOP_09_E2_L_0,
VEX_W_0FXOP_09_E3_L_0,
- EVEX_W_0F10_P_1,
- EVEX_W_0F10_P_3,
- EVEX_W_0F11_P_1,
- EVEX_W_0F11_P_3,
- EVEX_W_0F12_P_0_M_1,
- EVEX_W_0F12_P_1,
- EVEX_W_0F12_P_3,
- EVEX_W_0F16_P_0_M_1,
- EVEX_W_0F16_P_1,
- EVEX_W_0F51_P_1,
- EVEX_W_0F51_P_3,
- EVEX_W_0F58_P_1,
- EVEX_W_0F58_P_3,
- EVEX_W_0F59_P_1,
- EVEX_W_0F59_P_3,
- EVEX_W_0F5A_P_0,
- EVEX_W_0F5A_P_1,
- EVEX_W_0F5A_P_2,
- EVEX_W_0F5A_P_3,
EVEX_W_0F5B_P_0,
- EVEX_W_0F5B_P_1,
- EVEX_W_0F5B_P_2,
- EVEX_W_0F5C_P_1,
- EVEX_W_0F5C_P_3,
- EVEX_W_0F5D_P_1,
- EVEX_W_0F5D_P_3,
- EVEX_W_0F5E_P_1,
- EVEX_W_0F5E_P_3,
- EVEX_W_0F5F_P_1,
- EVEX_W_0F5F_P_3,
EVEX_W_0F62,
EVEX_W_0F66,
EVEX_W_0F6A,
@@ -1678,15 +1649,11 @@ enum
EVEX_W_0F7F_P_1,
EVEX_W_0F7F_P_2,
EVEX_W_0F7F_P_3,
- EVEX_W_0FC2_P_1,
- EVEX_W_0FC2_P_3,
EVEX_W_0FD2,
EVEX_W_0FD3,
EVEX_W_0FD4,
EVEX_W_0FD6,
EVEX_W_0FE6_P_1,
- EVEX_W_0FE6_P_2,
- EVEX_W_0FE6_P_3,
EVEX_W_0FE7,
EVEX_W_0FF2,
EVEX_W_0FF3,
@@ -1694,7 +1661,7 @@ enum
EVEX_W_0FFA,
EVEX_W_0FFB,
EVEX_W_0FFE,
- EVEX_W_0F380D,
+
EVEX_W_0F3810_P_1,
EVEX_W_0F3810_P_2,
EVEX_W_0F3811_P_1,
@@ -1702,7 +1669,6 @@ enum
EVEX_W_0F3812_P_1,
EVEX_W_0F3812_P_2,
EVEX_W_0F3813_P_1,
- EVEX_W_0F3813_P_2,
EVEX_W_0F3814_P_1,
EVEX_W_0F3815_P_1,
EVEX_W_0F3819_L_n,
@@ -1731,21 +1697,15 @@ enum
EVEX_W_0F3835_P_2,
EVEX_W_0F3837,
EVEX_W_0F383A_P_1,
- EVEX_W_0F3852_P_1,
EVEX_W_0F3859,
EVEX_W_0F385A_M_0_L_n,
EVEX_W_0F385B_M_0_L_2,
EVEX_W_0F3870,
- EVEX_W_0F3872_P_1,
EVEX_W_0F3872_P_2,
- EVEX_W_0F3872_P_3,
EVEX_W_0F387A,
EVEX_W_0F387B,
EVEX_W_0F3883,
- EVEX_W_0F3A05,
- EVEX_W_0F3A09,
- EVEX_W_0F3A0B,
EVEX_W_0F3A18_L_n,
EVEX_W_0F3A19_L_n,
EVEX_W_0F3A1A_L_2,
--
2.33.0

204
0029-x86-consistently-use-scalar_mode-for-AVX512-FP16-sca.patch
View File

@ -1,204 +0,0 @@
From 928c8d70c82feea45683b43e324cd2079d4ee31d Mon Sep 17 00:00:00 2001
From: Jan Beulich <jbeulich@suse.com>
Date: Fri, 14 Jan 2022 10:55:42 +0100
Subject: [PATCH] x86: consistently use scalar_mode for AVX512-FP16 scalar
insns
For some reason the original AVFX512F insns were not taken as a basis
here, causing unnecessary divergence. While not an active issue, it is
still relevant to note that OP_XMM() has special treatment of e.g.
scalar_mode (marking broadcast as invalid). Such would better be
consistent for all sufficiently similar insns.
diff --git a/opcodes/i386-dis-evex-prefix.h b/opcodes/i386-dis-evex-prefix.h
index fc5439a1fec..140c4e850b4 100644
--- a/opcodes/i386-dis-evex-prefix.h
+++ b/opcodes/i386-dis-evex-prefix.h
@@ -440,7 +440,7 @@
},
/* PREFIX_EVEX_MAP5_1D */
{
- { "vcvtss2s%XH", { XMM, VexScalar, EXd, EXxEVexR }, 0 },
+ { "vcvtss2s%XH", { XMScalar, VexScalar, EXd, EXxEVexR }, 0 },
{ Bad_Opcode },
{ "vcvtps2p%XHx%XY", { XMxmmq, EXx, EXxEVexR }, 0 },
},
@@ -470,24 +470,24 @@
/* PREFIX_EVEX_MAP5_51 */
{
{ "vsqrtp%XH", { XM, EXxh, EXxEVexR }, 0 },
- { "vsqrts%XH", { XMM, VexScalar, EXw, EXxEVexR }, 0 },
+ { "vsqrts%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, 0 },
},
/* PREFIX_EVEX_MAP5_58 */
{
{ "vaddp%XH", { XM, Vex, EXxh, EXxEVexR }, 0 },
- { "vadds%XH", { XMM, VexScalar, EXw, EXxEVexR }, 0 },
+ { "vadds%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, 0 },
},
/* PREFIX_EVEX_MAP5_59 */
{
{ "vmulp%XH", { XM, Vex, EXxh, EXxEVexR }, 0 },
- { "vmuls%XH", { XMM, VexScalar, EXw, EXxEVexR }, 0 },
+ { "vmuls%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, 0 },
},
/* PREFIX_EVEX_MAP5_5A */
{
{ "vcvtp%XH2pd", { XM, EXxmmqdh, EXxEVexS }, 0 },
- { "vcvts%XH2sd", { XMM, VexScalar, EXw, EXxEVexS }, 0 },
+ { "vcvts%XH2sd", { XMScalar, VexScalar, EXw, EXxEVexS }, 0 },
{ "vcvtp%XD2ph%XZ", { XMM, EXx, EXxEVexR }, 0 },
- { "vcvts%XD2sh", { XMM, VexScalar, EXq, EXxEVexR }, 0 },
+ { "vcvts%XD2sh", { XMScalar, VexScalar, EXq, EXxEVexR }, 0 },
},
/* PREFIX_EVEX_MAP5_5B */
{
@@ -498,22 +498,22 @@
/* PREFIX_EVEX_MAP5_5C */
{
{ "vsubp%XH", { XM, Vex, EXxh, EXxEVexR }, 0 },
- { "vsubs%XH", { XMM, VexScalar, EXw, EXxEVexR }, 0 },
+ { "vsubs%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, 0 },
},
/* PREFIX_EVEX_MAP5_5D */
{
{ "vminp%XH", { XM, Vex, EXxh, EXxEVexS }, 0 },
- { "vmins%XH", { XMM, VexScalar, EXw, EXxEVexS }, 0 },
+ { "vmins%XH", { XMScalar, VexScalar, EXw, EXxEVexS }, 0 },
},
/* PREFIX_EVEX_MAP5_5E */
{
{ "vdivp%XH", { XM, Vex, EXxh, EXxEVexR }, 0 },
- { "vdivs%XH", { XMM, VexScalar, EXw, EXxEVexR }, 0 },
+ { "vdivs%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, 0 },
},
/* PREFIX_EVEX_MAP5_5F */
{
{ "vmaxp%XH", { XM, Vex, EXxh, EXxEVexS }, 0 },
- { "vmaxs%XH", { XMM, VexScalar, EXw, EXxEVexS }, 0 },
+ { "vmaxs%XH", { XMScalar, VexScalar, EXw, EXxEVexS }, 0 },
},
/* PREFIX_EVEX_MAP5_78 */
{
@@ -555,7 +555,7 @@
},
/* PREFIX_EVEX_MAP6_13 */
{
- { "vcvts%XH2ss", { XMM, VexScalar, EXw, EXxEVexS }, 0 },
+ { "vcvts%XH2ss", { XMScalar, VexScalar, EXw, EXxEVexS }, 0 },
{ Bad_Opcode },
{ "vcvtp%XH2psx", { XM, EXxmmqh, EXxEVexS }, 0 },
},
@@ -569,9 +569,9 @@
/* PREFIX_EVEX_MAP6_57 */
{
{ Bad_Opcode },
- { "vfmaddcs%XH", { { DistinctDest_Fixup, xmm_mode }, VexScalar, EXd, EXxEVexR }, 0 },
+ { "vfmaddcs%XH", { { DistinctDest_Fixup, scalar_mode }, VexScalar, EXd, EXxEVexR }, 0 },
{ Bad_Opcode },
- { "vfcmaddcs%XH", { { DistinctDest_Fixup, xmm_mode }, VexScalar, EXd, EXxEVexR }, 0 },
+ { "vfcmaddcs%XH", { { DistinctDest_Fixup, scalar_mode }, VexScalar, EXd, EXxEVexR }, 0 },
},
/* PREFIX_EVEX_MAP6_D6 */
{
@@ -583,7 +583,7 @@
/* PREFIX_EVEX_MAP6_D7 */
{
{ Bad_Opcode },
- { "vfmulcs%XH", { { DistinctDest_Fixup, xmm_mode }, VexScalar, EXd, EXxEVexR }, 0 },
+ { "vfmulcs%XH", { { DistinctDest_Fixup, scalar_mode }, VexScalar, EXd, EXxEVexR }, 0 },
{ Bad_Opcode },
- { "vfcmulcs%XH", { { DistinctDest_Fixup, xmm_mode }, VexScalar, EXd, EXxEVexR }, 0 },
+ { "vfcmulcs%XH", { { DistinctDest_Fixup, scalar_mode }, VexScalar, EXd, EXxEVexR }, 0 },
},
diff --git a/opcodes/i386-dis-evex.h b/opcodes/i386-dis-evex.h
index 5d621cf1557..fe39026a871 100644
--- a/opcodes/i386-dis-evex.h
+++ b/opcodes/i386-dis-evex.h
@@ -1216,7 +1216,7 @@ static const struct dis386 evex_table[][256] = {
{ Bad_Opcode },
{ Bad_Opcode },
{ "vscalefp%XH", { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
- { "vscalefs%XH", { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+ { "vscalefs%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
{ Bad_Opcode },
{ Bad_Opcode },
/* 30 */
@@ -1241,7 +1241,7 @@ static const struct dis386 evex_table[][256] = {
{ Bad_Opcode },
{ Bad_Opcode },
{ "vgetexpp%XH", { XM, EXxh, EXxEVexS }, PREFIX_DATA },
- { "vgetexps%XH", { XMM, VexScalar, EXw, EXxEVexS }, PREFIX_DATA },
+ { "vgetexps%XH", { XMScalar, VexScalar, EXw, EXxEVexS }, PREFIX_DATA },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
@@ -1252,9 +1252,9 @@ static const struct dis386 evex_table[][256] = {
{ Bad_Opcode },
{ Bad_Opcode },
{ "vrcpp%XH", { XM, EXxh }, PREFIX_DATA },
- { "vrcps%XH", { XMM, VexScalar, EXw }, PREFIX_DATA },
+ { "vrcps%XH", { XMScalar, VexScalar, EXw }, PREFIX_DATA },
{ "vrsqrtp%XH", { XM, EXxh }, PREFIX_DATA },
- { "vrsqrts%XH", { XMM, VexScalar, EXw }, PREFIX_DATA },
+ { "vrsqrts%XH", { XMScalar, VexScalar, EXw }, PREFIX_DATA },
/* 50 */
{ Bad_Opcode },
{ Bad_Opcode },
@@ -1338,13 +1338,13 @@ static const struct dis386 evex_table[][256] = {
{ "vfmsubadd132p%XH", { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
/* 98 */
{ "vfmadd132p%XH", { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
- { "vfmadd132s%XH", { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+ { "vfmadd132s%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
{ "vfmsub132p%XH", { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
- { "vfmsub132s%XH", { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+ { "vfmsub132s%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
{ "vfnmadd132p%XH", { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
- { "vfnmadd132s%XH", { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+ { "vfnmadd132s%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
{ "vfnmsub132p%XH", { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
- { "vfnmsub132s%XH", { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+ { "vfnmsub132s%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
/* A0 */
{ Bad_Opcode },
{ Bad_Opcode },
@@ -1356,13 +1356,13 @@ static const struct dis386 evex_table[][256] = {
{ "vfmsubadd213p%XH", { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
/* A8 */
{ "vfmadd213p%XH", { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
- { "vfmadd213s%XH", { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+ { "vfmadd213s%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
{ "vfmsub213p%XH", { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
- { "vfmsub213s%XH", { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+ { "vfmsub213s%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
{ "vfnmadd213p%XH", { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
- { "vfnmadd213s%XH", { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+ { "vfnmadd213s%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
{ "vfnmsub213p%XH", { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
- { "vfnmsub213s%XH", { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+ { "vfnmsub213s%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
/* B0 */
{ Bad_Opcode },
{ Bad_Opcode },
@@ -1374,13 +1374,13 @@ static const struct dis386 evex_table[][256] = {
{ "vfmsubadd231p%XH", { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
/* B8 */
{ "vfmadd231p%XH", { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
- { "vfmadd231s%XH", { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+ { "vfmadd231s%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
{ "vfmsub231p%XH", { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
- { "vfmsub231s%XH", { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+ { "vfmsub231s%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
{ "vfnmadd231p%XH", { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
- { "vfnmadd231s%XH", { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+ { "vfnmadd231s%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
{ "vfnmsub231p%XH", { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
- { "vfnmsub231s%XH", { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+ { "vfnmsub231s%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
/* C0 */
{ Bad_Opcode },
{ Bad_Opcode },
--
2.33.0

15
CVE-2019-1010204.patch
View File

@ -1,15 +0,0 @@
--- binutils.orig/gold/fileread.cc 2019-08-06 14:22:08.669313110 +0100
+++ binutils-2.32/gold/fileread.cc 2019-08-06 14:22:28.799177543 +0100
@@ -381,6 +381,12 @@ File_read::do_read(off_t start, section_
ssize_t bytes;
if (this->whole_file_view_ != NULL)
{
+ // See PR 23765 for an example of a testcase that triggers this error.
+ if (((ssize_t) start) < 0)
+ gold_fatal(_("%s: read failed, starting offset (%#llx) less than zero"),
+ this->filename().c_str(),
+ static_cast<long long>(start));
+
bytes = this->size_ - start;
if (static_cast<section_size_type>(bytes) >= size)
{

31
Fix-a-potential-use-of-an-uninitialised-value-in-the.patch
View File

@ -1,31 +0,0 @@
From 151f5de4a6548cd83a79b4705f1e901776ddacc5 Mon Sep 17 00:00:00 2001
From: Nick Clifton <nickc@redhat.com>
Date: Thu, 28 May 2020 11:04:27 +0100
Subject: [PATCH] Fix a potential use of an uninitialised value in the ns32k
disassembler.
* ns32k-dis.c (print_insn_ns32k): Change the arg_bufs array to
static.
---
opcodes/ns32k-dis.c | 5 ++++-
1 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/opcodes/ns32k-dis.c b/opcodes/ns32k-dis.c
index 12df182..ccad820 100644
--- a/opcodes/ns32k-dis.c
+++ b/opcodes/ns32k-dis.c
@@ -738,7 +738,10 @@ print_insn_ns32k (bfd_vma memaddr, disassemble_info *info)
unsigned short first_word;
int ioffset; /* Bits into instruction. */
int aoffset; /* Bits into arguments. */
- char arg_bufs[MAX_ARGS+1][ARG_LEN];
+ /* The arg_bufs array is made static in order to avoid a potential
+ use of an uninitialised value if we are asekd to disassemble a
+ corrupt instruction. */
+ static char arg_bufs[MAX_ARGS+1][ARG_LEN];
int argnum;
int maxarg;
struct private priv;
--
1.8.3.1

64
Fix-gold-relocation-offset-and-adrp-signed-shife.patch
View File

@ -1,64 +0,0 @@
From e1184ff4d698dbb7eb06e2b3a25ccdc12acfa5fb Mon Sep 17 00:00:00 2001
From: wangding <wangding16@huawei.com>
Date: Wed, 8 Jun 2022 20:19:34 +0800
Subject: [PATCH] Fix gold linker relocation offset
---
gold/aarch64.cc | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/gold/aarch64.cc b/gold/aarch64.cc
index 07abe44931f..05d40a383e0 100644
--- a/gold/aarch64.cc
+++ b/gold/aarch64.cc
@@ -2915,6 +2915,7 @@ class Target_aarch64 : public Sized_target<size, big_endian>
Section_id_hash> AArch64_input_section_map;
typedef AArch64_insn_utilities<big_endian> Insn_utilities;
const static int TCB_SIZE = size / 8 * 2;
+ static const Address invalid_address = static_cast<Address>(-1);
Target_aarch64(const Target::Target_info* info = &aarch64_info)
: Sized_target<size, big_endian>(info),
@@ -8285,6 +8286,25 @@ Target_aarch64<size, big_endian>::relocate_relocs(
gold_assert(sh_type == elfcpp::SHT_RELA);
+ if (offset_in_output_section == this->invalid_address) {
+ const Output_relaxed_input_section* poris =
+ output_section->find_relaxed_input_section(relinfo->object,
+ relinfo->data_shndx);
+ if (poris != NULL) {
+ Address section_address = poris->address();
+ section_size_type section_size = poris->data_size();
+
+ gold_assert((section_address >= view_address)
+ && ((section_address + section_size)
+ <= (view_address + view_size)));
+
+ off_t offset = section_address - view_address;
+ view += offset;
+ view_address += offset;
+ view_size = section_size;
+ }
+ }
+
gold::relocate_relocs<size, big_endian, Classify_reloc>(
relinfo,
prelocs,
diff --git a/gold/aarch64.cc b/gold/aarch64.cc
index 9f3af466..521908ff 100644
--- a/gold/aarch64.cc
+++ b/gold/aarch64.cc
@@ -1182,7 +1182,7 @@ class Reloc_stub : public Stub_base<size, big_endian>
aarch64_valid_for_adrp_p(AArch64_address location, AArch64_address dest)
{
typedef AArch64_relocate_functions<size, big_endian> Reloc;
- int64_t adrp_imm = (Reloc::Page(dest) - Reloc::Page(location)) >> 12;
+ int64_t adrp_imm = ((int64_t)(Reloc::Page(dest) - Reloc::Page(location))) >> 12;
return adrp_imm >= MIN_ADRP_IMM && adrp_imm <= MAX_ADRP_IMM;
}
--
2.26.0

1983
backport-0001-CVE-2021-42574.patch
View File

File diff suppressed because it is too large Load Diff

54
backport-0001-PR28391-strip-objcopy-preserve-dates-.a-cannot-set-t.patch
View File

@ -1,54 +0,0 @@
From 70b88840a4c65c8f5e2244129487886b5a5c7664 Mon Sep 17 00:00:00 2001
From: Gleb Fotengauer-Malinovskiy <glebfm@altlinux.org>
Date: Tue, 28 Sep 2021 20:11:26 +0930
Subject: [PATCH] PR28391, strip/objcopy --preserve-dates *.a: cannot set time
Reference: https://sourceware.org/git/?p=binutils-gdb.git;a=patch;h=6b02746a0e29b1007efd4feb137e2da3e681fc68
After commit 985e0264516 copy_archive function began to pass invalid
values to the utimensat(2) function when it tries to preserve
timestamps in ar archives. This happens because the bfd_stat_arch_elt
implementation for ar archives fills only the st_mtim.tv_sec part of
the st_mtim timespec structure, but leaves the st_mtim.tv_nsec part
and the whole st_atim timespec untouched leaving them uninitialized
PR 28391
* ar.c (extract_file): Clear buf for preserve_dates.
* objcopy.c (copy_archive): Likewise.
(cherry picked from commit 0d62064867c74286360e821b75ef6799bedc4b34)
Signed-off-by: maminjie <maminjie8@163.com>
---
binutils/ar.c | 3 +++
binutils/objcopy.c | 1 +
2 files changed, 4 insertions(+)
diff --git a/binutils/ar.c b/binutils/ar.c
index 5d6976c7..8885585e 100644
--- a/binutils/ar.c
+++ b/binutils/ar.c
@@ -1180,6 +1180,9 @@ extract_file (bfd *abfd)
bfd_size_type size;
struct stat buf;
+ if (preserve_dates)
+ memset (&buf, 0, sizeof (buf));
+
if (bfd_stat_arch_elt (abfd, &buf) != 0)
/* xgettext:c-format */
fatal (_("internal stat error on %s"), bfd_get_filename (abfd));
diff --git a/binutils/objcopy.c b/binutils/objcopy.c
index fe3ea29c..242b1052 100644
--- a/binutils/objcopy.c
+++ b/binutils/objcopy.c
@@ -3600,6 +3600,7 @@ copy_archive (bfd *ibfd, bfd *obfd, const char *output_target,
if (preserve_dates)
{
+ memset (&buf, 0, sizeof (buf));
stat_status = bfd_stat_arch_elt (this_element, &buf);
if (stat_status != 0)
--
2.30.0

37
backport-0001-texi2pod.pl-add-no-op-no-split-option-support-PR2814.patch
View File

@ -1,37 +0,0 @@
From 96a7037cd8573cf065aa6b12baca68696f96d9ca Mon Sep 17 00:00:00 2001
From: Sergei Trofimovich <siarheit@google.com>
Date: Mon, 26 Jul 2021 22:51:18 +0100
Subject: [PATCH] texi2pod.pl: add no-op --no-split option support [PR28144]
Change 2faf902da ("generate single html manual page by default")
added use of --no-split option to makeinfo. binutils reuses
makeinfo options for texi2pod.pl wrapper. Unsupported option
led to silent manpage truncation.
The change adds no-op option support.
etc/
* texi2pod.pl: Handle no-op --no-split option.
Signed-off-by: Wei, Qiang <qiang.wei@suse.com>
---
etc/texi2pod.pl | 2 ++
1 file changed, 2 insertions(+)
diff --git a/etc/texi2pod.pl b/etc/texi2pod.pl
index 11f70d156be..dcf2b437640 100644
--- a/etc/texi2pod.pl
+++ b/etc/texi2pod.pl
@@ -59,6 +59,8 @@ while ($_ = shift) {
$flag = shift;
}
push (@ipath, $flag);
+ } elsif (/^--no-split$/) {
+ # ignore option for makeinfo compatibility
} elsif (/^-/) {
usage();
} else {
--
2.33.0

194
backport-0002-CVE-2021-42574.patch
View File

@ -1,194 +0,0 @@
From 795588aec4f894206863c938bd6d716895886009 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Pekka=20Sepp=C3=A4nen?= <pexu@sourceware.mail.kapsi.fi>
Date: Wed, 10 Nov 2021 20:15:19 +1030
Subject: [PATCH] PR28575, readelf.c and strings.c use undefined type uint
Since --unicode support (commit b3aa80b45c4) both binutils/readelf.c
and binutils/strings.c use 'uint' in a few locations. It likely
should be 'unsigned int' since there isn't anything defining 'uint'
within binutils (besides zlib) and AFAIK it isn't a standard type.
* readelf.c (print_symbol): Replace uint with unsigned int.
* strings.c (string_min, display_utf8_char): Likewise.
(print_unicode_stream_body, print_unicode_stream): Likewise.
(print_strings): Likewise.
(get_unicode_byte): Wrap long line.
---
binutils/readelf.c | 4 ++--
binutils/strings.c | 41 ++++++++++++++++++++++-------------------
2 files changed, 24 insertions(+), 21 deletions(-)
diff --git a/binutils/readelf.c b/binutils/readelf.c
index c71d542f051b..5a87728d3e98 100644
--- a/binutils/readelf.c
+++ b/binutils/readelf.c
@@ -702,7 +702,7 @@ print_symbol (signed int width, const char * symbol)
/* Display unicode characters as something else. */
unsigned char bytes[4];
bool is_utf8;
- uint nbytes;
+ unsigned int nbytes;
bytes[0] = c;
@@ -767,7 +767,7 @@ print_symbol (signed int width, const char * symbol)
if (unicode_display == unicode_hex || ! is_utf8)
{
- uint i;
+ unsigned int i;
if (width_remaining < (nbytes * 2) + 2)
break;
diff --git a/binutils/strings.c b/binutils/strings.c
index e8649a80d6a7..13db60f57a57 100644
--- a/binutils/strings.c
+++ b/binutils/strings.c
@@ -57,7 +57,7 @@
--unicode={default|locale|invalid|hex|escape|highlight}
-u {d|l|i|x|e|h}
- Determine how to handle UTF-8 unicode characters. The default
+ Determine how to handle UTF-8 unicode characters. The default
is no special treatment. All other versions of this option
only apply if the encoding is valid and enabling the option
implies --encoding=S.
@@ -123,7 +123,7 @@ extern int errno;
static int address_radix;
/* Minimum length of sequence of graphic chars to trigger output. */
-static uint string_min;
+static unsigned int string_min;
/* Whether or not we include all whitespace as a graphic char. */
static bool include_all_whitespace;
@@ -272,7 +272,7 @@ main (int argc, char **argv)
case 's':
output_separator = optarg;
- break;
+ break;
case 'U':
if (streq (optarg, "default") || streq (optarg, "d"))
@@ -677,7 +677,7 @@ is_valid_utf8 (const unsigned char * buffer, unsigned long buflen)
if ((buffer[2] & 0xc0) != 0x80)
return 0;
-
+
if ((buffer[0] & 0x10) == 0)
return 3;
@@ -694,11 +694,11 @@ is_valid_utf8 (const unsigned char * buffer, unsigned long buflen)
of unicode_display. The character is known to be valid.
Returns the number of bytes consumed. */
-static uint
+static unsigned int
display_utf8_char (const unsigned char * buffer)
{
- uint j;
- uint utf8_len;
+ unsigned int j;
+ unsigned int utf8_len;
switch (buffer[0] & 0x30)
{
@@ -712,7 +712,7 @@ display_utf8_char (const unsigned char * buffer)
default:
utf8_len = 4;
}
-
+
switch (unicode_display)
{
default:
@@ -728,7 +728,7 @@ display_utf8_char (const unsigned char * buffer)
{
case 2:
printf ("\\u%02x%02x",
- ((buffer[0] & 0x1c) >> 2),
+ ((buffer[0] & 0x1c) >> 2),
((buffer[0] & 0x03) << 6) | (buffer[1] & 0x3f));
break;
@@ -857,7 +857,7 @@ print_unicode_buffer (const char * filename,
return;
print_filename_and_address (filename, address + start_point);
-
+
/* We have found string_min characters. Display them and any
more that follow. */
for (i = start_point; i < buflen; i += char_len)
@@ -888,7 +888,10 @@ print_unicode_buffer (const char * filename,
}
static int
-get_unicode_byte (FILE * stream, unsigned char * putback, uint * num_putback, uint * num_read)
+get_unicode_byte (FILE * stream,
+ unsigned char * putback,
+ unsigned int * num_putback,
+ unsigned int * num_read)
{
if (* num_putback > 0)
{
@@ -912,7 +915,7 @@ print_unicode_stream_body (const char * filename,
file_ptr address,
FILE * stream,
unsigned char * putback_buf,
- uint num_putback,
+ unsigned int num_putback,
unsigned char * print_buf)
{
/* It would be nice if we could just read the stream into a buffer
@@ -921,9 +924,9 @@ print_unicode_stream_body (const char * filename,
we go one byte at a time... */
file_ptr start_point = 0;
- uint num_read = 0;
- uint num_chars = 0;
- uint num_print = 0;
+ unsigned int num_read = 0;
+ unsigned int num_chars = 0;
+ unsigned int num_print = 0;
int c = 0;
/* Find a series of string_min characters. Put them into print_buf. */
@@ -1064,7 +1067,7 @@ print_unicode_stream_body (const char * filename,
print_filename_and_address (filename, address + start_point);
- uint i;
+ unsigned int i;
for (i = 0; i < num_print;)
{
if (print_buf[i] < 127)
@@ -1075,7 +1078,7 @@ print_unicode_stream_body (const char * filename,
/* OK so now we have to start read unchecked bytes. */
- /* Find a series of string_min characters. Put them into print_buf. */
+ /* Find a series of string_min characters. Put them into print_buf. */
do
{
c = get_unicode_byte (stream, putback_buf, & num_putback, & num_read);
@@ -1213,7 +1216,7 @@ print_unicode_stream (const char * filename,
unsigned char * print_buf = xmalloc ((4 * string_min) + 1);
/* We should never have to put back more than 4 bytes. */
unsigned char putback_buf[5];
- uint num_putback = 0;
+ unsigned int num_putback = 0;
print_unicode_stream_body (filename, address, stream, putback_buf, num_putback, print_buf);
free (print_buf);
@@ -1250,7 +1253,7 @@ print_strings (const char *filename, FILE *stream, file_ptr address,
while (1)
{
file_ptr start;
- uint i;
+ unsigned int i;
long c;
/* See if the next `string_min' chars are all graphic chars. */

33
backport-0003-CVE-2021-42574.patch
View File

@ -1,33 +0,0 @@
From 584294c4066d0101161e4e04744a46cce7a7863e Mon Sep 17 00:00:00 2001
From: Nick Clifton <nickc@redhat.com>
Date: Mon, 29 Nov 2021 15:37:24 +0000
Subject: [PATCH] strings: Replace references to -u option with references to
-U.
PR 28632
---
binutils/strings.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/binutils/strings.c b/binutils/strings.c
index f594299939f9..f85cb03406c9 100644
--- a/binutils/strings.c
+++ b/binutils/strings.c
@@ -57,7 +57,7 @@
Specify a non-default object file format.
--unicode={default|locale|invalid|hex|escape|highlight}
- -u {d|l|i|x|e|h}
+ -U {d|l|i|x|e|h}
Determine how to handle UTF-8 unicode characters. The default
is no special treatment. All other versions of this option
only apply if the encoding is valid and enabling the option
@@ -1333,7 +1333,7 @@ usage (FILE *stream, int status)
-e --encoding={s,S,b,l,B,L} Select character size and endianness:\n\
s = 7-bit, S = 8-bit, {b,l} = 16-bit, {B,L} = 32-bit\n\
--unicode={default|show|invalid|hex|escape|highlight}\n\
- -u {d|s|i|x|e|h} Specify how to treat UTF-8 encoded unicode characters\n\
+ -U {d|s|i|x|e|h} Specify how to treat UTF-8 encoded unicode characters\n\
-s --output-separator=<string> String used to separate strings in output.\n\
@<file> Read options from <file>\n\
-h --help Display this information\n\

179
backport-AArch64-Add-support-for-AArch64-EFI-efi-aarch64.patch
View File

@ -1,179 +0,0 @@
From 4b6391170a7c3a70946501fb51606c95827ed9cb Mon Sep 17 00:00:00 2001
From: Alan Modra <amodra@gmail.com>
Date: Thu, 25 Nov 2021 14:26:51 +1030
Subject: [PATCH 1/3] AArch64: Add support for AArch64 EFI (efi-*-aarch64)
Commit b69c9d41e8 edited bfd/Makefile.in rather than using automake,
which meant a typo in Makefile.am was not discovered and other
differences in Makefile.in are seen with a proper regeneration. One
difference was lack of an empty line between the pe-aarch64igen.c rule
and the following $(BFD32_LIBS) etc. dependency rule, in the
regenerated file. Not that it matters for proper "make" behaviour,
but it's nicer with a line between those rules. Moving the rule
earlier seems to cure the missing empty line.
* Makefile.am (BFD64_BACKENDS): Correct typo.
(BFD_H_DEPS, LOCAL_H_DEPS): Move earlier. Move rule using these
deps earlier too.
* Makefile.in: Regenerate.
* po/BLD-POTFILES.in: Regenerate.
* po/SRC-POTFILES.in: Regenerate.
References: bsn#351
Signed-off-by: Chenxi Mao <chenxi.mao@suse.com>
---
bfd/Makefile.am | 20 ++++++++++----------
bfd/Makefile.in | 21 ++++++++++-----------
bfd/po/BLD-POTFILES.in | 1 +
bfd/po/SRC-POTFILES.in | 1 +
4 files changed, 22 insertions(+), 21 deletions(-)
diff --git a/bfd/Makefile.am b/bfd/Makefile.am
index a4e84a1d..7c859428 100644
--- a/bfd/Makefile.am
+++ b/bfd/Makefile.am
@@ -569,7 +569,7 @@ BFD64_BACKENDS = \
mmo.lo \
pe-aarch64igen.lo \
pe-x86_64.lo \
- pei-aarch64lo \
+ pei-aarch64.lo \
pei-ia64.lo \
pei-x86_64.lo \
pepigen.lo \
@@ -710,6 +710,15 @@ BUILT_SOURCES = $(BUILD_HFILES)
HFILES = $(SOURCE_HFILES) $(BUILD_HFILES)
+BFD_H_DEPS = $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/diagnostics.h
+LOCAL_H_DEPS = libbfd.h sysdep.h config.h
+$(BFD32_LIBS) \
+ $(BFD64_LIBS) \
+ $(ALL_MACHINES) \
+ $(BFD32_BACKENDS) \
+ $(BFD64_BACKENDS) \
+ $(OPTIONAL_BACKENDS): $(BFD_H) $(BFD_H_DEPS) $(LOCAL_H_DEPS)
+
SRC_POTFILES = $(SOURCE_CFILES) $(SOURCE_HFILES)
BLD_POTFILES = $(BUILD_CFILES) $(BUILD_HFILES)
@@ -869,15 +878,6 @@ pe-aarch64igen.c: peXXigen.c
echo "#line 1 \"peXXigen.c\"" > $@
$(SED) -e s/XX/peAArch64/g < $< >> $@
-BFD_H_DEPS= $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/diagnostics.h
-LOCAL_H_DEPS= libbfd.h sysdep.h config.h
-$(BFD32_LIBS) \
- $(BFD64_LIBS) \
- $(ALL_MACHINES) \
- $(BFD32_BACKENDS) \
- $(BFD64_BACKENDS) \
- $(OPTIONAL_BACKENDS): $(BFD_H) $(BFD_H_DEPS) $(LOCAL_H_DEPS)
-
host-aout.lo: Makefile
# The following program can be used to generate a simple config file
diff --git a/bfd/Makefile.in b/bfd/Makefile.in
index dd029f68..66fa92c1 100644
--- a/bfd/Makefile.in
+++ b/bfd/Makefile.in
@@ -1131,6 +1131,8 @@ BUILD_HFILES = \
# Ensure they are built early:
BUILT_SOURCES = $(BUILD_HFILES)
HFILES = $(SOURCE_HFILES) $(BUILD_HFILES)
+BFD_H_DEPS = $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/diagnostics.h
+LOCAL_H_DEPS = libbfd.h sysdep.h config.h
SRC_POTFILES = $(SOURCE_CFILES) $(SOURCE_HFILES)
BLD_POTFILES = $(BUILD_CFILES) $(BUILD_HFILES)
@@ -1156,8 +1158,6 @@ libbfd_la_LIBADD = `cat ofiles` @SHARED_LIBADD@ $(LIBDL) $(ZLIB)
# everything else starts using libtool. FIXME.
noinst_LIBRARIES = libbfd.a
libbfd_a_SOURCES =
-BFD_H_DEPS = $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/diagnostics.h
-LOCAL_H_DEPS = libbfd.h sysdep.h config.h
BFD_H_FILES = bfd-in.h init.c opncls.c libbfd.c \
bfdio.c bfdwin.c section.c archures.c reloc.c \
syms.c bfd.c archive.c corefile.c targets.c format.c \
@@ -1540,6 +1540,7 @@ distclean-compile:
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/osf-core.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pc532-mach.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pdp11.Plo@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pe-aarch64igen.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pe-arm-wince.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pe-arm.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pe-i386.Plo@am__quote@
@@ -1547,6 +1548,7 @@ distclean-compile:
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pe-sh.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pe-x86_64.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pef.Plo@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pei-aarch64.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pei-arm-wince.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pei-arm.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pei-i386.Plo@am__quote@
@@ -1554,11 +1556,9 @@ distclean-compile:
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pei-mcore.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pei-sh.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pei-x86_64.Plo@am__quote@
-@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pei-aarch64.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/peigen.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pepigen.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pex64igen.Plo@am__quote@
-@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pe-aarch64igen.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/plugin.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/ppcboot.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/reloc.Plo@am__quote@
@@ -1884,6 +1884,12 @@ uninstall-am: uninstall-bfdincludeHEADERS uninstall-bfdlibLTLIBRARIES
.PRECIOUS: Makefile
+$(BFD32_LIBS) \
+ $(BFD64_LIBS) \
+ $(ALL_MACHINES) \
+ $(BFD32_BACKENDS) \
+ $(BFD64_BACKENDS) \
+ $(OPTIONAL_BACKENDS): $(BFD_H) $(BFD_H_DEPS) $(LOCAL_H_DEPS)
po/SRC-POTFILES.in: @MAINT@ Makefile $(SRC_POTFILES)
for file in $(SRC_POTFILES); do echo $$file; done \
@@ -2001,13 +2007,6 @@ pe-aarch64igen.c: peXXigen.c
echo "#line 1 \"peXXigen.c\"" > $@
$(SED) -e s/XX/peAArch64/g < $< >> $@
-$(BFD32_LIBS) \
- $(BFD64_LIBS) \
- $(ALL_MACHINES) \
- $(BFD32_BACKENDS) \
- $(BFD64_BACKENDS) \
- $(OPTIONAL_BACKENDS): $(BFD_H) $(BFD_H_DEPS) $(LOCAL_H_DEPS)
-
host-aout.lo: Makefile
# The following program can be used to generate a simple config file
diff --git a/bfd/po/BLD-POTFILES.in b/bfd/po/BLD-POTFILES.in
index f81e2b40..f0a870df 100644
--- a/bfd/po/BLD-POTFILES.in
+++ b/bfd/po/BLD-POTFILES.in
@@ -7,6 +7,7 @@ elf64-aarch64.c
elf64-ia64.c
elf64-riscv.c
elf64-target.h
+pe-aarch64igen.c
peigen.c
pepigen.c
pex64igen.c
diff --git a/bfd/po/SRC-POTFILES.in b/bfd/po/SRC-POTFILES.in
index c83b86cd..10de7bc0 100644
--- a/bfd/po/SRC-POTFILES.in
+++ b/bfd/po/SRC-POTFILES.in
@@ -320,6 +320,7 @@ pe-x86_64.c
pef-traceback.h
pef.c
pef.h
+pei-aarch64.c
pei-arm-wince.c
pei-arm.c
pei-i386.c
--
2.30.2

158
backport-Add-support-for-AArch64-EFI-efi-aarch64.patch
View File

@ -1,158 +0,0 @@
From fd932228d9104001abbf6a1c8ef1bb030ab7a21d Mon Sep 17 00:00:00 2001
From: Alan Modra <amodra@gmail.com>
Date: Tue, 7 Dec 2021 12:36:31 +1030
Subject: [PATCH 2/3] Add support for AArch64 EFI (efi-*-aarch64)
Commit b69c9d41e8 was broken in multiple ways regarding the realloc
of the target string, most notably in that "-little" wasn't actually
appended to the input_target or output_target. This caused asan
errors and "FAIL: Check if efi app format is recognized". I also
noticed that the input_target string wasn't being copied but rather
the output_target when dealing with the input target. Fix that too.
PR 26206
* objcopy.c (convert_efi_target): Rewrite. Allocate modified
target strings here..
(copy_main): ..rather than here. Do handle input_target,
not output_target for input.
References: bsn#351
Signed-off-by: Chenxi Mao <chenxi.mao@suse.com>
---
binutils/objcopy.c | 86 +++++++++++++++++++++-------------------------
1 file changed, 40 insertions(+), 46 deletions(-)
diff --git a/binutils/objcopy.c b/binutils/objcopy.c
index 242b1052..cbff93b3 100644
--- a/binutils/objcopy.c
+++ b/binutils/objcopy.c
@@ -4969,32 +4969,55 @@ set_pe_subsystem (const char *s)
/* Convert EFI target to PEI target. */
-static void
-convert_efi_target (char *efi)
+static int
+convert_efi_target (char **targ)
{
- efi[0] = 'p';
- efi[1] = 'e';
- efi[2] = 'i';
+ size_t len;
+ char *pei;
+ char *efi = *targ + 4;
+ int subsys = -1;
+
+ if (startswith (efi, "app-"))
+ subsys = IMAGE_SUBSYSTEM_EFI_APPLICATION;
+ else if (startswith (efi, "bsdrv-"))
+ {
+ subsys = IMAGE_SUBSYSTEM_EFI_BOOT_SERVICE_DRIVER;
+ efi += 2;
+ }
+ else if (startswith (efi, "rtdrv-"))
+ {
+ subsys = IMAGE_SUBSYSTEM_EFI_RUNTIME_DRIVER;
+ efi += 2;
+ }
+ else
+ return subsys;
+
+ len = strlen (efi);
+ pei = xmalloc (len + sizeof ("-little"));
+ memcpy (pei, efi, len + 1);
+ pei[0] = 'p';
+ pei[1] = 'e';
+ pei[2] = 'i';
if (strcmp (efi + 4, "ia32") == 0)
{
/* Change ia32 to i386. */
- efi[5]= '3';
- efi[6]= '8';
- efi[7]= '6';
+ pei[5]= '3';
+ pei[6]= '8';
+ pei[7]= '6';
}
else if (strcmp (efi + 4, "x86_64") == 0)
{
/* Change x86_64 to x86-64. */
- efi[7] = '-';
+ pei[7] = '-';
}
else if (strcmp (efi + 4, "aarch64") == 0)
{
/* Change aarch64 to aarch64-little. */
- efi = (char *) xrealloc (efi, strlen (efi) + 7);
- char *t = "aarch64-little";
- strcpy (efi + 4, t);
+ memcpy (pei + 4 + sizeof ("aarch64") - 1, "-little", sizeof ("-little"));
}
+ *targ = pei;
+ return subsys;
}
/* Allocate and return a pointer to a struct section_add, initializing the
@@ -5877,53 +5900,24 @@ copy_main (int argc, char *argv[])
if (input_target != NULL
&& startswith (input_target, "efi-"))
{
- char *efi;
-
- efi = xstrdup (output_target + 4);
- if (startswith (efi, "bsdrv-")
- || startswith (efi, "rtdrv-"))
- efi += 2;
- else if (!startswith (efi, "app-"))
+ if (convert_efi_target (&input_target) < 0)
fatal (_("unknown input EFI target: %s"), input_target);
-
- input_target = efi;
- convert_efi_target (efi);
}
/* Convert output EFI target to PEI target. */
if (output_target != NULL
&& startswith (output_target, "efi-"))
{
- char *efi;
+ int subsys = convert_efi_target (&output_target);
- efi = xstrdup (output_target + 4);
- if (startswith (efi, "app-"))
- {
- if (pe_subsystem == -1)
- pe_subsystem = IMAGE_SUBSYSTEM_EFI_APPLICATION;
- }
- else if (startswith (efi, "bsdrv-"))
- {
- if (pe_subsystem == -1)
- pe_subsystem = IMAGE_SUBSYSTEM_EFI_BOOT_SERVICE_DRIVER;
- efi += 2;
- }
- else if (startswith (efi, "rtdrv-"))
- {
- if (pe_subsystem == -1)
- pe_subsystem = IMAGE_SUBSYSTEM_EFI_RUNTIME_DRIVER;
- efi += 2;
- }
- else
+ if (subsys < 0)
fatal (_("unknown output EFI target: %s"), output_target);
-
+ if (pe_subsystem == -1)
+ pe_subsystem = subsys;
if (pe_file_alignment == (bfd_vma) -1)
pe_file_alignment = PE_DEF_FILE_ALIGNMENT;
if (pe_section_alignment == (bfd_vma) -1)
pe_section_alignment = PE_DEF_SECTION_ALIGNMENT;
-
- output_target = efi;
- convert_efi_target (efi);
}
/* If there is no destination file, or the source and destination files
--
2.30.2

245
backport-CVE-2021-45078.patch
View File

@ -1,245 +0,0 @@
From 161e87d12167b1e36193385485c1f6ce92f74f02 Mon Sep 17 00:00:00 2001
From: Alan Modra <amodra@gmail.com>
Date: Wed, 15 Dec 2021 11:48:42 +1030
Subject: [PATCH] PR28694, Out-of-bounds write in stab_xcoff_builtin_type
PR 28694
* stabs.c (stab_xcoff_builtin_type): Make typenum unsigned.
Negate typenum earlier, simplifying bounds checking. Correct
off-by-one indexing. Adjust switch cases.
---
binutils/stabs.c | 87 ++++++++++++++++++++++++------------------------
1 file changed, 43 insertions(+), 44 deletions(-)
diff --git a/binutils/stabs.c b/binutils/stabs.c
index 274bfb0e7fa..83ee3ea5fa4 100644
--- a/binutils/stabs.c
+++ b/binutils/stabs.c
@@ -202,7 +202,7 @@ static debug_type stab_find_type (void *, struct stab_handle *, const int *);
static bool stab_record_type
(void *, struct stab_handle *, const int *, debug_type);
static debug_type stab_xcoff_builtin_type
- (void *, struct stab_handle *, int);
+ (void *, struct stab_handle *, unsigned int);
static debug_type stab_find_tagged_type
(void *, struct stab_handle *, const char *, int, enum debug_type_kind);
static debug_type *stab_demangle_argtypes
@@ -3496,166 +3496,167 @@ stab_record_type (void *dhandle ATTRIBUTE_UNUSED, struct stab_handle *info,
static debug_type
stab_xcoff_builtin_type (void *dhandle, struct stab_handle *info,
- int typenum)
+ unsigned int typenum)
{
debug_type rettype;
const char *name;
- if (typenum >= 0 || typenum < -XCOFF_TYPE_COUNT)
+ typenum = -typenum - 1;
+ if (typenum >= XCOFF_TYPE_COUNT)
{
- fprintf (stderr, _("Unrecognized XCOFF type %d\n"), typenum);
+ fprintf (stderr, _("Unrecognized XCOFF type %d\n"), -typenum - 1);
return DEBUG_TYPE_NULL;
}
- if (info->xcoff_types[-typenum] != NULL)
- return info->xcoff_types[-typenum];
+ if (info->xcoff_types[typenum] != NULL)
+ return info->xcoff_types[typenum];
- switch (-typenum)
+ switch (typenum)
{
- case 1:
+ case 0:
/* The size of this and all the other types are fixed, defined
by the debugging format. */
name = "int";
rettype = debug_make_int_type (dhandle, 4, false);
break;
- case 2:
+ case 1:
name = "char";
rettype = debug_make_int_type (dhandle, 1, false);
break;
- case 3:
+ case 2:
name = "short";
rettype = debug_make_int_type (dhandle, 2, false);
break;
- case 4:
+ case 3:
name = "long";
rettype = debug_make_int_type (dhandle, 4, false);
break;
- case 5:
+ case 4:
name = "unsigned char";
rettype = debug_make_int_type (dhandle, 1, true);
break;
- case 6:
+ case 5:
name = "signed char";
rettype = debug_make_int_type (dhandle, 1, false);
break;
- case 7:
+ case 6:
name = "unsigned short";
rettype = debug_make_int_type (dhandle, 2, true);
break;
- case 8:
+ case 7:
name = "unsigned int";
rettype = debug_make_int_type (dhandle, 4, true);
break;
- case 9:
+ case 8:
name = "unsigned";
rettype = debug_make_int_type (dhandle, 4, true);
break;
- case 10:
+ case 9:
name = "unsigned long";
rettype = debug_make_int_type (dhandle, 4, true);
break;
- case 11:
+ case 10:
name = "void";
rettype = debug_make_void_type (dhandle);
break;
- case 12:
+ case 11:
/* IEEE single precision (32 bit). */
name = "float";
rettype = debug_make_float_type (dhandle, 4);
break;
- case 13:
+ case 12:
/* IEEE double precision (64 bit). */
name = "double";
rettype = debug_make_float_type (dhandle, 8);
break;
- case 14:
+ case 13:
/* This is an IEEE double on the RS/6000, and different machines
with different sizes for "long double" should use different
negative type numbers. See stabs.texinfo. */
name = "long double";
rettype = debug_make_float_type (dhandle, 8);
break;
- case 15:
+ case 14:
name = "integer";
rettype = debug_make_int_type (dhandle, 4, false);
break;
- case 16:
+ case 15:
name = "boolean";
rettype = debug_make_bool_type (dhandle, 4);
break;
- case 17:
+ case 16:
name = "short real";
rettype = debug_make_float_type (dhandle, 4);
break;
- case 18:
+ case 17:
name = "real";
rettype = debug_make_float_type (dhandle, 8);
break;
- case 19:
+ case 18:
/* FIXME */
name = "stringptr";
rettype = NULL;
break;
- case 20:
+ case 19:
/* FIXME */
name = "character";
rettype = debug_make_int_type (dhandle, 1, true);
break;
- case 21:
+ case 20:
name = "logical*1";
rettype = debug_make_bool_type (dhandle, 1);
break;
- case 22:
+ case 21:
name = "logical*2";
rettype = debug_make_bool_type (dhandle, 2);
break;
- case 23:
+ case 22:
name = "logical*4";
rettype = debug_make_bool_type (dhandle, 4);
break;
- case 24:
+ case 23:
name = "logical";
rettype = debug_make_bool_type (dhandle, 4);
break;
- case 25:
+ case 24:
/* Complex type consisting of two IEEE single precision values. */
name = "complex";
rettype = debug_make_complex_type (dhandle, 8);
break;
- case 26:
+ case 25:
/* Complex type consisting of two IEEE double precision values. */
name = "double complex";
rettype = debug_make_complex_type (dhandle, 16);
break;
- case 27:
+ case 26:
name = "integer*1";
rettype = debug_make_int_type (dhandle, 1, false);
break;
- case 28:
+ case 27:
name = "integer*2";
rettype = debug_make_int_type (dhandle, 2, false);
break;
- case 29:
+ case 28:
name = "integer*4";
rettype = debug_make_int_type (dhandle, 4, false);
break;
- case 30:
+ case 29:
/* FIXME */
name = "wchar";
rettype = debug_make_int_type (dhandle, 2, false);
break;
- case 31:
+ case 30:
name = "long long";
rettype = debug_make_int_type (dhandle, 8, false);
break;
- case 32:
+ case 31:
name = "unsigned long long";
rettype = debug_make_int_type (dhandle, 8, true);
break;
- case 33:
+ case 32:
name = "logical*8";
rettype = debug_make_bool_type (dhandle, 8);
break;
- case 34:
+ case 33:
name = "integer*8";
rettype = debug_make_int_type (dhandle, 8, false);
break;
@@ -3664,9 +3665,7 @@ stab_xcoff_builtin_type (void *dhandle, struct stab_handle *info,
}
rettype = debug_name_type (dhandle, name, rettype);
-
- info->xcoff_types[-typenum] = rettype;
-
+ info->xcoff_types[typenum] = rettype;
return rettype;
}

34
backport-CVE-2022-38126.patch
View File

@ -1,34 +0,0 @@
From 753efb93dc018558c483111fbfe14c4ee8c84c51 Mon Sep 17 00:00:00 2001
From: yinyongkang <yinyongkang@kylinos.cn>
Date: Thu, 8 Sep 2022 17:14:11 +0800
Subject: [PATCH] Replace a run-time assertion failure with a warning message
when parsing corrupt...
PR 29289
* dwarf.c (display_debug_names): Replace assert with a warning
message.
---
binutils/dwarf.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/binutils/dwarf.c b/binutils/dwarf.c
index 1e7f4db7..7c54820a 100644
--- a/binutils/dwarf.c
+++ b/binutils/dwarf.c
@@ -9781,7 +9781,12 @@ display_debug_names (struct dwarf_section *section, void *file)
printf (_("Out of %lu items there are %zu bucket clashes"
" (longest of %zu entries).\n"),
(unsigned long) name_count, hash_clash_count, longest_clash);
- assert (name_count == buckets_filled + hash_clash_count);
+
+ if (name_count != buckets_filled + hash_clash_count)
+ warn (_("The name_count (%lu) is not the same as the used bucket_count (%lu) + the hash clash count (%lu)"),
+ (unsigned long) name_count,
+ (unsigned long) buckets_filled,
+ (unsigned long) hash_clash_count);
struct abbrev_lookup_entry
{
--
2.33.0

32
backport-PR28186-SEGV-elf.c-7991-30-in-_bfd_elf_fixup_group_sections.patch
View File

@ -1,32 +0,0 @@
From d86cf1b0d5ac6c0d900ae2b2a07fce7c4414d0e6 Mon Sep 17 00:00:00 2001
From: Alan Modra <amodra@gmail.com>
Date: Sat, 7 Aug 2021 14:10:38 +0930
Subject: [PATCH] PR28186, SEGV elf.c:7991:30 in _bfd_elf_fixup_group_sections
PR 28186
* elf.c (_bfd_elf_fixup_group_sections): Don't segfault on
objcopy/strip with NULL output_section.
(cherry picked from commit 182ad37589e3931390d0c43f1d52a9a6e0062a61)
Reference:https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=d86cf1b0d5ac6c0d900ae2b2a07fce7c4414d0e6
Conflict:NA
---
bfd/elf.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/bfd/elf.c b/bfd/elf.c
index de5abafabf0..9c3f34c415b 100644
--- a/bfd/elf.c
+++ b/bfd/elf.c
@@ -7984,7 +7984,7 @@ _bfd_elf_fixup_group_sections (bfd *ibfd, asection *discarded)
isec->flags |= SEC_EXCLUDE;
}
}
- else
+ else if (isec->output_section != NULL)
{
/* Adjust the output section size when called from
objcopy. */
--
2.23.0

33
backport-PR28422-build_id-use-after-free.patch
View File

@ -1,33 +0,0 @@
From c20c7adbeaa3af18a58ba1e20e6c33e7186356e3 Mon Sep 17 00:00:00 2001
From: Alan Modra <amodra@gmail.com>
Date: Wed, 6 Oct 2021 18:28:47 +1030
Subject: [PATCH] PR28422, build_id use-after-free
This fixes a bug in commit 5d9bbb73c1df. All fields preserved from a
bfd in struct bfd_preserve need to be cleared in bfd_reinit.
PR 28422
* format.c (bfd_reinit): Clear build_id.
(cherry picked from commit 6d661cdc5be46e890ed9255e749806f46a88e26c)
Reference:https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=c20c7adbeaa3af18a58ba1e20e6c33e7186356e3
Conflict:NA
---
bfd/format.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/bfd/format.c b/bfd/format.c
index 5d08d1d642c..408c984690e 100644
--- a/bfd/format.c
+++ b/bfd/format.c
@@ -151,6 +151,7 @@ bfd_reinit (bfd *abfd, unsigned int section_id, bfd_cleanup cleanup)
abfd->tdata.any = NULL;
abfd->arch_info = &bfd_default_arch_struct;
abfd->flags &= BFD_FLAGS_SAVED;
+ abfd->build_id = NULL;
bfd_section_list_clear (abfd);
}
--
2.23.0

32
backport-PR28540-segmentation-fault-on-NULL-byte_get.patch
View File

@ -1,32 +0,0 @@
From 96eb21265ebffbc28f767bed9a2b7650ecb9818d Mon Sep 17 00:00:00 2001
From: Alan Modra <amodra@gmail.com>
Date: Thu, 4 Nov 2021 14:11:02 +1030
Subject: [PATCH] PR28540, segmentation fault on NULL byte_get
PR 28540
* objdump.c (dump_bfd): Don't attempt load_separate_debug_files
when byte_get is NULL.
(cherry picked from commit f2f105f518413ea3e4c212f89585f9a8a5dddcdd)
Reference:https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=96eb21265ebffbc28f767bed9a2b7650ecb9818d
Conflict:NA
---
binutils/objdump.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/binutils/objdump.c b/binutils/objdump.c
index a7b8303b992..50317b3d48f 100644
--- a/binutils/objdump.c
+++ b/binutils/objdump.c
@@ -4869,7 +4869,7 @@ dump_bfd (bfd *abfd, bool is_mainfile)
The test on is_mainfile is there because the chain of separate debug
info files is a global variable shared by all invocations of dump_bfd. */
- if (is_mainfile)
+ if (byte_get != NULL && is_mainfile)
{
load_separate_debug_files (abfd, bfd_get_filename (abfd));
--
2.23.0

111
backport-don-t-over-align-file-positions-of-PE-executable-sec.patch
View File

@ -1,111 +0,0 @@
From 5bb067dba365e713bf988a06f7ed1c352aab52c4 Mon Sep 17 00:00:00 2001
From: Jan Beulich <jbeulich@suse.com>
Date: Thu, 19 May 2022 12:43:10 +0200
Subject: [PATCH 3/3] don't over-align file positions of PE executable sections
When a sufficiently small alignment was specified via --file-alignment,
individual section alignment shouldn't affect placement within the file.
This involves first of all clearing D_PAGED for images when section and
file alignment together don't permit paging of the image. The involved
comparison against COFF_PAGE_SIZE in turn helped point out (through a
compiler warning) that 'page_size' should be of unsigned type (as in
particular FileAlignment is). This yet in turn pointed out a dubious
error condition (which is being deleted).
For the D_PAGED case I think the enforced file alignment may still be
too high, but I'm wary of changing that logic without knowing of
possible corner cases.
Furthermore file positions in PE should be independent of the alignment
recorded in section headers anyway. Otherwise there are e.g. anomalies
following commit 6f8f6017a0c4 ("PR27567, Linking PE files adds alignment
section flags to executables") in that linking would use information a
subsequent processing step (e.g. stripping) wouldn't have available
anymore, and hence a binary could change in that 2nd step for no actual
reason. (Similarly stripping a binary linked with a linker pre-dating
that commit would change the binary again when stripping it a 2nd time.)
References: bsn#351
Signed-off-by: Chenxi Mao <chenxi.mao@suse.com>
---
bfd/coffcode.h | 29 ++++++++++++++---------------
1 file changed, 14 insertions(+), 15 deletions(-)
diff --git a/bfd/coffcode.h b/bfd/coffcode.h
index a5a4979f..d222c88d 100644
--- a/bfd/coffcode.h
+++ b/bfd/coffcode.h
@@ -2952,7 +2952,7 @@ coff_compute_section_file_positions (bfd * abfd)
#endif
#ifdef COFF_IMAGE_WITH_PE
- int page_size;
+ unsigned int page_size;
if (coff_data (abfd)->link_info
|| (pe_data (abfd) && pe_data (abfd)->pe_opthdr.FileAlignment))
@@ -2963,22 +2963,12 @@ coff_compute_section_file_positions (bfd * abfd)
This repairs 'ld -r' for arm-wince-pe target. */
if (page_size == 0)
page_size = 1;
-
- /* PR 17512: file: 0ac816d3. */
- if (page_size < 0)
- {
- bfd_set_error (bfd_error_file_too_big);
- _bfd_error_handler
- /* xgettext:c-format */
- (_("%pB: page size is too large (0x%x)"), abfd, page_size);
- return false;
- }
}
else
page_size = PE_DEF_FILE_ALIGNMENT;
#else
#ifdef COFF_PAGE_SIZE
- int page_size = COFF_PAGE_SIZE;
+ unsigned int page_size = COFF_PAGE_SIZE;
#endif
#endif
@@ -3060,9 +3050,10 @@ coff_compute_section_file_positions (bfd * abfd)
bfd_size_type amt;
#ifdef COFF_PAGE_SIZE
- /* Clear D_PAGED if section alignment is smaller than
- COFF_PAGE_SIZE. */
- if (pe_data (abfd)->pe_opthdr.SectionAlignment < COFF_PAGE_SIZE)
+ /* Clear D_PAGED if section / file alignment aren't suitable for
+ paging at COFF_PAGE_SIZE granularity. */
+ if (pe_data (abfd)->pe_opthdr.SectionAlignment < COFF_PAGE_SIZE
+ || page_size < COFF_PAGE_SIZE)
abfd->flags &= ~D_PAGED;
#endif
@@ -3183,7 +3174,11 @@ coff_compute_section_file_positions (bfd * abfd)
padding the previous section up if necessary. */
old_sofar = sofar;
+#ifdef COFF_IMAGE_WITH_PE
+ sofar = BFD_ALIGN (sofar, page_size);
+#else
sofar = BFD_ALIGN (sofar, 1 << current->alignment_power);
+#endif
#ifdef RS6000COFF_C
/* Make sure the file offset and the vma of .text/.data are at the
@@ -3259,7 +3254,11 @@ coff_compute_section_file_positions (bfd * abfd)
else
{
old_sofar = sofar;
+#ifdef COFF_IMAGE_WITH_PE
+ sofar = BFD_ALIGN (sofar, page_size);
+#else
sofar = BFD_ALIGN (sofar, 1 << current->alignment_power);
+#endif
align_adjust = sofar != old_sofar;
current->size += sofar - old_sofar;
}
--
2.30.2

234
bfd-Close-the-file-descriptor-if-there-is-no-archive.patch
View File

@ -1,234 +0,0 @@
From 1c611b40e6bfc8029bff7696814330b5bc0ee5c0 Mon Sep 17 00:00:00 2001
From: "H.J. Lu" <hjl.tools@gmail.com>
Date: Mon, 26 Jul 2021 05:59:55 -0700
Subject: [PATCH] bfd: Close the file descriptor if there is no archive fd
Close the file descriptor if there is no archive plugin file descriptor
to avoid running out of file descriptors on thin archives with many
archive members.
bfd/
PR ld/28138
* plugin.c (bfd_plugin_close_file_descriptor): Close the file
descriptor there is no archive plugin file descriptor.
ld/
PR ld/28138
* testsuite/ld-plugin/lto.exp: Run tmpdir/pr28138 only for
native build.
PR ld/28138
* testsuite/ld-plugin/lto.exp: Run ld/28138 tests.
* testsuite/ld-plugin/pr28138.c: New file.
* testsuite/ld-plugin/pr28138-1.c: Likewise.
* testsuite/ld-plugin/pr28138-2.c: Likewise.
* testsuite/ld-plugin/pr28138-3.c: Likewise.
* testsuite/ld-plugin/pr28138-4.c: Likewise.
* testsuite/ld-plugin/pr28138-5.c: Likewise.
* testsuite/ld-plugin/pr28138-6.c: Likewise.
* testsuite/ld-plugin/pr28138-7.c: Likewise.
(cherry picked from commit 5a98fb7513b559e20dfebdbaa2a471afda3b4742)
(cherry picked from commit 7dc37e1e1209c80e0bab784df6b6bac335e836f2)
Signed-off-by: Kai Liu <kai.liu@suse.com>
---
bfd/plugin.c | 8 +++++++
ld/testsuite/ld-plugin/lto.exp | 34 ++++++++++++++++++++++++++++++
ld/testsuite/ld-plugin/pr28138-1.c | 6 ++++++
ld/testsuite/ld-plugin/pr28138-2.c | 6 ++++++
ld/testsuite/ld-plugin/pr28138-3.c | 6 ++++++
ld/testsuite/ld-plugin/pr28138-4.c | 6 ++++++
ld/testsuite/ld-plugin/pr28138-5.c | 6 ++++++
ld/testsuite/ld-plugin/pr28138-6.c | 6 ++++++
ld/testsuite/ld-plugin/pr28138-7.c | 6 ++++++
ld/testsuite/ld-plugin/pr28138.c | 20 ++++++++++++++++++
10 files changed, 104 insertions(+)
create mode 100644 ld/testsuite/ld-plugin/pr28138-1.c
create mode 100644 ld/testsuite/ld-plugin/pr28138-2.c
create mode 100644 ld/testsuite/ld-plugin/pr28138-3.c
create mode 100644 ld/testsuite/ld-plugin/pr28138-4.c
create mode 100644 ld/testsuite/ld-plugin/pr28138-5.c
create mode 100644 ld/testsuite/ld-plugin/pr28138-6.c
create mode 100644 ld/testsuite/ld-plugin/pr28138-7.c
create mode 100644 ld/testsuite/ld-plugin/pr28138.c
diff --git a/bfd/plugin.c b/bfd/plugin.c
index 6cfa2b66470..3bab8febe88 100644
--- a/bfd/plugin.c
+++ b/bfd/plugin.c
@@ -291,6 +291,14 @@ bfd_plugin_close_file_descriptor (bfd *abfd, int fd)
&& !bfd_is_thin_archive (abfd->my_archive))
abfd = abfd->my_archive;
+ /* Close the file descriptor if there is no archive plugin file
+ descriptor. */
+ if (abfd->archive_plugin_fd == -1)
+ {
+ close (fd);
+ return;
+ }
+
abfd->archive_plugin_fd_open_count--;
/* Dup the archive plugin file descriptor for later use, which
will be closed by _bfd_archive_close_and_cleanup. */
diff --git a/ld/testsuite/ld-plugin/lto.exp b/ld/testsuite/ld-plugin/lto.exp
index def69e43ab3..999d911ce6a 100644
--- a/ld/testsuite/ld-plugin/lto.exp
+++ b/ld/testsuite/ld-plugin/lto.exp
@@ -687,6 +687,40 @@ if { [is_elf_format] && [check_lto_shared_available] } {
}
}
+run_cc_link_tests [list \
+ [list \
+ "Build pr28138.a" \
+ "-T" "" \
+ {pr28138-1.c pr28138-2.c pr28138-3.c pr28138-4.c pr28138-5.c \
+ pr28138-6.c pr28138-7.c} {} "pr28138.a" \
+ ] \
+ [list \
+ "Build pr28138.o" \
+ "" "" \
+ {pr28138.c} {} \
+ ] \
+]
+
+set exec_output [run_host_cmd "sh" \
+ "-c \"ulimit -n 20; \
+ $CC -Btmpdir/ld -o tmpdir/pr28138 \
+ tmpdir/pr28138.o tmpdir/pr28138.a\""]
+set exec_output [prune_warnings $exec_output]
+if [string match "" $exec_output] then {
+ if { [isnative] } {
+ set exec_output [run_host_cmd "tmpdir/pr28138" ""]
+ if [string match "PASS" $exec_output] then {
+ pass "PR ld/28138"
+ } else {
+ fail "PR ld/28138"
+ }
+ } else {
+ pass "PR ld/28138"
+ }
+} else {
+ fail "PR ld/28138"
+}
+
set testname "Build liblto-11.a"
remote_file host delete "tmpdir/liblto-11.a"
set catch_output [run_host_cmd "$ar" "rc $plug_opt tmpdir/liblto-11.a tmpdir/lto-11a.o tmpdir/lto-11b.o tmpdir/lto-11c.o"]
diff --git a/ld/testsuite/ld-plugin/pr28138-1.c b/ld/testsuite/ld-plugin/pr28138-1.c
new file mode 100644
index 00000000000..51d119e1642
--- /dev/null
+++ b/ld/testsuite/ld-plugin/pr28138-1.c
@@ -0,0 +1,6 @@
+extern int a0(void);
+int
+a1(void)
+{
+ return 1 + a0();
+}
diff --git a/ld/testsuite/ld-plugin/pr28138-2.c b/ld/testsuite/ld-plugin/pr28138-2.c
new file mode 100644
index 00000000000..1120cd797e9
--- /dev/null
+++ b/ld/testsuite/ld-plugin/pr28138-2.c
@@ -0,0 +1,6 @@
+extern int a1(void);
+int
+a2(void)
+{
+ return 1 + a1();
+}
diff --git a/ld/testsuite/ld-plugin/pr28138-3.c b/ld/testsuite/ld-plugin/pr28138-3.c
new file mode 100644
index 00000000000..ec464947ee6
--- /dev/null
+++ b/ld/testsuite/ld-plugin/pr28138-3.c
@@ -0,0 +1,6 @@
+extern int a2(void);
+int
+a3(void)
+{
+ return 1 + a2();
+}
diff --git a/ld/testsuite/ld-plugin/pr28138-4.c b/ld/testsuite/ld-plugin/pr28138-4.c
new file mode 100644
index 00000000000..475701b2c5c
--- /dev/null
+++ b/ld/testsuite/ld-plugin/pr28138-4.c
@@ -0,0 +1,6 @@
+extern int a3(void);
+int
+a4(void)
+{
+ return 1 + a3();
+}
diff --git a/ld/testsuite/ld-plugin/pr28138-5.c b/ld/testsuite/ld-plugin/pr28138-5.c
new file mode 100644
index 00000000000..e24f86c363e
--- /dev/null
+++ b/ld/testsuite/ld-plugin/pr28138-5.c
@@ -0,0 +1,6 @@
+extern int a4(void);
+int
+a5(void)
+{
+ return 1 + a4();
+}
diff --git a/ld/testsuite/ld-plugin/pr28138-6.c b/ld/testsuite/ld-plugin/pr28138-6.c
new file mode 100644
index 00000000000..b5b938bdb21
--- /dev/null
+++ b/ld/testsuite/ld-plugin/pr28138-6.c
@@ -0,0 +1,6 @@
+extern int a5(void);
+int
+a6(void)
+{
+ return 1 + a5();
+}
diff --git a/ld/testsuite/ld-plugin/pr28138-7.c b/ld/testsuite/ld-plugin/pr28138-7.c
new file mode 100644
index 00000000000..4ef75bf0f0c
--- /dev/null
+++ b/ld/testsuite/ld-plugin/pr28138-7.c
@@ -0,0 +1,6 @@
+extern int a6(void);
+int
+a7(void)
+{
+ return 1 + a6();
+}
diff --git a/ld/testsuite/ld-plugin/pr28138.c b/ld/testsuite/ld-plugin/pr28138.c
new file mode 100644
index 00000000000..68252c9f382
--- /dev/null
+++ b/ld/testsuite/ld-plugin/pr28138.c
@@ -0,0 +1,20 @@
+#include <stdio.h>
+
+extern int a7(void);
+
+int
+a0(void)
+{
+ return 0;
+}
+
+int
+main()
+{
+ if (a7() == 7)
+ {
+ printf ("PASS\n");
+ return 0;
+ }
+ return 1;
+}
--
2.34.1

BIN
binutils-2.37.tar.xz → binutils-2.40.tar.xz
View File

Binary file not shown.

944
binutils-AArch64-EFI.patch
View File

@ -1,944 +0,0 @@
diff -rup binutils.orig/bfd/.gitignore binutils-2.37/bfd/.gitignore
--- binutils.orig/bfd/.gitignore 2021-12-01 13:35:33.826078119 +0000
+++ binutils-2.37/bfd/.gitignore 2021-12-01 13:35:43.138988270 +0000
@@ -10,6 +10,7 @@
/peigen.c
/pepigen.c
/pex64igen.c
+/pe-aarch64igen.c
/stmp-bfd-h
/targmatch.h
diff -rup binutils.orig/bfd/Makefile.am binutils-2.37/bfd/Makefile.am
--- binutils.orig/bfd/Makefile.am 2021-12-01 13:35:33.817078206 +0000
+++ binutils-2.37/bfd/Makefile.am 2021-12-01 13:35:43.139988261 +0000
@@ -567,7 +567,9 @@ BFD64_BACKENDS = \
mach-o-aarch64.lo \
mach-o-x86-64.lo \
mmo.lo \
+ pe-aarch64igen.lo \
pe-x86_64.lo \
+ pei-aarch64lo \
pei-ia64.lo \
pei-x86_64.lo \
pepigen.lo \
@@ -607,6 +609,7 @@ BFD64_BACKENDS_CFILES = \
mach-o-x86-64.c \
mmo.c \
pe-x86_64.c \
+ pei-aarch64.c \
pei-ia64.c \
pei-x86_64.c \
vms-alpha.c
@@ -666,7 +669,7 @@ BUILD_CFILES = \
elf32-aarch64.c elf64-aarch64.c \
elf32-ia64.c elf64-ia64.c \
elf32-riscv.c elf64-riscv.c \
- peigen.c pepigen.c pex64igen.c
+ peigen.c pepigen.c pex64igen.c pe-aarch64igen.c
CFILES = $(SOURCE_CFILES) $(BUILD_CFILES)
@@ -862,6 +865,10 @@ pex64igen.c: peXXigen.c
echo "#line 1 \"peXXigen.c\"" > $@
$(SED) -e s/XX/pex64/g < $< >> $@
+pe-aarch64igen.c: peXXigen.c
+ echo "#line 1 \"peXXigen.c\"" > $@
+ $(SED) -e s/XX/peAArch64/g < $< >> $@
+
BFD_H_DEPS= $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/diagnostics.h
LOCAL_H_DEPS= libbfd.h sysdep.h config.h
$(BFD32_LIBS) \
diff -rup binutils.orig/bfd/Makefile.in binutils-2.37/bfd/Makefile.in
--- binutils.orig/bfd/Makefile.in 2021-12-01 13:35:33.823078148 +0000
+++ binutils-2.37/bfd/Makefile.in 2021-12-01 13:35:43.139988261 +0000
@@ -994,7 +994,9 @@ BFD64_BACKENDS = \
mach-o-aarch64.lo \
mach-o-x86-64.lo \
mmo.lo \
+ pe-aarch64igen.lo \
pe-x86_64.lo \
+ pei-aarch64.lo \
pei-ia64.lo \
pei-x86_64.lo \
pepigen.lo \
@@ -1034,6 +1036,7 @@ BFD64_BACKENDS_CFILES = \
mach-o-x86-64.c \
mmo.c \
pe-x86_64.c \
+ pei-aarch64.c \
pei-ia64.c \
pei-x86_64.c \
vms-alpha.c
@@ -1092,7 +1095,7 @@ BUILD_CFILES = \
elf32-aarch64.c elf64-aarch64.c \
elf32-ia64.c elf64-ia64.c \
elf32-riscv.c elf64-riscv.c \
- peigen.c pepigen.c pex64igen.c
+ peigen.c pepigen.c pex64igen.c pe-aarch64igen.c
CFILES = $(SOURCE_CFILES) $(BUILD_CFILES)
SOURCE_HFILES = \
@@ -1551,9 +1554,11 @@ distclean-compile:
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pei-mcore.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pei-sh.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pei-x86_64.Plo@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pei-aarch64.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/peigen.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pepigen.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pex64igen.Plo@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pe-aarch64igen.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/plugin.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/ppcboot.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/reloc.Plo@am__quote@
@@ -1991,6 +1996,11 @@ pepigen.c : peXXigen.c
pex64igen.c: peXXigen.c
echo "#line 1 \"peXXigen.c\"" > $@
$(SED) -e s/XX/pex64/g < $< >> $@
+
+pe-aarch64igen.c: peXXigen.c
+ echo "#line 1 \"peXXigen.c\"" > $@
+ $(SED) -e s/XX/peAArch64/g < $< >> $@
+
$(BFD32_LIBS) \
$(BFD64_LIBS) \
$(ALL_MACHINES) \
diff -rup binutils.orig/bfd/bfd.c binutils-2.37/bfd/bfd.c
--- binutils.orig/bfd/bfd.c 2021-12-01 13:35:33.821078167 +0000
+++ binutils-2.37/bfd/bfd.c 2021-12-01 13:35:43.139988261 +0000
@@ -1735,6 +1735,7 @@ bfd_get_sign_extend_vma (bfd *abfd)
|| strcmp (name, "pei-i386") == 0
|| strcmp (name, "pe-x86-64") == 0
|| strcmp (name, "pei-x86-64") == 0
+ || strcmp (name, "pei-aarch64-little") == 0
|| strcmp (name, "pe-arm-wince-little") == 0
|| strcmp (name, "pei-arm-wince-little") == 0
|| strcmp (name, "aixcoff-rs6000") == 0
Only in binutils-2.37/bfd: coff-aarch64.c
diff -rup binutils.orig/bfd/coffcode.h binutils-2.37/bfd/coffcode.h
--- binutils.orig/bfd/coffcode.h 2021-12-01 13:35:33.822078158 +0000
+++ binutils-2.37/bfd/coffcode.h 2021-12-01 13:35:43.140988251 +0000
@@ -2215,6 +2215,12 @@ coff_set_arch_mach_hook (bfd *abfd, void
}
break;
#endif
+#ifdef AARCH64MAGIC
+ case AARCH64MAGIC:
+ arch = bfd_arch_aarch64;
+ machine = internal_f->f_flags & F_AARCH64_ARCHITECTURE_MASK;
+ break;
+#endif
#ifdef Z80MAGIC
case Z80MAGIC:
arch = bfd_arch_z80;
@@ -2771,6 +2777,12 @@ coff_set_flags (bfd * abfd,
return true;
#endif
+#ifdef AARCH64MAGIC
+ case bfd_arch_aarch64:
+ * magicp = AARCH64MAGIC;
+ return true;
+#endif
+
#ifdef ARMMAGIC
case bfd_arch_arm:
#ifdef ARM_WINCE
@@ -3866,7 +3878,7 @@ coff_write_object_contents (bfd * abfd)
internal_f.f_flags |= IMAGE_FILE_LARGE_ADDRESS_AWARE;
#endif
-#ifndef COFF_WITH_pex64
+#if !defined(COFF_WITH_pex64) && !defined(COFF_WITH_peAArch64)
#ifdef COFF_WITH_PE
internal_f.f_flags |= IMAGE_FILE_32BIT_MACHINE;
#else
@@ -3914,6 +3926,11 @@ coff_write_object_contents (bfd * abfd)
#define __A_MAGIC_SET__
internal_a.magic = ZMAGIC;
#endif
+
+#if defined(AARCH64)
+#define __A_MAGIC_SET__
+ internal_a.magic = ZMAGIC;
+#endif
#if defined MCORE_PE
#define __A_MAGIC_SET__
diff -rup binutils.orig/bfd/config.bfd binutils-2.37/bfd/config.bfd
--- binutils.orig/bfd/config.bfd 2021-12-01 13:35:33.833078051 +0000
+++ binutils-2.37/bfd/config.bfd 2021-12-01 13:35:43.140988251 +0000
@@ -232,7 +232,7 @@ case "${targ}" in
;;
aarch64-*-elf | aarch64-*-rtems* | aarch64-*-genode*)
targ_defvec=aarch64_elf64_le_vec
- targ_selvecs="aarch64_elf64_be_vec aarch64_elf32_le_vec aarch64_elf32_be_vec arm_elf32_le_vec arm_elf32_be_vec"
+ targ_selvecs="aarch64_elf64_be_vec aarch64_elf32_le_vec aarch64_elf32_be_vec arm_elf32_le_vec arm_elf32_be_vec aarch64_pei_vec"
want64=true
;;
aarch64_be-*-elf)
@@ -257,7 +257,7 @@ case "${targ}" in
;;
aarch64-*-linux* | aarch64-*-netbsd*)
targ_defvec=aarch64_elf64_le_vec
- targ_selvecs="aarch64_elf64_be_vec aarch64_elf32_le_vec aarch64_elf32_be_vec arm_elf32_le_vec arm_elf32_be_vec"
+ targ_selvecs="aarch64_elf64_be_vec aarch64_elf32_le_vec aarch64_elf32_be_vec arm_elf32_le_vec arm_elf32_be_vec aarch64_pei_vec"
want64=true
;;
aarch64_be-*-linux* | aarch64_be-*-netbsd*)
diff -rup binutils.orig/bfd/configure binutils-2.37/bfd/configure
--- binutils.orig/bfd/configure 2021-12-01 13:35:33.817078206 +0000
+++ binutils-2.37/bfd/configure 2021-12-01 13:35:43.141988241 +0000
@@ -13283,6 +13283,7 @@ do
aarch64_elf64_le_vec) tb="$tb elf64-aarch64.lo elfxx-aarch64.lo elf-ifunc.lo elf64.lo $elf"; target_size=64 ;;
aarch64_elf64_le_cloudabi_vec) tb="$tb elf64-aarch64.lo elfxx-aarch64.lo elf-ifunc.lo elf64.lo $elf"; target_size=64 ;;
aarch64_mach_o_vec) tb="$tb mach-o-aarch64.lo"; target_size=64 ;;
+ aarch64_pei_vec) tb="$tb pei-aarch64.lo pe-aarch64igen.lo $coff"; target_size=64 ;;
alpha_ecoff_le_vec) tb="$tb coff-alpha.lo ecoff.lo $ecoff"; target_size=64 ;;
alpha_elf64_vec) tb="$tb elf64-alpha.lo elf64.lo $elf"; target_size=64 ;;
alpha_elf64_fbsd_vec) tb="$tb elf64-alpha.lo elf64.lo $elf"; target_size=64 ;;
diff -rup binutils.orig/bfd/configure.ac binutils-2.37/bfd/configure.ac
--- binutils.orig/bfd/configure.ac 2021-12-01 13:35:33.829078090 +0000
+++ binutils-2.37/bfd/configure.ac 2021-12-01 13:35:43.141988241 +0000
@@ -439,6 +439,7 @@ do
aarch64_elf64_le_vec) tb="$tb elf64-aarch64.lo elfxx-aarch64.lo elf-ifunc.lo elf64.lo $elf"; target_size=64 ;;
aarch64_elf64_le_cloudabi_vec) tb="$tb elf64-aarch64.lo elfxx-aarch64.lo elf-ifunc.lo elf64.lo $elf"; target_size=64 ;;
aarch64_mach_o_vec) tb="$tb mach-o-aarch64.lo"; target_size=64 ;;
+ aarch64_pei_vec) tb="$tb pei-aarch64.lo pe-aarch64igen.lo $coff"; target_size=64 ;;
alpha_ecoff_le_vec) tb="$tb coff-alpha.lo ecoff.lo $ecoff"; target_size=64 ;;
alpha_elf64_vec) tb="$tb elf64-alpha.lo elf64.lo $elf"; target_size=64 ;;
alpha_elf64_fbsd_vec) tb="$tb elf64-alpha.lo elf64.lo $elf"; target_size=64 ;;
diff -rup binutils.orig/bfd/libpei.h binutils-2.37/bfd/libpei.h
--- binutils.orig/bfd/libpei.h 2021-12-01 13:35:33.830078081 +0000
+++ binutils-2.37/bfd/libpei.h 2021-12-01 13:35:43.141988241 +0000
@@ -275,6 +275,41 @@
#define _bfd_XXi_write_codeview_record _bfd_pepi_write_codeview_record
#define _bfd_XXi_slurp_codeview_record _bfd_pepi_slurp_codeview_record
+#elif defined COFF_WITH_peAArch64
+
+#define GET_OPTHDR_IMAGE_BASE H_GET_64
+#define PUT_OPTHDR_IMAGE_BASE H_PUT_64
+#define GET_OPTHDR_SIZE_OF_STACK_RESERVE H_GET_64
+#define PUT_OPTHDR_SIZE_OF_STACK_RESERVE H_PUT_64
+#define GET_OPTHDR_SIZE_OF_STACK_COMMIT H_GET_64
+#define PUT_OPTHDR_SIZE_OF_STACK_COMMIT H_PUT_64
+#define GET_OPTHDR_SIZE_OF_HEAP_RESERVE H_GET_64
+#define PUT_OPTHDR_SIZE_OF_HEAP_RESERVE H_PUT_64
+#define GET_OPTHDR_SIZE_OF_HEAP_COMMIT H_GET_64
+#define PUT_OPTHDR_SIZE_OF_HEAP_COMMIT H_PUT_64
+#define GET_PDATA_ENTRY bfd_get_32
+
+#define _bfd_XX_bfd_copy_private_bfd_data_common _bfd_peAArch64_bfd_copy_private_bfd_data_common
+#define _bfd_XX_bfd_copy_private_section_data _bfd_peAArch64_bfd_copy_private_section_data
+#define _bfd_XX_get_symbol_info _bfd_peAArch64_get_symbol_info
+#define _bfd_XX_only_swap_filehdr_out _bfd_peAArch64_only_swap_filehdr_out
+#define _bfd_XX_print_private_bfd_data_common _bfd_peAArch64_print_private_bfd_data_common
+#define _bfd_XXi_final_link_postscript _bfd_peAArch64i_final_link_postscript
+#define _bfd_XXi_only_swap_filehdr_out _bfd_peAArch64i_only_swap_filehdr_out
+#define _bfd_XXi_swap_aouthdr_in _bfd_peAArch64i_swap_aouthdr_in
+#define _bfd_XXi_swap_aouthdr_out _bfd_peAArch64i_swap_aouthdr_out
+#define _bfd_XXi_swap_aux_in _bfd_peAArch64i_swap_aux_in
+#define _bfd_XXi_swap_aux_out _bfd_peAArch64i_swap_aux_out
+#define _bfd_XXi_swap_lineno_in _bfd_peAArch64i_swap_lineno_in
+#define _bfd_XXi_swap_lineno_out _bfd_peAArch64i_swap_lineno_out
+#define _bfd_XXi_swap_scnhdr_out _bfd_peAArch64i_swap_scnhdr_out
+#define _bfd_XXi_swap_sym_in _bfd_peAArch64i_swap_sym_in
+#define _bfd_XXi_swap_sym_out _bfd_peAArch64i_swap_sym_out
+#define _bfd_XXi_swap_debugdir_in _bfd_peAArch64i_swap_debugdir_in
+#define _bfd_XXi_swap_debugdir_out _bfd_peAArch64i_swap_debugdir_out
+#define _bfd_XXi_write_codeview_record _bfd_peAArch64i_write_codeview_record
+#define _bfd_XXi_slurp_codeview_record _bfd_peAArch64i_slurp_codeview_record
+
#else /* !COFF_WITH_pep */
#define GET_OPTHDR_IMAGE_BASE H_GET_32
@@ -369,5 +404,6 @@ bool _bfd_XX_bfd_copy_private_section_da
bool _bfd_pe_print_ce_compressed_pdata (bfd *, void *);
bool _bfd_pe64_print_ce_compressed_pdata (bfd *, void *);
bool _bfd_pex64_print_ce_compressed_pdata (bfd *, void *);
+bool _bfd_peAArch64_print_ce_compressed_pdata (bfd *, void *);
bool _bfd_pep_print_ce_compressed_pdata (bfd *, void *);
diff -rup binutils.orig/bfd/peXXigen.c binutils-2.37/bfd/peXXigen.c
--- binutils.orig/bfd/peXXigen.c 2021-12-01 13:35:33.827078110 +0000
+++ binutils-2.37/bfd/peXXigen.c 2021-12-01 13:35:43.142988232 +0000
@@ -60,8 +60,9 @@
on this code has a chance of getting something accomplished without
wasting too much time. */
-/* This expands into COFF_WITH_pe, COFF_WITH_pep, or COFF_WITH_pex64
- depending on whether we're compiling for straight PE or PE+. */
+/* This expands into COFF_WITH_pe, COFF_WITH_pep, COFF_WITH_pex64 or
+ COFF_WITH_peAArch64 depending on whether we're compiling for straight
+ PE or PE+. */
#define COFF_WITH_XX
#include "sysdep.h"
@@ -83,6 +84,8 @@
# include "coff/x86_64.h"
#elif defined COFF_WITH_pep
# include "coff/ia64.h"
+#elif defined COFF_WITH_peAArch64
+# include "coff/aarch64.h"
#else
# include "coff/i386.h"
#endif
@@ -92,7 +95,7 @@
#include "libpei.h"
#include "safe-ctype.h"
-#if defined COFF_WITH_pep || defined COFF_WITH_pex64
+#if defined COFF_WITH_pep || defined COFF_WITH_pex64 || defined COFF_WITH_peAArch64
# undef AOUTSZ
# define AOUTSZ PEPAOUTSZ
# define PEAOUTHDR PEPAOUTHDR
@@ -469,7 +472,7 @@ _bfd_XXi_swap_aouthdr_in (bfd * abfd,
aouthdr_int->text_start =
GET_AOUTHDR_TEXT_START (abfd, aouthdr_ext->text_start);
-#if !defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64)
+#if !defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64) && !defined(COFF_WITH_peAArch64)
/* PE32+ does not have data_start member! */
aouthdr_int->data_start =
GET_AOUTHDR_DATA_START (abfd, aouthdr_ext->data_start);
@@ -555,7 +558,7 @@ _bfd_XXi_swap_aouthdr_in (bfd * abfd,
if (aouthdr_int->entry)
{
aouthdr_int->entry += a->ImageBase;
-#if !defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64)
+#if !defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64) && !defined(COFF_WITH_peAArch64)
aouthdr_int->entry &= 0xffffffff;
#endif
}
@@ -563,12 +566,12 @@ _bfd_XXi_swap_aouthdr_in (bfd * abfd,
if (aouthdr_int->tsize)
{
aouthdr_int->text_start += a->ImageBase;
-#if !defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64)
+#if !defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64) && !defined(COFF_WITH_peAArch64)
aouthdr_int->text_start &= 0xffffffff;
#endif
}
-#if !defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64)
+#if !defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64) && !defined(COFF_WITH_peAArch64)
/* PE32+ does not have data_start member! */
if (aouthdr_int->dsize)
{
@@ -628,7 +631,7 @@ _bfd_XXi_swap_aouthdr_out (bfd * abfd, v
if (aouthdr_in->tsize)
{
aouthdr_in->text_start -= ib;
-#if !defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64)
+#if !defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64) && !defined(COFF_WITH_peAArch64)
aouthdr_in->text_start &= 0xffffffff;
#endif
}
@@ -636,7 +639,7 @@ _bfd_XXi_swap_aouthdr_out (bfd * abfd, v
if (aouthdr_in->dsize)
{
aouthdr_in->data_start -= ib;
-#if !defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64)
+#if !defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64) && !defined(COFF_WITH_peAArch64)
aouthdr_in->data_start &= 0xffffffff;
#endif
}
@@ -644,7 +647,7 @@ _bfd_XXi_swap_aouthdr_out (bfd * abfd, v
if (aouthdr_in->entry)
{
aouthdr_in->entry -= ib;
-#if !defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64)
+#if !defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64) && !defined(COFF_WITH_peAArch64)
aouthdr_in->entry &= 0xffffffff;
#endif
}
@@ -748,7 +751,7 @@ _bfd_XXi_swap_aouthdr_out (bfd * abfd, v
PUT_AOUTHDR_TEXT_START (abfd, aouthdr_in->text_start,
aouthdr_out->standard.text_start);
-#if !defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64)
+#if !defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64) && !defined(COFF_WITH_peAArch64)
/* PE32+ does not have data_start member! */
PUT_AOUTHDR_DATA_START (abfd, aouthdr_in->data_start,
aouthdr_out->standard.data_start);
@@ -1800,7 +1803,7 @@ pe_print_edata (bfd * abfd, void * vfile
static bool
pe_print_pdata (bfd * abfd, void * vfile)
{
-#if defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64)
+#if defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64) && !defined(COFF_WITH_peAArch64)
# define PDATA_ROW_SIZE (3 * 8)
#else
# define PDATA_ROW_SIZE (5 * 4)
@@ -1827,7 +1830,7 @@ pe_print_pdata (bfd * abfd, void * vfile
fprintf (file,
_("\nThe Function Table (interpreted .pdata section contents)\n"));
-#if defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64)
+#if defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64) && !defined(COFF_WITH_peAArch64)
fprintf (file,
_(" vma:\t\t\tBegin Address End Address Unwind Info\n"));
#else
@@ -1864,7 +1867,7 @@ pe_print_pdata (bfd * abfd, void * vfile
bfd_vma eh_handler;
bfd_vma eh_data;
bfd_vma prolog_end_addr;
-#if !defined(COFF_WITH_pep) || defined(COFF_WITH_pex64)
+#if !defined(COFF_WITH_pep) || defined(COFF_WITH_pex64) || defined(COFF_WITH_peAArch64)
int em_data;
#endif
@@ -1882,7 +1885,7 @@ pe_print_pdata (bfd * abfd, void * vfile
/* We are probably into the padding of the section now. */
break;
-#if !defined(COFF_WITH_pep) || defined(COFF_WITH_pex64)
+#if !defined(COFF_WITH_pep) || defined(COFF_WITH_pex64) || defined(COFF_WITH_peAArch64)
em_data = ((eh_handler & 0x1) << 2) | (prolog_end_addr & 0x3);
#endif
eh_handler &= ~(bfd_vma) 0x3;
@@ -1893,7 +1896,7 @@ pe_print_pdata (bfd * abfd, void * vfile
bfd_fprintf_vma (abfd, file, begin_addr); fputc (' ', file);
bfd_fprintf_vma (abfd, file, end_addr); fputc (' ', file);
bfd_fprintf_vma (abfd, file, eh_handler);
-#if !defined(COFF_WITH_pep) || defined(COFF_WITH_pex64)
+#if !defined(COFF_WITH_pep) || defined(COFF_WITH_pex64) || defined(COFF_WITH_peAArch64)
fputc (' ', file);
bfd_fprintf_vma (abfd, file, eh_data); fputc (' ', file);
bfd_fprintf_vma (abfd, file, prolog_end_addr);
@@ -2784,7 +2787,7 @@ _bfd_XX_print_private_bfd_data_common (b
bfd_fprintf_vma (abfd, file, i->AddressOfEntryPoint);
fprintf (file, "\nBaseOfCode\t\t");
bfd_fprintf_vma (abfd, file, i->BaseOfCode);
-#if !defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64)
+#if !defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64) && !defined(COFF_WITH_peAArch64)
/* PE32+ does not have BaseOfData member! */
fprintf (file, "\nBaseOfData\t\t");
bfd_fprintf_vma (abfd, file, i->BaseOfData);
@@ -3085,7 +3088,7 @@ _bfd_XX_get_symbol_info (bfd * abfd, asy
coff_get_symbol_info (abfd, symbol, ret);
}
-#if !defined(COFF_WITH_pep) && defined(COFF_WITH_pex64)
+#if !defined(COFF_WITH_pep) && defined(COFF_WITH_pex64) && defined(COFF_WITH_peAArch64)
static int
sort_x64_pdata (const void *l, const void *r)
{
@@ -4504,7 +4507,7 @@ _bfd_XXi_final_link_postscript (bfd * ab
the TLS data directory consists of 4 pointers, followed
by two 4-byte integer. This implies that the total size
is different for 32-bit and 64-bit executables. */
-#if !defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64)
+#if !defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64) && !defined(COFF_WITH_peAArch64)
pe_data (abfd)->pe_opthdr.DataDirectory[PE_TLS_TABLE].Size = 0x18;
#else
pe_data (abfd)->pe_opthdr.DataDirectory[PE_TLS_TABLE].Size = 0x28;
@@ -4513,7 +4516,7 @@ _bfd_XXi_final_link_postscript (bfd * ab
/* If there is a .pdata section and we have linked pdata finally, we
need to sort the entries ascending. */
-#if !defined(COFF_WITH_pep) && defined(COFF_WITH_pex64)
+#if !defined(COFF_WITH_pep) && defined(COFF_WITH_pex64) && defined(COFF_WITH_peAArch64)
{
asection *sec = bfd_get_section_by_name (abfd, ".pdata");
Only in binutils-2.37/bfd: pei-aarch64.c
diff -rup binutils.orig/bfd/peicode.h binutils-2.37/bfd/peicode.h
--- binutils.orig/bfd/peicode.h 2021-12-01 13:35:33.829078090 +0000
+++ binutils-2.37/bfd/peicode.h 2021-12-01 13:35:43.142988232 +0000
@@ -231,7 +231,7 @@ coff_swap_scnhdr_in (bfd * abfd, void *
{
scnhdr_int->s_vaddr += pe_data (abfd)->pe_opthdr.ImageBase;
/* Do not cut upper 32-bits for 64-bit vma. */
-#ifndef COFF_WITH_pex64
+#if !defined(COFF_WITH_pex64) && !defined(COFF_WITH_peAArch64)
scnhdr_int->s_vaddr &= 0xffffffff;
#endif
}
@@ -738,6 +738,16 @@ static const jump_table jtab[] =
},
#endif
+#ifdef AARCH64MAGIC
+/* We don't currently support jumping to DLLs, so if
+ someone does try emit a runtime trap. Through UDF #0. */
+ { AARCH64MAGIC,
+ { 0x00, 0x00, 0x00, 0x00 },
+ 4, 0
+ },
+
+#endif
+
#ifdef ARMPEMAGIC
{ ARMPEMAGIC,
{ 0x00, 0xc0, 0x9f, 0xe5, 0x00, 0xf0,
@@ -910,7 +920,7 @@ pe_ILF_build_a_bfd (bfd * abfd,
/* See PR 20907 for a reproducer. */
goto error_return;
-#ifdef COFF_WITH_pex64
+#if defined(COFF_WITH_pex64) || defined(COFF_WITH_peAArch64)
((unsigned int *) id4->contents)[0] = ordinal;
((unsigned int *) id4->contents)[1] = 0x80000000;
((unsigned int *) id5->contents)[0] = ordinal;
@@ -1206,6 +1216,12 @@ pe_ILF_object_p (bfd * abfd)
#endif
break;
+ case IMAGE_FILE_MACHINE_ARM64:
+#ifdef AARCH64MAGIC
+ magic = AARCH64MAGIC;
+#endif
+ break;
+
case IMAGE_FILE_MACHINE_THUMB:
#ifdef THUMBPEMAGIC
{
diff -rup binutils.orig/bfd/targets.c binutils-2.37/bfd/targets.c
--- binutils.orig/bfd/targets.c 2021-12-01 13:35:33.829078090 +0000
+++ binutils-2.37/bfd/targets.c 2021-12-01 13:35:43.142988232 +0000
@@ -679,6 +679,7 @@ extern const bfd_target aarch64_elf64_be
extern const bfd_target aarch64_elf64_le_vec;
extern const bfd_target aarch64_elf64_le_cloudabi_vec;
extern const bfd_target aarch64_mach_o_vec;
+extern const bfd_target aarch64_pei_vec;
extern const bfd_target alpha_ecoff_le_vec;
extern const bfd_target alpha_elf64_vec;
extern const bfd_target alpha_elf64_fbsd_vec;
@@ -991,6 +992,7 @@ static const bfd_target * const _bfd_tar
&aarch64_elf64_le_vec,
&aarch64_elf64_le_cloudabi_vec,
&aarch64_mach_o_vec,
+ &aarch64_pei_vec,
#endif
#ifdef BFD64
diff -rup binutils.orig/binutils/NEWS binutils-2.37/binutils/NEWS
--- binutils.orig/binutils/NEWS 2021-12-01 13:35:33.320083001 +0000
+++ binutils-2.37/binutils/NEWS 2021-12-01 13:35:43.142988232 +0000
@@ -9,6 +9,9 @@
using --unicode=highlight will display them as unicode escape sequences
highlighted in red (if supported by the output device).
+* Support for efi-app-aarch64, efi-rtdrv-aarch64 and efi-bsdrv-aarch64 has been
+ added to objcopy in order to enable UEFI development using binutils.
+
Changes in 2.37:
* The readelf tool has a new command line option which can be used to specify
Only in binutils.orig/binutils: NEWS.orig
Only in binutils.orig/binutils: NEWS.rej
Only in binutils.orig/binutils: nm.c.orig
diff -rup binutils.orig/binutils/objcopy.c binutils-2.37/binutils/objcopy.c
--- binutils.orig/binutils/objcopy.c 2021-12-01 13:35:33.302083174 +0000
+++ binutils-2.37/binutils/objcopy.c 2021-12-01 13:35:43.143988222 +0000
@@ -4987,6 +4987,13 @@ convert_efi_target (char *efi)
/* Change x86_64 to x86-64. */
efi[7] = '-';
}
+ else if (strcmp (efi + 4, "aarch64") == 0)
+ {
+ /* Change aarch64 to aarch64-little. */
+ efi = (char *) xrealloc (efi, strlen (efi) + 7);
+ char *t = "aarch64-little";
+ strcpy (efi + 4, t);
+ }
}
/* Allocate and return a pointer to a struct section_add, initializing the
Only in binutils.orig/binutils: objdump.c.orig
Only in binutils.orig/binutils: objdump.c.rej
Only in binutils.orig/binutils: readelf.c.orig
Only in binutils-2.37/binutils/testsuite/binutils-all/aarch64: pei-aarch64-little.d
Only in binutils-2.37/binutils/testsuite/binutils-all/aarch64: pei-aarch64-little.s
Only in binutils-2.37/include/coff: aarch64.h
diff -rup binutils.orig/include/coff/pe.h binutils-2.37/include/coff/pe.h
--- binutils.orig/include/coff/pe.h 2021-12-01 13:35:33.251083666 +0000
+++ binutils-2.37/include/coff/pe.h 2021-12-01 13:35:43.143988222 +0000
@@ -137,6 +137,7 @@
#define IMAGE_FILE_MACHINE_AM33 0x01d3
#define IMAGE_FILE_MACHINE_AMD64 0x8664
#define IMAGE_FILE_MACHINE_ARM 0x01c0
+#define IMAGE_FILE_MACHINE_ARM64 0xaa64
#define IMAGE_FILE_MACHINE_AXP64 IMAGE_FILE_MACHINE_ALPHA64
#define IMAGE_FILE_MACHINE_CEE 0xc0ee
#define IMAGE_FILE_MACHINE_CEF 0x0cef
--- /dev/null 2021-12-01 09:13:46.241760896 +0000
+++ binutils-2.37/include/coff/aarch64.h 2021-12-01 13:35:43.143988222 +0000
@@ -0,0 +1,63 @@
+/* AArch64 COFF support for BFD.
+ Copyright (C) 2021 Free Software Foundation, Inc.
+
+ This file is part of BFD, the Binary File Descriptor library.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software Foundation,
+ Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
+
+#define COFFAARCH64 1
+
+#define L_LNNO_SIZE 2
+#define INCLUDE_COMDAT_FIELDS_IN_AUXENT
+#include "coff/external.h"
+
+#define F_AARCH64_ARCHITECTURE_MASK (0x4000)
+
+#define AARCH64MAGIC 0xaa64 /* From Microsoft specification. */
+
+#undef BADMAG
+#define BADMAG(x) ((x).f_magic != AARCH64MAGIC)
+#define AARCH64 1 /* Customize coffcode.h. */
+
+#define IMAGE_NT_OPTIONAL_HDR64_MAGIC 0x20b
+
+#define OMAGIC 0404 /* Object files, eg as output. */
+#define ZMAGIC IMAGE_NT_OPTIONAL_HDR64_MAGIC /* Demand load format, eg normal ld output 0x10b. */
+#define STMAGIC 0401 /* Target shlib. */
+#define SHMAGIC 0443 /* Host shlib. */
+
+/* define some NT default values */
+/* #define NT_IMAGE_BASE 0x400000 moved to internal.h */
+#define NT_SECTION_ALIGNMENT 0x1000
+#define NT_FILE_ALIGNMENT 0x200
+#define NT_DEF_RESERVE 0x100000
+#define NT_DEF_COMMIT 0x1000
+
+/* We use the .rdata section to hold read only data. */
+#define _LIT ".rdata"
+
+/********************** RELOCATION DIRECTIVES **********************/
+struct external_reloc
+{
+ char r_vaddr[4];
+ char r_symndx[4];
+ char r_type[2];
+ char r_offset[4];
+};
+
+#define RELOC struct external_reloc
+#define RELSZ 14
+
+#define ARM_NOTE_SECTION ".note"
--- /dev/null 2021-12-01 09:13:46.241760896 +0000
+++ binutils-2.37/bfd/coff-aarch64.c 2021-12-01 13:35:43.139988261 +0000
@@ -0,0 +1,166 @@
+/* BFD back-end for AArch64 COFF files.
+ Copyright (C) 2021 Free Software Foundation, Inc.
+
+ This file is part of BFD, the Binary File Descriptor library.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+ MA 02110-1301, USA. */
+
+
+#ifndef COFF_WITH_peAArch64
+#define COFF_WITH_peAArch64
+#endif
+
+/* Note we have to make sure not to include headers twice.
+ Not all headers are wrapped in #ifdef guards, so we define
+ PEI_HEADERS to prevent double including here. */
+#ifndef PEI_HEADERS
+#include "sysdep.h"
+#include "bfd.h"
+#include "libbfd.h"
+#include "coff/aarch64.h"
+#include "coff/internal.h"
+#include "coff/pe.h"
+#include "libcoff.h"
+#include "libiberty.h"
+#endif
+
+#include "libcoff.h"
+
+/* The page size is a guess based on ELF. */
+
+#define COFF_PAGE_SIZE 0x1000
+
+/* All users of this file have bfd_octets_per_byte (abfd, sec) == 1. */
+#define OCTETS_PER_BYTE(ABFD, SEC) 1
+
+#ifndef PCRELOFFSET
+#define PCRELOFFSET true
+#endif
+
+/* Currently we don't handle any relocations. */
+static reloc_howto_type pe_aarch64_std_reloc_howto[] =
+ {
+
+ };
+
+#define COFF_DEFAULT_SECTION_ALIGNMENT_POWER 2
+#define COFF_PAGE_SIZE 0x1000
+
+#ifndef NUM_ELEM
+#define NUM_ELEM(a) ((sizeof (a)) / sizeof ((a)[0]))
+#endif
+
+#define NUM_RELOCS NUM_ELEM (pe_aarch64_std_reloc_howto)
+
+#define RTYPE2HOWTO(cache_ptr, dst) \
+ (cache_ptr)->howto = NULL
+
+#ifndef bfd_pe_print_pdata
+#define bfd_pe_print_pdata NULL
+#endif
+
+/* Return TRUE if this relocation should
+ appear in the output .reloc section. */
+
+static bool
+in_reloc_p (bfd * abfd ATTRIBUTE_UNUSED,
+ reloc_howto_type * howto)
+{
+ return !howto->pc_relative;
+}
+
+#include "coffcode.h"
+
+/* Target vectors. */
+const bfd_target
+#ifdef TARGET_SYM
+ TARGET_SYM =
+#else
+ aarch64_pei_vec =
+#endif
+{
+#ifdef TARGET_NAME
+ TARGET_NAME,
+#else
+ "pei-aarch64-little", /* Name. */
+#endif
+ bfd_target_coff_flavour,
+ BFD_ENDIAN_LITTLE, /* Data byte order is little. */
+ BFD_ENDIAN_LITTLE, /* Header byte order is little. */
+
+ (HAS_RELOC | EXEC_P /* Object flags. */
+ | HAS_LINENO | HAS_DEBUG
+ | HAS_SYMS | HAS_LOCALS | WP_TEXT | D_PAGED | BFD_COMPRESS | BFD_DECOMPRESS),
+
+ (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC /* Section flags. */
+#if defined(COFF_WITH_PE)
+ | SEC_LINK_ONCE | SEC_LINK_DUPLICATES | SEC_READONLY | SEC_DEBUGGING
+#endif
+ | SEC_CODE | SEC_DATA | SEC_EXCLUDE ),
+
+#ifdef TARGET_UNDERSCORE
+ TARGET_UNDERSCORE, /* Leading underscore. */
+#else
+ 0, /* Leading underscore. */
+#endif
+ '/', /* Ar_pad_char. */
+ 15, /* Ar_max_namelen. */
+ 0, /* match priority. */
+ TARGET_KEEP_UNUSED_SECTION_SYMBOLS, /* keep unused section symbols. */
+
+ /* Data conversion functions. */
+ bfd_getl64, bfd_getl_signed_64, bfd_putl64,
+ bfd_getl32, bfd_getl_signed_32, bfd_putl32,
+ bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* Data. */
+ /* Header conversion functions. */
+ bfd_getl64, bfd_getl_signed_64, bfd_putl64,
+ bfd_getl32, bfd_getl_signed_32, bfd_putl32,
+ bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* Hdrs. */
+
+ /* Note that we allow an object file to be treated as a core file as well. */
+ { /* bfd_check_format. */
+ _bfd_dummy_target,
+ coff_object_p,
+ bfd_generic_archive_p,
+ coff_object_p
+ },
+ { /* bfd_set_format. */
+ _bfd_bool_bfd_false_error,
+ coff_mkobject,
+ _bfd_generic_mkarchive,
+ _bfd_bool_bfd_false_error
+ },
+ { /* bfd_write_contents. */
+ _bfd_bool_bfd_false_error,
+ coff_write_object_contents,
+ _bfd_write_archive_contents,
+ _bfd_bool_bfd_false_error
+ },
+
+ BFD_JUMP_TABLE_GENERIC (coff),
+ BFD_JUMP_TABLE_COPY (coff),
+ BFD_JUMP_TABLE_CORE (_bfd_nocore),
+ BFD_JUMP_TABLE_ARCHIVE (_bfd_archive_coff),
+ BFD_JUMP_TABLE_SYMBOLS (coff),
+ BFD_JUMP_TABLE_RELOCS (coff),
+ BFD_JUMP_TABLE_WRITE (coff),
+ BFD_JUMP_TABLE_LINK (coff),
+ BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic),
+
+ NULL,
+
+ COFF_SWAP_TABLE
+};
--- /dev/null 2021-12-01 09:13:46.241760896 +0000
+++ binutils-2.37/binutils/testsuite/binutils-all/aarch64/pei-aarch64-little.s 2021-12-01 13:35:43.143988222 +0000
@@ -0,0 +1,42 @@
+ .arch armv8-a
+ .text
+ .align 2
+ .global foo
+ .type foo, %function
+foo:
+.LFB0:
+ .cfi_startproc
+ sub sp, sp, #16
+ .cfi_def_cfa_offset 16
+ str w0, [sp, 12]
+ ldr w0, [sp, 12]
+ mul w0, w0, w0
+ add sp, sp, 16
+ .cfi_def_cfa_offset 0
+ ret
+ .cfi_endproc
+.LFE0:
+ .size foo, .-foo
+ .align 2
+ .global main
+ .type main, %function
+main:
+.LFB1:
+ .cfi_startproc
+ stp x29, x30, [sp, -16]!
+ .cfi_def_cfa_offset 16
+ .cfi_offset 29, -16
+ .cfi_offset 30, -8
+ mov x29, sp
+ mov w0, 5
+ bl foo
+ ldp x29, x30, [sp], 16
+ .cfi_restore 30
+ .cfi_restore 29
+ .cfi_def_cfa_offset 0
+ ret
+ .cfi_endproc
+.LFE1:
+ .size main, .-main
+ .ident "GCC: (fsf-trunk.2870) 12.0.0 20210930 (experimental)"
+ .section .note.GNU-stack,"",@progbits
--- /dev/null 2021-12-01 09:13:46.241760896 +0000
+++ binutils-2.37/binutils/testsuite/binutils-all/aarch64/pei-aarch64-little.d 2021-12-01 13:35:43.143988222 +0000
@@ -0,0 +1,16 @@
+#skip: aarch64_be-*-*
+#ld: -e0
+#PROG: objcopy
+#objcopy: -j .text -j .sdata -j .data -j .dynamic -j .dynsym -j .rel -j .rela -j .rel.* -j .rela.* -j .rel* -j .rela* -j .reloc --target=efi-app-aarch64
+#objdump: -h -f
+#name: Check if efi app format is recognized
+
+.*: file format pei-aarch64-little
+architecture: aarch64, flags 0x00000132:
+EXEC_P, HAS_SYMS, HAS_LOCALS, D_PAGED
+start address 0x0000000000000000
+
+Sections:
+Idx Name Size VMA LMA File off Algn
+ 0 \.text 00000030 0[^ ]+ 0[^ ]+ 0[^ ]+ 2\*\*2
+ CONTENTS, ALLOC, LOAD, READONLY, CODE
--- /dev/null 2021-11-30 07:48:35.901044247 +0000
+++ binutils-2.35.2/bfd/pei-aarch64.c 2021-11-30 13:38:37.255656936 +0000
@@ -0,0 +1,75 @@
+/* BFD back-end for AArch64 PE IMAGE COFF files.
+ Copyright (C) 2021 Free Software Foundation, Inc.
+
+ This file is part of BFD, the Binary File Descriptor library.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+ MA 02110-1301, USA. */
+
+#include "sysdep.h"
+#include "bfd.h"
+
+#define TARGET_SYM aarch64_pei_vec
+#define TARGET_NAME "pei-aarch64-little"
+#define TARGET_ARCHITECTURE bfd_arch_aarch64
+#define TARGET_PAGESIZE 4096
+#define TARGET_BIG_ENDIAN 0
+#define TARGET_ARCHIVE 0
+#define TARGET_PRIORITY 0
+
+#define COFF_IMAGE_WITH_PE
+/* Rename the above into.. */
+#define COFF_WITH_peAArch64
+#define COFF_WITH_PE
+#define PCRELOFFSET true
+
+/* Long section names not allowed in executable images, only object files. */
+#define COFF_LONG_SECTION_NAMES 0
+
+#define COFF_SECTION_ALIGNMENT_ENTRIES \
+{ COFF_SECTION_NAME_EXACT_MATCH (".bss"), \
+ COFF_ALIGNMENT_FIELD_EMPTY, COFF_ALIGNMENT_FIELD_EMPTY, 2 }, \
+{ COFF_SECTION_NAME_EXACT_MATCH (".data"), \
+ COFF_ALIGNMENT_FIELD_EMPTY, COFF_ALIGNMENT_FIELD_EMPTY, 2 }, \
+{ COFF_SECTION_NAME_EXACT_MATCH (".rdata"), \
+ COFF_ALIGNMENT_FIELD_EMPTY, COFF_ALIGNMENT_FIELD_EMPTY, 2 }, \
+{ COFF_SECTION_NAME_EXACT_MATCH (".text"), \
+ COFF_ALIGNMENT_FIELD_EMPTY, COFF_ALIGNMENT_FIELD_EMPTY, 2 }, \
+{ COFF_SECTION_NAME_PARTIAL_MATCH (".idata"), \
+ COFF_ALIGNMENT_FIELD_EMPTY, COFF_ALIGNMENT_FIELD_EMPTY, 2 }, \
+{ COFF_SECTION_NAME_EXACT_MATCH (".pdata"), \
+ COFF_ALIGNMENT_FIELD_EMPTY, COFF_ALIGNMENT_FIELD_EMPTY, 2 }, \
+{ COFF_SECTION_NAME_PARTIAL_MATCH (".debug"), \
+ COFF_ALIGNMENT_FIELD_EMPTY, COFF_ALIGNMENT_FIELD_EMPTY, 0 }, \
+{ COFF_SECTION_NAME_PARTIAL_MATCH (".gnu.linkonce.wi."), \
+ COFF_ALIGNMENT_FIELD_EMPTY, COFF_ALIGNMENT_FIELD_EMPTY, 0 }
+
+#define PEI_HEADERS
+#include "sysdep.h"
+#include "bfd.h"
+#include "libbfd.h"
+#include "coff/aarch64.h"
+#include "coff/internal.h"
+#include "coff/pe.h"
+#include "libcoff.h"
+#include "libpei.h"
+#include "libiberty.h"
+
+/* Make sure we're setting a 64-bit format. */
+#undef AOUTSZ
+#define AOUTSZ PEPAOUTSZ
+#define PEAOUTHDR PEPAOUTHDR
+
+#include "coff-aarch64.c"

20
binutils-CVE-2023-1972.patch Normal file
View File

@ -0,0 +1,20 @@
--- binutils.orig/bfd/elf.c 2023-04-17 16:26:08.720347439 +0100
+++ binutils-2.40/bfd/elf.c 2023-04-17 16:28:03.286317601 +0100
@@ -9050,6 +9050,8 @@ _bfd_elf_slurp_version_tables (bfd *abfd
bfd_set_error (bfd_error_file_too_big);
goto error_return_verdef;
}
+ if (amt == 0)
+ goto error_return_verdef;
elf_tdata (abfd)->verdef = (Elf_Internal_Verdef *) bfd_zalloc (abfd, amt);
if (elf_tdata (abfd)->verdef == NULL)
goto error_return_verdef;
@@ -9153,6 +9155,8 @@ _bfd_elf_slurp_version_tables (bfd *abfd
bfd_set_error (bfd_error_file_too_big);
goto error_return;
}
+ if (amt == 0)
+ goto error_return;
elf_tdata (abfd)->verdef = (Elf_Internal_Verdef *) bfd_zalloc (abfd, amt);
if (elf_tdata (abfd)->verdef == NULL)
goto error_return;

29
export-demangle.h-in-devel-package.patch → binutils-export-demangle.h.patch
View File

@ -1,17 +1,6 @@
From 85f7739c1c9cfcd143b4192204246f4fe5dafeed Mon Sep 17 00:00:00 2001 diff -rup binutils.orig/bfd/Makefile.am binutils-2.32/bfd/Makefile.am
From: openEuler Buildteam <buildteam@openeuler.org> --- binutils.orig/bfd/Makefile.am 2019-02-08 12:22:51.395684251 +0000
Date: Sat, 11 Jan 2020 13:34:40 +0800 +++ binutils-2.32/bfd/Makefile.am 2019-02-08 12:22:53.970664973 +0000
Subject: [PATCH] export demangle.h in devel package
---
bfd/Makefile.am | 2 +-
bfd/Makefile.in | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/bfd/Makefile.am b/bfd/Makefile.am
index 6a39ef5..ddc3b54 100644
--- a/bfd/Makefile.am
+++ b/bfd/Makefile.am
@@ -33,7 +33,7 @@ bfdlibdir = @bfdlibdir@ @@ -33,7 +33,7 @@ bfdlibdir = @bfdlibdir@
bfdincludedir = @bfdincludedir@ bfdincludedir = @bfdincludedir@
bfdlib_LTLIBRARIES = libbfd.la bfdlib_LTLIBRARIES = libbfd.la
@ -21,10 +10,9 @@ index 6a39ef5..ddc3b54 100644
else !INSTALL_LIBBFD else !INSTALL_LIBBFD
# Empty these so that the respective installation directories will not be created. # Empty these so that the respective installation directories will not be created.
bfdlibdir = bfdlibdir =
diff --git a/bfd/Makefile.in b/bfd/Makefile.in diff -rup binutils.orig/bfd/Makefile.in binutils-2.32/bfd/Makefile.in
index 80499d6..09a93b9 100644 --- binutils.orig/bfd/Makefile.in 2019-02-08 12:21:35.291254044 +0000
--- a/bfd/Makefile.in +++ binutils-2.32/bfd/Makefile.in 2019-02-08 12:22:10.163992947 +0000
+++ b/bfd/Makefile.in
@@ -249,7 +249,7 @@ am__can_run_installinfo = \ @@ -249,7 +249,7 @@ am__can_run_installinfo = \
esac esac
am__bfdinclude_HEADERS_DIST = $(INCDIR)/plugin-api.h bfd.h \ am__bfdinclude_HEADERS_DIST = $(INCDIR)/plugin-api.h bfd.h \
@ -34,7 +22,7 @@ index 80499d6..09a93b9 100644
HEADERS = $(bfdinclude_HEADERS) HEADERS = $(bfdinclude_HEADERS)
RECURSIVE_CLEAN_TARGETS = mostlyclean-recursive clean-recursive \ RECURSIVE_CLEAN_TARGETS = mostlyclean-recursive clean-recursive \
distclean-recursive maintainer-clean-recursive distclean-recursive maintainer-clean-recursive
@@ -468,7 +468,7 @@ libbfd_la_LDFLAGS = $(am__append_1) -release `cat libtool-soversion` \ @@ -468,7 +468,7 @@ libbfd_la_LDFLAGS = $(am__append_1) -rel
@INSTALL_LIBBFD_FALSE@bfdinclude_HEADERS = $(am__append_2) @INSTALL_LIBBFD_FALSE@bfdinclude_HEADERS = $(am__append_2)
@INSTALL_LIBBFD_TRUE@bfdinclude_HEADERS = $(BFD_H) \ @INSTALL_LIBBFD_TRUE@bfdinclude_HEADERS = $(BFD_H) \
@INSTALL_LIBBFD_TRUE@ $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \ @INSTALL_LIBBFD_TRUE@ $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
@ -43,6 +31,3 @@ index 80499d6..09a93b9 100644
@INSTALL_LIBBFD_TRUE@ $(INCDIR)/bfdlink.h $(am__append_2) @INSTALL_LIBBFD_TRUE@ $(INCDIR)/bfdlink.h $(am__append_2)
@INSTALL_LIBBFD_FALSE@rpath_bfdlibdir = @bfdlibdir@ @INSTALL_LIBBFD_FALSE@rpath_bfdlibdir = @bfdlibdir@
@INSTALL_LIBBFD_FALSE@noinst_LTLIBRARIES = libbfd.la @INSTALL_LIBBFD_FALSE@noinst_LTLIBRARIES = libbfd.la
--
1.8.3.1

330
binutils-fix-testsuite-failures.patch Normal file
View File

@ -0,0 +1,330 @@
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-10.d binutils-2.32/ld/testsuite/ld-plugin/plugin-10.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-10.d 2019-02-15 13:33:21.979627285 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-10.d 2019-02-15 13:40:26.911199033 +0000
@@ -34,5 +34,6 @@ hook called: claim_file tmpdir/libtext.a
hook called: all symbols read.
Sym: '_?func' Resolution: LDPR_PREVAILING_DEF
Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY
+#...
hook called: cleanup.
#...
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-13.d binutils-2.32/ld/testsuite/ld-plugin/plugin-13.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-13.d 2019-02-15 13:33:21.980627277 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-13.d 2019-02-15 13:41:30.189692800 +0000
@@ -23,5 +23,3 @@ hook called: claim_file tmpdir/main.o \[
hook called: claim_file .*/ld/testsuite/ld-plugin/func.c \[@0/.* CLAIMED
hook called: claim_file tmpdir/text.o \[@0/.* not claimed
#...
-.*main.c.*: undefined reference to `\.?func'
-#...
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-14.d binutils-2.32/ld/testsuite/ld-plugin/plugin-14.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-14.d 2019-02-15 13:33:21.977627301 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-14.d 2019-02-15 13:42:03.598430960 +0000
@@ -27,7 +27,6 @@ hook called: claim_file .*/ld/testsuite/
hook called: claim_file tmpdir/text.o \[@0/.* not claimed
#...
hook called: all symbols read.
-.*: tmpdir/main.o: in function `main':
-.*main.c.*: undefined reference to `\.?func'
+#...
hook called: cleanup.
#...
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-15.d binutils-2.32/ld/testsuite/ld-plugin/plugin-15.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-15.d 2019-02-15 13:33:21.980627277 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-15.d 2019-02-15 13:42:28.014239600 +0000
@@ -28,7 +28,6 @@ hook called: claim_file .*/ld/testsuite/
hook called: claim_file tmpdir/text.o \[@0/.* not claimed
#...
hook called: all symbols read.
-.*: tmpdir/main.o: in function `main':
-.*main.c.*: undefined reference to `\.?func'
+#...
hook called: cleanup.
#...
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-16.d binutils-2.32/ld/testsuite/ld-plugin/plugin-16.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-16.d 2019-02-15 13:33:21.977627301 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-16.d 2019-02-15 13:43:21.309821910 +0000
@@ -30,9 +30,8 @@ hook called: claim_file .*/ld/testsuite/
hook called: claim_file tmpdir/text.o \[@0/.* not claimed
#...
hook called: all symbols read.
-Sym: '_?func' Resolution: LDPR_PREVAILING_DEF
+Sym: '_?func' Resolution: LDPR_PREVAILING_DEF_IRONLY
Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY
-.*: tmpdir/main.o: in function `main':
-.*main.c.*: undefined reference to `\.?func'
+#...
hook called: cleanup.
#...
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-17.d binutils-2.32/ld/testsuite/ld-plugin/plugin-17.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-17.d 2019-02-15 13:33:21.977627301 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-17.d 2019-02-15 13:43:54.925558451 +0000
@@ -31,7 +31,8 @@ hook called: claim_file .*/ld/testsuite/
hook called: claim_file tmpdir/text.o \[@0/.* not claimed
#...
hook called: all symbols read.
-Sym: '_?func' Resolution: LDPR_PREVAILING_DEF
+Sym: '_?func' Resolution: LDPR_PREVAILING_DEF_IRONLY
Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY
+#...
hook called: cleanup.
#...
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-20.d binutils-2.32/ld/testsuite/ld-plugin/plugin-20.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-20.d 2019-02-15 13:33:21.980627277 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-20.d 2019-02-15 13:49:20.091010016 +0000
@@ -2,6 +2,5 @@ hook called: all symbols read.
Input: func.c \(tmpdir/libfunc.a\)
Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.*
Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.*
-.*: tmpdir/main.o: in function `main':
-.*main.c.*: undefined reference to `\.?func'
+#...
hook called: cleanup.
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-21.d binutils-2.32/ld/testsuite/ld-plugin/plugin-21.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-21.d 2019-02-15 13:33:21.978627293 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-21.d 2019-02-15 13:49:34.506897033 +0000
@@ -2,6 +2,5 @@ hook called: all symbols read.
Input: .*/ld/testsuite/ld-plugin/func.c \(.*/ld/testsuite/ld-plugin/func.c\)
Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.*
Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.*
-.*: tmpdir/main.o: in function `main':
-.*main.c.*: undefined reference to `\.?func'
+#...
hook called: cleanup.
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-22.d binutils-2.32/ld/testsuite/ld-plugin/plugin-22.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-22.d 2019-02-15 13:33:21.980627277 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-22.d 2019-02-15 13:50:00.409694022 +0000
@@ -2,6 +2,5 @@ Claimed: tmpdir/libfunc.a \[@.*
hook called: all symbols read.
Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.*
Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.*
-.*: tmpdir/main.o: in function `main':
-.*main.c.*: undefined reference to `\.?func'
+#...
hook called: cleanup.
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-23.d binutils-2.32/ld/testsuite/ld-plugin/plugin-23.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-23.d 2019-02-15 13:33:21.979627285 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-23.d 2019-02-15 13:50:14.938580156 +0000
@@ -2,6 +2,5 @@ Claimed: .*/ld/testsuite/ld-plugin/func.
hook called: all symbols read.
Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.*
Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.*
-.*: tmpdir/main.o: in function `main':
-.*main.c.*: undefined reference to `\.?func'
+#...
hook called: cleanup.
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-24.d binutils-2.32/ld/testsuite/ld-plugin/plugin-24.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-24.d 2019-02-15 13:33:21.980627277 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-24.d 2019-02-15 13:49:46.346804240 +0000
@@ -2,4 +2,5 @@ hook called: all symbols read.
Input: .*/ld/testsuite/ld-plugin/func.c \(.*/ld/testsuite/ld-plugin/func.c\)
Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.*
Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.*
+#...
hook called: cleanup.
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-25.d binutils-2.32/ld/testsuite/ld-plugin/plugin-25.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-25.d 2019-02-15 13:33:21.978627293 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-25.d 2019-02-15 13:50:29.322467422 +0000
@@ -2,4 +2,5 @@ Claimed: .*/ld/testsuite/ld-plugin/func.
hook called: all symbols read.
Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.*
Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.*
+#...
hook called: cleanup.
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-28.d binutils-2.32/ld/testsuite/ld-plugin/plugin-28.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-28.d 2019-02-15 13:33:21.977627301 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-28.d 2019-02-15 13:45:05.343006557 +0000
@@ -1 +1,3 @@
.*: error: Error
+#...
+
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-29.d binutils-2.32/ld/testsuite/ld-plugin/plugin-29.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-29.d 2019-02-15 13:33:21.978627293 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-29.d 2019-02-15 13:45:22.764870016 +0000
@@ -1 +1,2 @@
.*: warning: Warning
+#...
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-30.d binutils-2.32/ld/testsuite/ld-plugin/plugin-30.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-30.d 2019-02-15 13:33:21.976627309 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-30.d 2019-02-15 13:48:57.067190464 +0000
@@ -24,3 +24,4 @@ hook called: claim_file tmpdir/main.o \[
hook called: claim_file tmpdir/func.o \[@0/.* not claimed
hook called: claim_file tmpdir/text.o \[@0/.* not claimed
hook called: claim_file tmpdir/libempty.a \[@.* not claimed
+#pass
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-6.d binutils-2.32/ld/testsuite/ld-plugin/plugin-6.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-6.d 2019-02-15 13:33:21.979627285 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-6.d 2019-02-15 13:37:14.672749977 +0000
@@ -27,7 +27,6 @@ hook called: claim_file tmpdir/func.o \[
hook called: claim_file tmpdir/text.o \[@0/.* not claimed
#...
hook called: all symbols read.
-.*: tmpdir/main.o: in function `main':
-.*main.c.*: undefined reference to `\.?func'
+#...
hook called: cleanup.
#...
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-7.d binutils-2.32/ld/testsuite/ld-plugin/plugin-7.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-7.d 2019-02-15 13:33:21.977627301 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-7.d 2019-02-15 13:37:58.000400421 +0000
@@ -28,7 +28,6 @@ hook called: claim_file tmpdir/func.o \[
hook called: claim_file tmpdir/text.o \[@0/.* not claimed
#...
hook called: all symbols read.
-.*: tmpdir/main.o: in function `main':
-.*main.c.*: undefined reference to `\.?func'
+#...
hook called: cleanup.
#...
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-8.d binutils-2.32/ld/testsuite/ld-plugin/plugin-8.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-8.d 2019-02-15 13:33:21.980627277 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-8.d 2019-02-15 13:38:34.096109209 +0000
@@ -32,7 +32,6 @@ hook called: claim_file tmpdir/text.o \[
hook called: all symbols read.
Sym: '_?func' Resolution: LDPR_PREVAILING_DEF
Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY
-.*: tmpdir/main.o: in function `main':
-.*main.c.*: undefined reference to `\.?func'
+#...
hook called: cleanup.
#...
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-9.d binutils-2.32/ld/testsuite/ld-plugin/plugin-9.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-9.d 2019-02-15 13:33:21.977627301 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-9.d 2019-02-15 13:39:52.655475403 +0000
@@ -31,7 +31,8 @@ hook called: claim_file tmpdir/func.o \[
hook called: claim_file tmpdir/text.o \[@0/.* not claimed
#...
hook called: all symbols read.
-Sym: '_?func' Resolution: LDPR_PREVAILING_DEF
+Sym: '_?func' Resolution: LDPR_PREVAILING_DEF_IRONLY
Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY
+#...
hook called: cleanup.
#...
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/pr20070.d binutils-2.32/ld/testsuite/ld-plugin/pr20070.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/pr20070.d 2019-02-15 13:33:21.976627309 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/pr20070.d 2019-02-15 13:50:56.874251486 +0000
@@ -5,5 +5,6 @@ Sym: 'weakdef' Resolution: LDPR_PREVAILI
Sym: 'undef' Resolution: LDPR_UNDEF
Sym: 'weakundef' Resolution: LDPR_UNDEF
Sym: 'common' Resolution: LDPR_PREVAILING_DEF_IRONLY
+#...
hook called: cleanup.
#...
diff -rup binutils-2.32.orig/ld/testsuite/ld-srec/srec.exp binutils-2.32/ld/testsuite/ld-srec/srec.exp
--- binutils-2.32.orig/ld/testsuite/ld-srec/srec.exp 2019-02-15 13:33:21.938627615 +0000
+++ binutils-2.32/ld/testsuite/ld-srec/srec.exp 2019-02-15 13:53:58.744814006 +0000
@@ -21,6 +21,8 @@
# Get the offset from an S-record line to the start of the data.
+return
+
proc srec_off { l } {
if [string match "S1*" $l] {
return 8
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-10.d binutils-2.32/ld/testsuite/ld-plugin/plugin-10.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-10.d 2019-02-15 14:10:59.038709514 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-10.d 2019-02-15 14:13:53.532300721 +0000
@@ -32,7 +32,7 @@ hook called: claim_file tmpdir/func.o \[
hook called: claim_file tmpdir/libtext.a \[@.* not claimed
#...
hook called: all symbols read.
-Sym: '_?func' Resolution: LDPR_PREVAILING_DEF
+Sym: '_?func' Resolution: LDPR_PREVAILING_DEF_IRONLY
Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY
#...
hook called: cleanup.
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-11.d binutils-2.32/ld/testsuite/ld-plugin/plugin-11.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-11.d 2019-02-15 14:10:59.041709490 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-11.d 2019-02-15 14:14:50.061844322 +0000
@@ -35,8 +35,9 @@ hook called: claim_file tmpdir/func.o \[
hook called: claim_file tmpdir/libtext.a \[@.* CLAIMED
#...
hook called: all symbols read.
-Sym: '_?func' Resolution: LDPR_PREVAILING_DEF
+Sym: '_?func' Resolution: LDPR_PREVAILING_DEF_IRONLY
Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY
-Sym: '_?text' Resolution: LDPR_PREVAILING_DEF
+Sym: '_?text' Resolution: LDPR_PREVAILING_DEF_IRONLY
+#...
hook called: cleanup.
#...
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-18.d binutils-2.32/ld/testsuite/ld-plugin/plugin-18.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-18.d 2019-02-15 14:10:58.942710289 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-18.d 2019-02-15 14:15:20.030602369 +0000
@@ -32,7 +32,8 @@ hook called: claim_file .*/ld/testsuite/
hook called: claim_file tmpdir/libtext.a \[@.* not claimed
#...
hook called: all symbols read.
-Sym: '_?func' Resolution: LDPR_PREVAILING_DEF
+Sym: '_?func' Resolution: LDPR_PREVAILING_DEF_IRONLY
Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY
+#...
hook called: cleanup.
#...
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-19.d binutils-2.32/ld/testsuite/ld-plugin/plugin-19.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-19.d 2019-02-15 14:10:59.024709627 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-19.d 2019-02-15 14:15:54.926320633 +0000
@@ -35,8 +35,9 @@ hook called: claim_file .*/ld/testsuite/
hook called: claim_file tmpdir/libtext.a \[@.* CLAIMED
#...
hook called: all symbols read.
-Sym: '_?func' Resolution: LDPR_PREVAILING_DEF
+Sym: '_?func' Resolution: LDPR_PREVAILING_DEF_IRONLY
Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY
-Sym: '_?text' Resolution: LDPR_PREVAILING_DEF
+Sym: '_?text' Resolution: LDPR_PREVAILING_DEF_IRONLY
+#...
hook called: cleanup.
#...
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-28.d binutils-2.32/ld/testsuite/ld-plugin/plugin-28.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-28.d 2019-02-15 14:10:58.998709837 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-28.d 2019-02-15 14:12:19.856057024 +0000
@@ -1,3 +1,2 @@
.*: error: Error
#...
-
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-8.d binutils-2.32/ld/testsuite/ld-plugin/plugin-8.d
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-8.d 2019-02-15 14:10:59.074709224 +0000
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-8.d 2019-02-15 14:11:48.144313048 +0000
@@ -30,7 +30,7 @@ hook called: claim_file tmpdir/func.o \[
hook called: claim_file tmpdir/text.o \[@0/.* not claimed
#...
hook called: all symbols read.
-Sym: '_?func' Resolution: LDPR_PREVAILING_DEF
+Sym: '_?func' Resolution: LDPR_PREVAILING_DEF_IRONLY
Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY
#...
hook called: cleanup.
diff -rup binutils.orig/ld/testsuite/ld-elfvers/vers24.rd binutils-2.30/ld/testsuite/ld-elfvers/vers24.rd
--- binutils.orig/ld/testsuite/ld-elfvers/vers24.rd 2018-09-05 09:45:44.013108697 +0100
+++ binutils-2.30/ld/testsuite/ld-elfvers/vers24.rd 2018-09-05 12:06:17.287425232 +0100
@@ -7,9 +7,9 @@ Symbol table '.dynsym' contains [0-9]+ e
# And ensure the dynamic symbol table contains at least x@VERS.0
# and foo@@VERS.0 symbols
#...
- +[0-9]+: [0-9a-f]+ +(4 +OBJECT +GLOBAL +DEFAULT +[0-9]+ _?x|[0-9]+ +FUNC +GLOBAL +DEFAULT .* [0-9]+ _?foo@)@VERS\.0
+ +[0-9]+: [0-9a-f]+ +(4 +OBJECT +GLOBAL +DEFAULT +[0-9]+ _?x|[0-9]+ +FUNC +GLOBAL +DEFAULT .* [0-9]+ _?foo@)@VERS\.0.*
#...
- +[0-9]+: [0-9a-f]+ +(4 +OBJECT +GLOBAL +DEFAULT +[0-9]+ _?x|[0-9]+ +FUNC +GLOBAL +DEFAULT .* [0-9]+ _?foo@)@VERS\.0
+ +[0-9]+: [0-9a-f]+ +(4 +OBJECT +GLOBAL +DEFAULT +[0-9]+ _?x|[0-9]+ +FUNC +GLOBAL +DEFAULT .* [0-9]+ _?foo@)@VERS\.0.*
#...
Symbol table '.symtab' contains [0-9]+ entries:
#pass
diff -rup binutils.orig/ld/testsuite/ld-plugin/plugin.exp binutils-2.30/ld/testsuite/ld-plugin/plugin.exp
--- binutils.orig/ld/testsuite/ld-plugin/plugin.exp 2018-09-05 09:45:44.023108605 +0100
+++ binutils-2.30/ld/testsuite/ld-plugin/plugin.exp 2018-09-05 11:18:53.997202105 +0100
@@ -118,6 +118,12 @@ if { $can_compile && !$failed_compile }
}
}
+# I do not know why, but the underscore prefix test is going
+# wrong on ppc64le targets. So override it here.
+if { [istarget powerpc*-*-linux*] || [istarget x86_64*-*-linux*] } {
+ set _ ""
+}
+
set testobjfiles "tmpdir/main.o tmpdir/func.o tmpdir/text.o"
set testobjfiles_notext "tmpdir/main.o tmpdir/func.o"
set testsrcfiles "tmpdir/main.o $srcdir/$subdir/func.c tmpdir/text.o"

11
binutils-gold-empty-dwp.patch Normal file
View File

@ -0,0 +1,11 @@
--- binutils.orig/gold/dwp.cc 2023-05-02 13:26:44.075148082 +0100
+++ binutils-2.40/gold/dwp.cc 2023-05-02 13:27:16.189130127 +0100
@@ -2418,6 +2418,8 @@ main(int argc, char** argv)
{
Dwo_file exe_file(exe_filename);
exe_file.read_executable(&files);
+ if (files.empty())
+ gold_fatal(_("Could not find any dwo links in specified EXE"));
}
// Add any additional files listed on command line.

19
binutils-gold-mismatched-section-flags.patch Normal file
View File

@ -0,0 +1,19 @@
diff -rup binutils.orig/gold/layout.cc binutils-2.32/gold/layout.cc
--- binutils.orig/gold/layout.cc 2019-06-24 14:37:36.013086899 +0100
+++ binutils-2.32/gold/layout.cc 2019-06-24 14:41:40.054517479 +0100
@@ -868,6 +868,7 @@ Layout::get_output_section(const char* n
&& (same_name->flags() & elfcpp::SHF_TLS) == 0)
os = same_name;
}
+#if 0 /* BZ 1722715, PR 17556. */
else if ((flags & elfcpp::SHF_TLS) == 0)
{
elfcpp::Elf_Xword zero_flags = 0;
@@ -878,6 +879,7 @@ Layout::get_output_section(const char* n
if (p != this->section_name_map_.end())
os = p->second;
}
+#endif
}
if (os == NULL)

0
binutils-2.20.51.0.2-libtool-lib64.patch → binutils-libtool-lib64.patch
View File

0
binutils-2.22.52.0.4-no-config-h-check.patch → binutils-no-config-h-check.patch
View File

44
binutils-objcopy-note-merge-speedup.patch Normal file
View File

@ -0,0 +1,44 @@
--- binutils.orig/binutils/objcopy.c 2023-01-16 12:15:46.405649346 +0000
+++ binutils-2.39/binutils/objcopy.c 2023-01-16 12:16:48.892667868 +0000
@@ -2383,6 +2383,8 @@ merge_gnu_build_notes (bfd * ab
other note then if they are both of the same type (open
or func) then they can be merged and one deleted. If
they are of different types then they cannot be merged. */
+ objcopy_internal_note * prev_note = NULL;
+
for (pnote = pnotes; pnote < pnotes_end; pnote ++)
{
/* Skip already deleted notes.
@@ -2404,7 +2406,9 @@ merge_gnu_build_notes (bfd * ab
objcopy_internal_note * back;
/* Rule 2: Check to see if there is an identical previous note. */
- for (iter = 0, back = pnote - 1; back >= pnotes; back --)
+ for (iter = 0, back = prev_note ? prev_note : pnote - 1;
+ back >= pnotes;
+ back --)
{
if (is_deleted_note (back))
continue;
@@ -2466,11 +2470,18 @@ merge_gnu_build_notes (bfd * ab
break;
}
}
-#if DEBUG_MERGE
+
+
if (! is_deleted_note (pnote))
- merge_debug ("Unable to do anything with note at %#08lx\n",
- (pnote->note.namedata - (char *) contents) - 12);
+ {
+ /* Keep a pointer to this note, so that we can
+ start the next search for rule 2 matches here. */
+ prev_note = pnote;
+#if DEBUG_MERGE
+ merge_debug ("Unable to do anything with note at %#08lx\n",
+ (pnote->note.namedata - (char *) contents) - 12);
#endif
+ }
}
/* Resort the notes. */

50
binutils-reloc-symtab.patch Normal file
View File

@ -0,0 +1,50 @@
--- binutils.orig/bfd/elf.c 2023-03-30 10:01:40.824181703 +0100
+++ binutils-2.40/bfd/elf.c 2023-03-30 10:02:23.103135337 +0100
@@ -3877,21 +3877,23 @@ assign_section_numbers (bfd *abfd, struc
{
case SHT_REL:
case SHT_RELA:
- /* A reloc section which we are treating as a normal BFD
- section. sh_link is the section index of the symbol
- table. sh_info is the section index of the section to
- which the relocation entries apply. We assume that an
- allocated reloc section uses the dynamic symbol table
- if there is one. Otherwise we guess the normal symbol
- table. FIXME: How can we be sure? */
- if (d->this_hdr.sh_link == 0 && (sec->flags & SEC_ALLOC) != 0)
+ /* sh_link is the section index of the symbol table.
+ sh_info is the section index of the section to which the
+ relocation entries apply. */
+ if (d->this_hdr.sh_link == 0)
{
- s = bfd_get_section_by_name (abfd, ".dynsym");
- if (s != NULL)
- d->this_hdr.sh_link = elf_section_data (s)->this_idx;
+ /* FIXME maybe: If this is a reloc section which we are
+ treating as a normal section then we likely should
+ not be assuming its sh_link is .dynsym or .symtab. */
+ if ((sec->flags & SEC_ALLOC) != 0)
+ {
+ s = bfd_get_section_by_name (abfd, ".dynsym");
+ if (s != NULL)
+ d->this_hdr.sh_link = elf_section_data (s)->this_idx;
+ }
+ else
+ d->this_hdr.sh_link = elf_onesymtab (abfd);
}
- if (d->this_hdr.sh_link == 0)
- d->this_hdr.sh_link = elf_onesymtab (abfd);
s = elf_get_reloc_section (sec);
if (s != NULL)
--- binutils.orig/binutils/objcopy.c 2023-03-30 10:01:41.063181441 +0100
+++ binutils-2.40/binutils/objcopy.c 2023-03-30 12:25:41.439108276 +0100
@@ -2256,7 +2256,7 @@ merge_gnu_build_notes (bfd * ab
{
if (pnote->note.namedata[4] == '2')
++ version_2_seen;
- else if (pnote->note.namedata[4] == '3')
+ else if (pnote->note.namedata[4] == '3' || pnote->note.namedata[4] == '4')
++ version_3_seen;
else
{

27
binutils-special-sections-in-groups.patch Normal file
View File

@ -0,0 +1,27 @@
--- binutils.orig/bfd/elf.c 2018-10-19 11:42:10.107277490 +0100
+++ binutils-2.31.1/bfd/elf.c 2018-10-19 11:44:33.607105801 +0100
@@ -830,7 +830,13 @@ setup_group (bfd *abfd, Elf_Internal_Shd
}
}
- if (elf_group_name (newsect) == NULL)
+ if (elf_group_name (newsect) == NULL
+ /* OS specific sections might be in a group (eg ARM's ARM_EXIDX section)
+ but they will not have been added to the group because they do not
+ have contents that the ELF code in the BFD library knows how to
+ process. This is OK though - we rely upon the target backends to
+ handle these sections for us. */
+ && hdr->sh_type < SHT_LOOS)
{
/* xgettext:c-format */
_bfd_error_handler (_("%pB: no group info for section '%pA'"),
@@ -936,7 +942,8 @@ _bfd_elf_setup_sections (bfd *abfd)
else if (idx->shdr->bfd_section)
elf_sec_group (idx->shdr->bfd_section) = shdr->bfd_section;
else if (idx->shdr->sh_type != SHT_RELA
- && idx->shdr->sh_type != SHT_REL)
+ && idx->shdr->sh_type != SHT_REL
+ && idx->shdr->sh_type < SHT_LOOS)
{
/* There are some unknown sections in the group. */
_bfd_error_handler

36
binutils-update-linker-manual.patch Normal file
View File

@ -0,0 +1,36 @@
diff -rup binutils.orig/ld/ld.1 binutils-2.38/ld/ld.1
--- binutils.orig/ld/ld.1 2022-05-27 10:56:44.937044892 +0100
+++ binutils-2.38/ld/ld.1 2022-05-27 11:10:50.311802310 +0100
@@ -2595,7 +2595,7 @@ systems may not understand them. If you
\&\fB\-\-enable\-new\-dtags\fR, the new dynamic tags will be created as needed
and older dynamic tags will be omitted.
If you specify \fB\-\-disable\-new\-dtags\fR, no new dynamic tags will be
-created. By default, the new dynamic tags are not created. Note that
+created. By default, the new dynamic tags are created. Note that
those options are only available for \s-1ELF\s0 systems.
.IP "\fB\-\-hash\-size=\fR\fInumber\fR" 4
.IX Item "--hash-size=number"
diff -rup binutils.orig/ld/ld.info binutils-2.38/ld/ld.info
--- binutils.orig/ld/ld.info 2022-05-27 11:01:12.286346357 +0100
+++ binutils-2.38/ld/ld.info 2022-05-27 11:11:24.585709176 +0100
@@ -2236,7 +2236,7 @@ GNU linker:
'--enable-new-dtags', the new dynamic tags will be created as
needed and older dynamic tags will be omitted. If you specify
'--disable-new-dtags', no new dynamic tags will be created. By
- default, the new dynamic tags are not created. Note that those
+ default, the new dynamic tags are created. Note that those
options are only available for ELF systems.
'--hash-size=NUMBER'
diff -rup binutils.orig/ld/ld.texi binutils-2.38/ld/ld.texi
--- binutils.orig/ld/ld.texi 2022-05-27 11:01:24.081314960 +0100
+++ binutils-2.38/ld/ld.texi 2022-05-27 11:10:05.608923798 +0100
@@ -2796,7 +2796,7 @@ systems may not understand them. If you
@option{--enable-new-dtags}, the new dynamic tags will be created as needed
and older dynamic tags will be omitted.
If you specify @option{--disable-new-dtags}, no new dynamic tags will be
-created. By default, the new dynamic tags are not created. Note that
+created. By default, the new dynamic tags are created. Note that
those options are only available for ELF systems.
@kindex --hash-size=@var{number}

1639
binutils.spec
View File

File diff suppressed because it is too large Load Diff