vdo/0001-Add-loongarch64-support.patch

67 lines
2.1 KiB
Diff
Raw Normal View History

2023-03-07 11:27:17 +08:00
From 249491af07c735d93fc743e413a5304057e43a75 Mon Sep 17 00:00:00 2001
From: doupengda <doupengda@loongson.cn>
Date: Tue, 7 Mar 2023 11:08:46 +0800
Subject: [PATCH] Add loongarch64 support
---
utils/uds/atomicDefs.h | 8 +++++++-
utils/uds/cpu.h | 2 +-
2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/utils/uds/atomicDefs.h b/utils/uds/atomicDefs.h
index 0aad609..f468369 100644
--- a/utils/uds/atomicDefs.h
+++ b/utils/uds/atomicDefs.h
@@ -96,6 +96,8 @@ static INLINE void smp_mb(void)
__asm__ __volatile__("bcr 14,0" : : : "memory");
#elif defined __PPC__
__asm__ __volatile__("sync" : : : "memory");
+#elif defined __loongarch64
+ __asm__ __volatile__("dbar 0" : : : "memory");
#else
#error "no fence defined"
#endif
@@ -121,6 +123,8 @@ static INLINE void smp_rmb(void)
__asm__ __volatile__("bcr 14,0" : : : "memory");
#elif defined __PPC__
__asm__ __volatile__("lwsync" : : : "memory");
+#elif defined __loongarch64
+ __asm__ __volatile__("dbar 0" : : : "memory");
#else
#error "no fence defined"
#endif
@@ -146,6 +150,8 @@ static INLINE void smp_wmb(void)
__asm__ __volatile__("bcr 14,0" : : : "memory");
#elif defined __PPC__
__asm__ __volatile__("lwsync" : : : "memory");
+#elif defined __loongarch64
+ __asm__ __volatile__("dbar 0" : : : "memory");
#else
#error "no fence defined"
#endif
@@ -172,7 +178,7 @@ static INLINE void smp_mb__before_atomic(void)
static INLINE void smp_read_barrier_depends(void)
{
#if defined(__x86_64__) || defined(__PPC__) || defined(__s390__) \
- || defined(__aarch64__)
+ || defined(__aarch64__) || defined(__loongarch64)
// Nothing needed for these architectures.
#else
// Default to playing it safe.
diff --git a/utils/uds/cpu.h b/utils/uds/cpu.h
index 6549f6e..e26d653 100644
--- a/utils/uds/cpu.h
+++ b/utils/uds/cpu.h
@@ -36,7 +36,7 @@
#define CACHE_LINE_BYTES 128
#elif defined(__s390x__)
#define CACHE_LINE_BYTES 256
-#elif defined(__x86_64__) || defined(__aarch64__)
+#elif defined(__x86_64__) || defined(__aarch64__) || defined(__loongarch64)
#define CACHE_LINE_BYTES 64
#else
#error "unknown cache line size"
--
2.33.0