uboot-tools: Update to 2020.07.
Signed-off-by: chengguipeng <chengguipeng1@huawei.com>
This commit is contained in:
chengguipeng
parent
e51d440fe2
commit
134e0b2d4f
@ -9,6 +9,18 @@ KERNEL_VERSION="$2"
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#BOOT_DIR_ABS="$3"
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#BOOT_DIR_ABS="$3"
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#KERNEL_IMAGE="$4"
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#KERNEL_IMAGE="$4"
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[ -f /etc/u-boot.conf ] && source /etc/u-boot.conf || true
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[ -z "$FIRMWAREDT" ] || FirmwareDT=$FIRMWAREDT
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if [[ $FirmwareDT == "True" ]]
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then
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# if we want to use firmware DT we remove symlink to current kernel DT
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if [ -h /boot/dtb ]; then
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rm -f /boot/dtb
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fi
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exit 0
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fi
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# Setup a /boot/dtb -> /boot/dtb-$newest_kernel_version symlink so that
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# Setup a /boot/dtb -> /boot/dtb-$newest_kernel_version symlink so that
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# u-boot can find the correct dtb to load.
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# u-boot can find the correct dtb to load.
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#
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#
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2172
AllWinner-Pine64-bits.patch
Normal file
2172
AllWinner-Pine64-bits.patch
Normal file
File diff suppressed because it is too large
Load Diff
993
USB-host-support-for-Raspberry-Pi-4-board-64-bit.patch
Normal file
993
USB-host-support-for-Raspberry-Pi-4-board-64-bit.patch
Normal file
@ -0,0 +1,993 @@
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From 47d0df70fbe5997770090aca05b07d774a19a722 Mon Sep 17 00:00:00 2001
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From: Peter Robinson <pbrobinson@gmail.com>
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Date: Wed, 10 Jun 2020 13:15:45 +0100
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Subject: [PATCH] USB host support for Raspberry Pi 4 board (64-bit)
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Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
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---
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arch/arm/mach-bcm283x/init.c | 20 +-
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configs/rpi_4_defconfig | 9 +
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configs/rpi_arm64_defconfig | 8 +-
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drivers/pci/Kconfig | 9 +
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drivers/pci/Makefile | 1 +
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drivers/pci/pci-rcar-gen3.c | 8 -
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drivers/pci/pcie_brcmstb.c | 623 ++++++++++++++++++++++++++++++++++
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drivers/pci/pcie_intel_fpga.c | 3 -
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drivers/usb/host/xhci-mem.c | 3 +
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include/linux/bitfield.h | 52 +++
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include/pci.h | 22 +-
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include/usb/xhci.h | 8 -
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12 files changed, 740 insertions(+), 26 deletions(-)
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create mode 100644 drivers/pci/pcie_brcmstb.c
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diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c
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index f4d00d892d..cf4c5b245d 100644
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--- a/arch/arm/mach-bcm283x/init.c
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+++ b/arch/arm/mach-bcm283x/init.c
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@@ -12,10 +12,15 @@
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#include <dm/device.h>
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#include <fdt_support.h>
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+#define BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS 0x600000000UL
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+#define BCM2711_RPI4_PCIE_XHCI_MMIO_SIZE 0x800000UL
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+
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#ifdef CONFIG_ARM64
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#include <asm/armv8/mmu.h>
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-static struct mm_region bcm283x_mem_map[] = {
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+#define MEM_MAP_MAX_ENTRIES (4)
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+
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+static struct mm_region bcm283x_mem_map[MEM_MAP_MAX_ENTRIES] = {
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{
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.virt = 0x00000000UL,
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.phys = 0x00000000UL,
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@@ -35,11 +40,11 @@ static struct mm_region bcm283x_mem_map[] = {
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}
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};
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-static struct mm_region bcm2711_mem_map[] = {
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+static struct mm_region bcm2711_mem_map[MEM_MAP_MAX_ENTRIES] = {
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{
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.virt = 0x00000000UL,
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.phys = 0x00000000UL,
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- .size = 0xfe000000UL,
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+ .size = 0xfc000000UL,
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.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
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PTE_BLOCK_INNER_SHARE
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}, {
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@@ -49,6 +54,13 @@ static struct mm_region bcm2711_mem_map[] = {
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.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
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PTE_BLOCK_NON_SHARE |
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PTE_BLOCK_PXN | PTE_BLOCK_UXN
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+ }, {
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+ .virt = BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS,
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+ .phys = BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS,
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+ .size = BCM2711_RPI4_PCIE_XHCI_MMIO_SIZE,
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+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
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+ PTE_BLOCK_NON_SHARE |
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+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
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}, {
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/* List terminator */
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0,
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@@ -72,7 +84,7 @@ static void _rpi_update_mem_map(struct mm_region *pd)
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{
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int i;
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- for (i = 0; i < 2; i++) {
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+ for (i = 0; i < MEM_MAP_MAX_ENTRIES; i++) {
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mem_map[i].virt = pd[i].virt;
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mem_map[i].phys = pd[i].phys;
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mem_map[i].size = pd[i].size;
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diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig
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index f0301dc8bc..b42efe6072 100644
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--- a/configs/rpi_4_defconfig
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+++ b/configs/rpi_4_defconfig
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@@ -6,6 +6,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_ENV_SIZE=0x4000
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CONFIG_DISTRO_DEFAULTS=y
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CONFIG_OF_BOARD_SETUP=y
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+CONFIG_USE_PREBOOT=y
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+CONFIG_PREBOOT="pci enum; usb start;"
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CONFIG_MISC_INIT_R=y
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# CONFIG_DISPLAY_CPUINFO is not set
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# CONFIG_DISPLAY_BOARDINFO is not set
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@@ -13,6 +15,8 @@ CONFIG_SYS_PROMPT="U-Boot> "
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CONFIG_CMD_DFU=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_MMC=y
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+CONFIG_CMD_PCI=y
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+CONFIG_CMD_USB=y
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CONFIG_CMD_FS_UUID=y
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CONFIG_OF_BOARD=y
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CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
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@@ -26,12 +30,17 @@ CONFIG_MMC_SDHCI_SDMA=y
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CONFIG_MMC_SDHCI_BCM2835=y
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CONFIG_DM_ETH=y
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CONFIG_BCMGENET=y
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+CONFIG_PCI=y
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+CONFIG_DM_PCI=y
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+CONFIG_PCI_BRCMSTB=y
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CONFIG_PINCTRL=y
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# CONFIG_PINCTRL_GENERIC is not set
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# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
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CONFIG_USB=y
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CONFIG_DM_USB=y
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CONFIG_DM_USB_GADGET=y
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+CONFIG_USB_XHCI_HCD=y
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+CONFIG_USB_XHCI_PCI=y
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CONFIG_USB_GADGET=y
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CONFIG_USB_GADGET_MANUFACTURER="FSL"
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CONFIG_USB_GADGET_VENDOR_NUM=0x0525
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diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig
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index d16c2388af..0feea7f0be 100644
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--- a/configs/rpi_arm64_defconfig
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+++ b/configs/rpi_arm64_defconfig
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@@ -7,13 +7,14 @@ CONFIG_ENV_SIZE=0x4000
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CONFIG_DISTRO_DEFAULTS=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_USE_PREBOOT=y
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-CONFIG_PREBOOT="usb start"
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+CONFIG_PREBOOT="pci enum; usb start;"
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CONFIG_MISC_INIT_R=y
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# CONFIG_DISPLAY_CPUINFO is not set
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# CONFIG_DISPLAY_BOARDINFO is not set
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CONFIG_SYS_PROMPT="U-Boot> "
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_MMC=y
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+CONFIG_CMD_PCI=y
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CONFIG_CMD_USB=y
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CONFIG_CMD_FS_UUID=y
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CONFIG_OF_BOARD=y
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@@ -26,11 +27,16 @@ CONFIG_MMC_SDHCI_SDMA=y
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CONFIG_MMC_SDHCI_BCM2835=y
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CONFIG_DM_ETH=y
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CONFIG_BCMGENET=y
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+CONFIG_PCI=y
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+CONFIG_DM_PCI=y
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+CONFIG_PCI_BRCMSTB=y
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CONFIG_PINCTRL=y
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# CONFIG_PINCTRL_GENERIC is not set
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# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
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CONFIG_USB=y
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CONFIG_DM_USB=y
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+CONFIG_USB_XHCI_HCD=y
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+CONFIG_USB_XHCI_PCI=y
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CONFIG_USB_DWC2=y
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CONFIG_USB_KEYBOARD=y
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CONFIG_USB_HOST_ETHER=y
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diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
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index 6d8c22aacf..7e1e51d9ea 100644
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--- a/drivers/pci/Kconfig
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+++ b/drivers/pci/Kconfig
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@@ -205,4 +205,13 @@ config PCIE_ROCKCHIP
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Say Y here if you want to enable PCIe controller support on
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Rockchip SoCs.
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+config PCI_BRCMSTB
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+ bool "Broadcom STB PCIe controller"
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+ depends on DM_PCI
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+ depends on ARCH_BCM283X
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+ help
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+ Say Y here if you want to enable support for PCIe controller
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+ on Broadcom set-top-box (STB) SoCs.
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+ This driver currently supports only BCM2711 SoC and RC mode
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+ of the controller.
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endif
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diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
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index 955351c5c2..3e1ff417d7 100644
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--- a/drivers/pci/Makefile
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+++ b/drivers/pci/Makefile
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@@ -43,4 +43,5 @@ obj-$(CONFIG_PCI_PHYTIUM) += pcie_phytium.o
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obj-$(CONFIG_PCIE_INTEL_FPGA) += pcie_intel_fpga.o
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obj-$(CONFIG_PCI_KEYSTONE) += pcie_dw_ti.o
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obj-$(CONFIG_PCIE_MEDIATEK) += pcie_mediatek.o
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+obj-$(CONFIG_PCI_BRCMSTB) += pcie_brcmstb.o
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obj-$(CONFIG_PCIE_ROCKCHIP) += pcie_rockchip.o pcie_rockchip_phy.o
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diff --git a/drivers/pci/pci-rcar-gen3.c b/drivers/pci/pci-rcar-gen3.c
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index df7b37a592..1f51854ccc 100644
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--- a/drivers/pci/pci-rcar-gen3.c
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+++ b/drivers/pci/pci-rcar-gen3.c
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@@ -118,14 +118,6 @@
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#define RCAR_PCI_MAX_RESOURCES 4
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#define MAX_NR_INBOUND_MAPS 6
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-#define PCI_EXP_FLAGS 2 /* Capabilities register */
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-#define PCI_EXP_FLAGS_TYPE 0x00f0 /* Device/Port type */
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-#define PCI_EXP_TYPE_ROOT_PORT 0x4 /* Root Port */
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-#define PCI_EXP_LNKCAP 12 /* Link Capabilities */
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-#define PCI_EXP_LNKCAP_DLLLARC 0x00100000 /* Data Link Layer Link Active Reporting Capable */
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-#define PCI_EXP_SLTCAP 20 /* Slot Capabilities */
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-#define PCI_EXP_SLTCAP_PSN 0xfff80000 /* Physical Slot Number */
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-
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enum {
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RCAR_PCI_ACCESS_READ,
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RCAR_PCI_ACCESS_WRITE,
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diff --git a/drivers/pci/pcie_brcmstb.c b/drivers/pci/pcie_brcmstb.c
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new file mode 100644
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index 0000000000..dade79e9c8
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--- /dev/null
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+++ b/drivers/pci/pcie_brcmstb.c
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@@ -0,0 +1,623 @@
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+// SPDX-License-Identifier: GPL-2.0
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+/*
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+ * Broadcom STB PCIe controller driver
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+ *
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+ * Copyright (C) 2020 Samsung Electronics Co., Ltd.
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+ *
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+ * Based on upstream Linux kernel driver:
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+ * drivers/pci/controller/pcie-brcmstb.c
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+ * Copyright (C) 2009 - 2017 Broadcom
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+ *
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+ * Based driver by Nicolas Saenz Julienne
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+ * Copyright (C) 2020 Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
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+ */
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+
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+#include <common.h>
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+#include <errno.h>
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+#include <dm.h>
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+#include <dm/ofnode.h>
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+#include <pci.h>
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+#include <asm/io.h>
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+#include <linux/bitfield.h>
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+#include <linux/log2.h>
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+#include <linux/iopoll.h>
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|
+
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+/* Offset of the mandatory PCIe capability config registers */
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+#define BRCM_PCIE_CAP_REGS 0x00ac
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+
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+/* The PCIe controller register offsets */
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+#define PCIE_RC_CFG_VENDOR_SPECIFIC_REG1 0x0188
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+#define VENDOR_SPECIFIC_REG1_ENDIAN_MODE_BAR2_MASK 0xc
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+#define VENDOR_SPECIFIC_REG1_LITTLE_ENDIAN 0x0
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+
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+#define PCIE_RC_CFG_PRIV1_ID_VAL3 0x043c
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+#define CFG_PRIV1_ID_VAL3_CLASS_CODE_MASK 0xffffff
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|
+
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+#define PCIE_RC_DL_MDIO_ADDR 0x1100
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+#define PCIE_RC_DL_MDIO_WR_DATA 0x1104
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+#define PCIE_RC_DL_MDIO_RD_DATA 0x1108
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+
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+#define PCIE_MISC_MISC_CTRL 0x4008
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+#define MISC_CTRL_SCB_ACCESS_EN_MASK 0x1000
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|
+#define MISC_CTRL_CFG_READ_UR_MODE_MASK 0x2000
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+#define MISC_CTRL_MAX_BURST_SIZE_MASK 0x300000
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|
+#define MISC_CTRL_MAX_BURST_SIZE_128 0x0
|
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|
+#define MISC_CTRL_SCB0_SIZE_MASK 0xf8000000
|
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|
+
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|
+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LO 0x400c
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|
+#define PCIE_MEM_WIN0_LO(win) \
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|
+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LO + ((win) * 4)
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|
+
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|
+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_HI 0x4010
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|
+#define PCIE_MEM_WIN0_HI(win) \
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|
+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_HI + ((win) * 4)
|
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|
+
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|
+#define PCIE_MISC_RC_BAR1_CONFIG_LO 0x402c
|
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|
+#define RC_BAR1_CONFIG_LO_SIZE_MASK 0x1f
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|
+
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|
+#define PCIE_MISC_RC_BAR2_CONFIG_LO 0x4034
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|
+#define RC_BAR2_CONFIG_LO_SIZE_MASK 0x1f
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|
+#define PCIE_MISC_RC_BAR2_CONFIG_HI 0x4038
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|
+
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|
+#define PCIE_MISC_RC_BAR3_CONFIG_LO 0x403c
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|
+#define RC_BAR3_CONFIG_LO_SIZE_MASK 0x1f
|
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|
+
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|
+#define PCIE_MISC_PCIE_STATUS 0x4068
|
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|
+#define STATUS_PCIE_PORT_MASK 0x80
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|
+#define STATUS_PCIE_PORT_SHIFT 7
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|
+#define STATUS_PCIE_DL_ACTIVE_MASK 0x20
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|
+#define STATUS_PCIE_DL_ACTIVE_SHIFT 5
|
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|
+#define STATUS_PCIE_PHYLINKUP_MASK 0x10
|
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|
+#define STATUS_PCIE_PHYLINKUP_SHIFT 4
|
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|
+
|
||||||
|
+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT 0x4070
|
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|
+#define MEM_WIN0_BASE_LIMIT_LIMIT_MASK 0xfff00000
|
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|
+#define MEM_WIN0_BASE_LIMIT_BASE_MASK 0xfff0
|
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|
+#define MEM_WIN0_BASE_LIMIT_BASE_HI_SHIFT 12
|
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|
+#define PCIE_MEM_WIN0_BASE_LIMIT(win) \
|
||||||
|
+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT + ((win) * 4)
|
||||||
|
+
|
||||||
|
+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_HI 0x4080
|
||||||
|
+#define MEM_WIN0_BASE_HI_BASE_MASK 0xff
|
||||||
|
+#define PCIE_MEM_WIN0_BASE_HI(win) \
|
||||||
|
+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_HI + ((win) * 8)
|
||||||
|
+
|
||||||
|
+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI 0x4084
|
||||||
|
+#define PCIE_MEM_WIN0_LIMIT_HI_LIMIT_MASK 0xff
|
||||||
|
+#define PCIE_MEM_WIN0_LIMIT_HI(win) \
|
||||||
|
+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI + ((win) * 8)
|
||||||
|
+
|
||||||
|
+#define PCIE_MISC_HARD_PCIE_HARD_DEBUG 0x4204
|
||||||
|
+#define PCIE_HARD_DEBUG_CLKREQ_DEBUG_ENABLE_MASK 0x2
|
||||||
|
+#define PCIE_HARD_DEBUG_SERDES_IDDQ_MASK 0x08000000
|
||||||
|
+
|
||||||
|
+#define PCIE_MSI_INTR2_CLR 0x4508
|
||||||
|
+#define PCIE_MSI_INTR2_MASK_SET 0x4510
|
||||||
|
+
|
||||||
|
+#define PCIE_EXT_CFG_DATA 0x8000
|
||||||
|
+
|
||||||
|
+#define PCIE_EXT_CFG_INDEX 0x9000
|
||||||
|
+#define PCIE_EXT_BUSNUM_SHIFT 20
|
||||||
|
+#define PCIE_EXT_SLOT_SHIFT 15
|
||||||
|
+#define PCIE_EXT_FUNC_SHIFT 12
|
||||||
|
+
|
||||||
|
+#define PCIE_RGR1_SW_INIT_1 0x9210
|
||||||
|
+#define RGR1_SW_INIT_1_PERST_MASK 0x1
|
||||||
|
+#define RGR1_SW_INIT_1_INIT_MASK 0x2
|
||||||
|
+
|
||||||
|
+/* PCIe parameters */
|
||||||
|
+#define BRCM_NUM_PCIE_OUT_WINS 4
|
||||||
|
+
|
||||||
|
+/* MDIO registers */
|
||||||
|
+#define MDIO_PORT0 0x0
|
||||||
|
+#define MDIO_DATA_MASK 0x7fffffff
|
||||||
|
+#define MDIO_DATA_SHIFT 0
|
||||||
|
+#define MDIO_PORT_MASK 0xf0000
|
||||||
|
+#define MDIO_PORT_SHIFT 16
|
||||||
|
+#define MDIO_REGAD_MASK 0xffff
|
||||||
|
+#define MDIO_REGAD_SHIFT 0
|
||||||
|
+#define MDIO_CMD_MASK 0xfff00000
|
||||||
|
+#define MDIO_CMD_SHIFT 20
|
||||||
|
+#define MDIO_CMD_READ 0x1
|
||||||
|
+#define MDIO_CMD_WRITE 0x0
|
||||||
|
+#define MDIO_DATA_DONE_MASK 0x80000000
|
||||||
|
+#define SSC_REGS_ADDR 0x1100
|
||||||
|
+#define SET_ADDR_OFFSET 0x1f
|
||||||
|
+#define SSC_CNTL_OFFSET 0x2
|
||||||
|
+#define SSC_CNTL_OVRD_EN_MASK 0x8000
|
||||||
|
+#define SSC_CNTL_OVRD_VAL_MASK 0x4000
|
||||||
|
+#define SSC_STATUS_OFFSET 0x1
|
||||||
|
+#define SSC_STATUS_SSC_MASK 0x400
|
||||||
|
+#define SSC_STATUS_SSC_SHIFT 10
|
||||||
|
+#define SSC_STATUS_PLL_LOCK_MASK 0x800
|
||||||
|
+#define SSC_STATUS_PLL_LOCK_SHIFT 11
|
||||||
|
+
|
||||||
|
+/**
|
||||||
|
+ * struct brcm_pcie - the PCIe controller state
|
||||||
|
+ * @base: Base address of memory mapped IO registers of the controller
|
||||||
|
+ * @gen: Non-zero value indicates limitation of the PCIe controller operation
|
||||||
|
+ * to a specific generation (1, 2 or 3)
|
||||||
|
+ * @ssc: true indicates active Spread Spectrum Clocking operation
|
||||||
|
+ */
|
||||||
|
+struct brcm_pcie {
|
||||||
|
+ void __iomem *base;
|
||||||
|
+
|
||||||
|
+ int gen;
|
||||||
|
+ bool ssc;
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
+/**
|
||||||
|
+ * brcm_pcie_encode_ibar_size() - Encode the inbound "BAR" region size
|
||||||
|
+ * @size: The inbound region size
|
||||||
|
+ *
|
||||||
|
+ * This function converts size of the inbound "BAR" region to the non-linear
|
||||||
|
+ * values of the PCIE_MISC_RC_BAR[123]_CONFIG_LO register SIZE field.
|
||||||
|
+ *
|
||||||
|
+ * Return: The encoded inbound region size
|
||||||
|
+ */
|
||||||
|
+static int brcm_pcie_encode_ibar_size(u64 size)
|
||||||
|
+{
|
||||||
|
+ int log2_in = ilog2(size);
|
||||||
|
+
|
||||||
|
+ if (log2_in >= 12 && log2_in <= 15)
|
||||||
|
+ /* Covers 4KB to 32KB (inclusive) */
|
||||||
|
+ return (log2_in - 12) + 0x1c;
|
||||||
|
+ else if (log2_in >= 16 && log2_in <= 37)
|
||||||
|
+ /* Covers 64KB to 32GB, (inclusive) */
|
||||||
|
+ return log2_in - 15;
|
||||||
|
+
|
||||||
|
+ /* Something is awry so disable */
|
||||||
|
+ return 0;
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
+/**
|
||||||
|
+ * brcm_pcie_rc_mode() - Check if PCIe controller is in RC mode
|
||||||
|
+ * @pcie: Pointer to the PCIe controller state
|
||||||
|
+ *
|
||||||
|
+ * The controller is capable of serving in both RC and EP roles.
|
||||||
|
+ *
|
||||||
|
+ * Return: true for RC mode, false for EP mode.
|
||||||
|
+ */
|
||||||
|
+static bool brcm_pcie_rc_mode(struct brcm_pcie *pcie)
|
||||||
|
+{
|
||||||
|
+ u32 val;
|
||||||
|
+
|
||||||
|
+ val = readl(pcie->base + PCIE_MISC_PCIE_STATUS);
|
||||||
|
+
|
||||||
|
+ return (val & STATUS_PCIE_PORT_MASK) >> STATUS_PCIE_PORT_SHIFT;
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
+/**
|
||||||
|
+ * brcm_pcie_link_up() - Check whether the PCIe link is up
|
||||||
|
+ * @pcie: Pointer to the PCIe controller state
|
||||||
|
+ *
|
||||||
|
+ * Return: true if the link is up, false otherwise.
|
||||||
|
+ */
|
||||||
|
+static bool brcm_pcie_link_up(struct brcm_pcie *pcie)
|
||||||
|
+{
|
||||||
|
+ u32 val, dla, plu;
|
||||||
|
+
|
||||||
|
+ val = readl(pcie->base + PCIE_MISC_PCIE_STATUS);
|
||||||
|
+ dla = (val & STATUS_PCIE_DL_ACTIVE_MASK) >> STATUS_PCIE_DL_ACTIVE_SHIFT;
|
||||||
|
+ plu = (val & STATUS_PCIE_PHYLINKUP_MASK) >> STATUS_PCIE_PHYLINKUP_SHIFT;
|
||||||
|
+
|
||||||
|
+ return dla && plu;
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
+static int brcm_pcie_config_address(const struct udevice *dev, pci_dev_t bdf,
|
||||||
|
+ uint offset, void **paddress)
|
||||||
|
+{
|
||||||
|
+ struct brcm_pcie *pcie = dev_get_priv(dev);
|
||||||
|
+ unsigned int pci_bus = PCI_BUS(bdf);
|
||||||
|
+ unsigned int pci_dev = PCI_DEV(bdf);
|
||||||
|
+ unsigned int pci_func = PCI_FUNC(bdf);
|
||||||
|
+ int idx;
|
||||||
|
+
|
||||||
|
+ /*
|
||||||
|
+ * Busses 0 (host PCIe bridge) and 1 (its immediate child)
|
||||||
|
+ * are limited to a single device each
|
||||||
|
+ */
|
||||||
|
+ if (pci_bus < 2 && pci_dev > 0)
|
||||||
|
+ return -EINVAL;
|
||||||
|
+
|
||||||
|
+ /* Accesses to the RC go right to the RC registers */
|
||||||
|
+ if (pci_bus == 0) {
|
||||||
|
+ *paddress = pcie->base + offset;
|
||||||
|
+ return 0;
|
||||||
|
+ }
|
||||||
|
+
|
||||||
|
+ /* For devices, write to the config space index register */
|
||||||
|
+ idx = (pci_bus << PCIE_EXT_BUSNUM_SHIFT)
|
||||||
|
+ | (pci_dev << PCIE_EXT_SLOT_SHIFT)
|
||||||
|
+ | (pci_func << PCIE_EXT_FUNC_SHIFT);
|
||||||
|
+
|
||||||
|
+ writel(idx, pcie->base + PCIE_EXT_CFG_INDEX);
|
||||||
|
+ *paddress = pcie->base + PCIE_EXT_CFG_DATA + offset;
|
||||||
|
+
|
||||||
|
+ return 0;
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
+static int brcm_pcie_read_config(const struct udevice *bus, pci_dev_t bdf,
|
||||||
|
+ uint offset, ulong *valuep,
|
||||||
|
+ enum pci_size_t size)
|
||||||
|
+{
|
||||||
|
+ return pci_generic_mmap_read_config(bus, brcm_pcie_config_address,
|
||||||
|
+ bdf, offset, valuep, size);
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
+static int brcm_pcie_write_config(struct udevice *bus, pci_dev_t bdf,
|
||||||
|
+ uint offset, ulong value,
|
||||||
|
+ enum pci_size_t size)
|
||||||
|
+{
|
||||||
|
+ return pci_generic_mmap_write_config(bus, brcm_pcie_config_address,
|
||||||
|
+ bdf, offset, value, size);
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
+static const char *link_speed_to_str(unsigned int cls)
|
||||||
|
+{
|
||||||
|
+ switch (cls) {
|
||||||
|
+ case PCI_EXP_LNKSTA_CLS_2_5GB: return "2.5";
|
||||||
|
+ case PCI_EXP_LNKSTA_CLS_5_0GB: return "5.0";
|
||||||
|
+ case PCI_EXP_LNKSTA_CLS_8_0GB: return "8.0";
|
||||||
|
+ default:
|
||||||
|
+ break;
|
||||||
|
+ }
|
||||||
|
+
|
||||||
|
+ return "??";
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
+static u32 brcm_pcie_mdio_form_pkt(unsigned int port, unsigned int regad,
|
||||||
|
+ unsigned int cmd)
|
||||||
|
+{
|
||||||
|
+ u32 pkt;
|
||||||
|
+
|
||||||
|
+ pkt = (port << MDIO_PORT_SHIFT) & MDIO_PORT_MASK;
|
||||||
|
+ pkt |= (regad << MDIO_REGAD_SHIFT) & MDIO_REGAD_MASK;
|
||||||
|
+ pkt |= (cmd << MDIO_CMD_SHIFT) & MDIO_CMD_MASK;
|
||||||
|
+
|
||||||
|
+ return pkt;
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
+/**
|
||||||
|
+ * brcm_pcie_mdio_read() - Perform a register read on the internal MDIO bus
|
||||||
|
+ * @base: Pointer to the PCIe controller IO registers
|
||||||
|
+ * @port: The MDIO port number
|
||||||
|
+ * @regad: The register address
|
||||||
|
+ * @val: A pointer at which to store the read value
|
||||||
|
+ *
|
||||||
|
+ * Return: 0 on success and register value in @val, negative error value
|
||||||
|
+ * on failure.
|
||||||
|
+ */
|
||||||
|
+static int brcm_pcie_mdio_read(void __iomem *base, unsigned int port,
|
||||||
|
+ unsigned int regad, u32 *val)
|
||||||
|
+{
|
||||||
|
+ u32 data, addr;
|
||||||
|
+ int ret;
|
||||||
|
+
|
||||||
|
+ addr = brcm_pcie_mdio_form_pkt(port, regad, MDIO_CMD_READ);
|
||||||
|
+ writel(addr, base + PCIE_RC_DL_MDIO_ADDR);
|
||||||
|
+ readl(base + PCIE_RC_DL_MDIO_ADDR);
|
||||||
|
+
|
||||||
|
+ ret = readl_poll_timeout(base + PCIE_RC_DL_MDIO_RD_DATA, data,
|
||||||
|
+ (data & MDIO_DATA_DONE_MASK), 100);
|
||||||
|
+
|
||||||
|
+ *val = data & MDIO_DATA_MASK;
|
||||||
|
+
|
||||||
|
+ return ret;
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
+/**
|
||||||
|
+ * brcm_pcie_mdio_write() - Perform a register write on the internal MDIO bus
|
||||||
|
+ * @base: Pointer to the PCIe controller IO registers
|
||||||
|
+ * @port: The MDIO port number
|
||||||
|
+ * @regad: Address of the register
|
||||||
|
+ * @wrdata: The value to write
|
||||||
|
+ *
|
||||||
|
+ * Return: 0 on success, negative error value on failure.
|
||||||
|
+ */
|
||||||
|
+static int brcm_pcie_mdio_write(void __iomem *base, unsigned int port,
|
||||||
|
+ unsigned int regad, u16 wrdata)
|
||||||
|
+{
|
||||||
|
+ u32 data, addr;
|
||||||
|
+
|
||||||
|
+ addr = brcm_pcie_mdio_form_pkt(port, regad, MDIO_CMD_WRITE);
|
||||||
|
+ writel(addr, base + PCIE_RC_DL_MDIO_ADDR);
|
||||||
|
+ readl(base + PCIE_RC_DL_MDIO_ADDR);
|
||||||
|
+ writel(MDIO_DATA_DONE_MASK | wrdata, base + PCIE_RC_DL_MDIO_WR_DATA);
|
||||||
|
+
|
||||||
|
+ return readl_poll_timeout(base + PCIE_RC_DL_MDIO_WR_DATA, data,
|
||||||
|
+ !(data & MDIO_DATA_DONE_MASK), 100);
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
+/**
|
||||||
|
+ * brcm_pcie_set_ssc() - Configure the controller for Spread Spectrum Clocking
|
||||||
|
+ * @base: pointer to the PCIe controller IO registers
|
||||||
|
+ *
|
||||||
|
+ * Return: 0 on success, negative error value on failure.
|
||||||
|
+ */
|
||||||
|
+static int brcm_pcie_set_ssc(void __iomem *base)
|
||||||
|
+{
|
||||||
|
+ int pll, ssc;
|
||||||
|
+ int ret;
|
||||||
|
+ u32 tmp;
|
||||||
|
+
|
||||||
|
+ ret = brcm_pcie_mdio_write(base, MDIO_PORT0, SET_ADDR_OFFSET,
|
||||||
|
+ SSC_REGS_ADDR);
|
||||||
|
+ if (ret < 0)
|
||||||
|
+ return ret;
|
||||||
|
+
|
||||||
|
+ ret = brcm_pcie_mdio_read(base, MDIO_PORT0, SSC_CNTL_OFFSET, &tmp);
|
||||||
|
+ if (ret < 0)
|
||||||
|
+ return ret;
|
||||||
|
+
|
||||||
|
+ tmp |= (SSC_CNTL_OVRD_EN_MASK | SSC_CNTL_OVRD_VAL_MASK);
|
||||||
|
+
|
||||||
|
+ ret = brcm_pcie_mdio_write(base, MDIO_PORT0, SSC_CNTL_OFFSET, tmp);
|
||||||
|
+ if (ret < 0)
|
||||||
|
+ return ret;
|
||||||
|
+
|
||||||
|
+ udelay(1000);
|
||||||
|
+ ret = brcm_pcie_mdio_read(base, MDIO_PORT0, SSC_STATUS_OFFSET, &tmp);
|
||||||
|
+ if (ret < 0)
|
||||||
|
+ return ret;
|
||||||
|
+
|
||||||
|
+ ssc = (tmp & SSC_STATUS_SSC_MASK) >> SSC_STATUS_SSC_SHIFT;
|
||||||
|
+ pll = (tmp & SSC_STATUS_PLL_LOCK_MASK) >> SSC_STATUS_PLL_LOCK_SHIFT;
|
||||||
|
+
|
||||||
|
+ return ssc && pll ? 0 : -EIO;
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
+/**
|
||||||
|
+ * brcm_pcie_set_gen() - Limits operation to a specific generation (1, 2 or 3)
|
||||||
|
+ * @pcie: pointer to the PCIe controller state
|
||||||
|
+ * @gen: PCIe generation to limit the controller's operation to
|
||||||
|
+ */
|
||||||
|
+static void brcm_pcie_set_gen(struct brcm_pcie *pcie, unsigned int gen)
|
||||||
|
+{
|
||||||
|
+ void __iomem *cap_base = pcie->base + BRCM_PCIE_CAP_REGS;
|
||||||
|
+
|
||||||
|
+ u16 lnkctl2 = readw(cap_base + PCI_EXP_LNKCTL2);
|
||||||
|
+ u32 lnkcap = readl(cap_base + PCI_EXP_LNKCAP);
|
||||||
|
+
|
||||||
|
+ lnkcap = (lnkcap & ~PCI_EXP_LNKCAP_SLS) | gen;
|
||||||
|
+ writel(lnkcap, cap_base + PCI_EXP_LNKCAP);
|
||||||
|
+
|
||||||
|
+ lnkctl2 = (lnkctl2 & ~0xf) | gen;
|
||||||
|
+ writew(lnkctl2, cap_base + PCI_EXP_LNKCTL2);
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
+static void brcm_pcie_set_outbound_win(struct brcm_pcie *pcie,
|
||||||
|
+ unsigned int win, u64 phys_addr,
|
||||||
|
+ u64 pcie_addr, u64 size)
|
||||||
|
+{
|
||||||
|
+ void __iomem *base = pcie->base;
|
||||||
|
+ u32 phys_addr_mb_high, limit_addr_mb_high;
|
||||||
|
+ phys_addr_t phys_addr_mb, limit_addr_mb;
|
||||||
|
+ int high_addr_shift;
|
||||||
|
+ u32 tmp;
|
||||||
|
+
|
||||||
|
+ /* Set the base of the pcie_addr window */
|
||||||
|
+ writel(lower_32_bits(pcie_addr), base + PCIE_MEM_WIN0_LO(win));
|
||||||
|
+ writel(upper_32_bits(pcie_addr), base + PCIE_MEM_WIN0_HI(win));
|
||||||
|
+
|
||||||
|
+ /* Write the addr base & limit lower bits (in MBs) */
|
||||||
|
+ phys_addr_mb = phys_addr / SZ_1M;
|
||||||
|
+ limit_addr_mb = (phys_addr + size - 1) / SZ_1M;
|
||||||
|
+
|
||||||
|
+ tmp = readl(base + PCIE_MEM_WIN0_BASE_LIMIT(win));
|
||||||
|
+ u32p_replace_bits(&tmp, phys_addr_mb,
|
||||||
|
+ MEM_WIN0_BASE_LIMIT_BASE_MASK);
|
||||||
|
+ u32p_replace_bits(&tmp, limit_addr_mb,
|
||||||
|
+ MEM_WIN0_BASE_LIMIT_LIMIT_MASK);
|
||||||
|
+ writel(tmp, base + PCIE_MEM_WIN0_BASE_LIMIT(win));
|
||||||
|
+
|
||||||
|
+ /* Write the cpu & limit addr upper bits */
|
||||||
|
+ high_addr_shift = MEM_WIN0_BASE_LIMIT_BASE_HI_SHIFT;
|
||||||
|
+ phys_addr_mb_high = phys_addr_mb >> high_addr_shift;
|
||||||
|
+ tmp = readl(base + PCIE_MEM_WIN0_BASE_HI(win));
|
||||||
|
+ u32p_replace_bits(&tmp, phys_addr_mb_high,
|
||||||
|
+ MEM_WIN0_BASE_HI_BASE_MASK);
|
||||||
|
+ writel(tmp, base + PCIE_MEM_WIN0_BASE_HI(win));
|
||||||
|
+
|
||||||
|
+ limit_addr_mb_high = limit_addr_mb >> high_addr_shift;
|
||||||
|
+ tmp = readl(base + PCIE_MEM_WIN0_LIMIT_HI(win));
|
||||||
|
+ u32p_replace_bits(&tmp, limit_addr_mb_high,
|
||||||
|
+ PCIE_MEM_WIN0_LIMIT_HI_LIMIT_MASK);
|
||||||
|
+ writel(tmp, base + PCIE_MEM_WIN0_LIMIT_HI(win));
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
+static int brcm_pcie_probe(struct udevice *dev)
|
||||||
|
+{
|
||||||
|
+ struct udevice *ctlr = pci_get_controller(dev);
|
||||||
|
+ struct pci_controller *hose = dev_get_uclass_priv(ctlr);
|
||||||
|
+ struct brcm_pcie *pcie = dev_get_priv(dev);
|
||||||
|
+ void __iomem *base = pcie->base;
|
||||||
|
+ bool ssc_good = false;
|
||||||
|
+ int num_out_wins = 0;
|
||||||
|
+ u64 rc_bar2_offset, rc_bar2_size;
|
||||||
|
+ unsigned int scb_size_val;
|
||||||
|
+ int i, ret;
|
||||||
|
+ u16 nlw, cls, lnksta;
|
||||||
|
+ u32 tmp;
|
||||||
|
+
|
||||||
|
+ /*
|
||||||
|
+ * Reset the bridge, assert the fundamental reset. Note for some SoCs,
|
||||||
|
+ * e.g. BCM7278, the fundamental reset should not be asserted here.
|
||||||
|
+ * This will need to be changed when support for other SoCs is added.
|
||||||
|
+ */
|
||||||
|
+ setbits_le32(base + PCIE_RGR1_SW_INIT_1,
|
||||||
|
+ RGR1_SW_INIT_1_INIT_MASK | RGR1_SW_INIT_1_PERST_MASK);
|
||||||
|
+ /*
|
||||||
|
+ * The delay is a safety precaution to preclude the reset signal
|
||||||
|
+ * from looking like a glitch.
|
||||||
|
+ */
|
||||||
|
+ udelay(100);
|
||||||
|
+
|
||||||
|
+ /* Take the bridge out of reset */
|
||||||
|
+ clrbits_le32(base + PCIE_RGR1_SW_INIT_1, RGR1_SW_INIT_1_INIT_MASK);
|
||||||
|
+
|
||||||
|
+ clrbits_le32(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG,
|
||||||
|
+ PCIE_HARD_DEBUG_SERDES_IDDQ_MASK);
|
||||||
|
+
|
||||||
|
+ /* Wait for SerDes to be stable */
|
||||||
|
+ udelay(100);
|
||||||
|
+
|
||||||
|
+ /* Set SCB_MAX_BURST_SIZE, CFG_READ_UR_MODE, SCB_ACCESS_EN */
|
||||||
|
+ clrsetbits_le32(base + PCIE_MISC_MISC_CTRL,
|
||||||
|
+ MISC_CTRL_MAX_BURST_SIZE_MASK,
|
||||||
|
+ MISC_CTRL_SCB_ACCESS_EN_MASK |
|
||||||
|
+ MISC_CTRL_CFG_READ_UR_MODE_MASK |
|
||||||
|
+ MISC_CTRL_MAX_BURST_SIZE_128);
|
||||||
|
+ /*
|
||||||
|
+ * TODO: When support for other SoCs than BCM2711 is added we may
|
||||||
|
+ * need to use the base address and size(s) provided in the dma-ranges
|
||||||
|
+ * property.
|
||||||
|
+ */
|
||||||
|
+ rc_bar2_offset = 0;
|
||||||
|
+ rc_bar2_size = 0xc0000000;
|
||||||
|
+
|
||||||
|
+ tmp = lower_32_bits(rc_bar2_offset);
|
||||||
|
+ u32p_replace_bits(&tmp, brcm_pcie_encode_ibar_size(rc_bar2_size),
|
||||||
|
+ RC_BAR2_CONFIG_LO_SIZE_MASK);
|
||||||
|
+ writel(tmp, base + PCIE_MISC_RC_BAR2_CONFIG_LO);
|
||||||
|
+ writel(upper_32_bits(rc_bar2_offset),
|
||||||
|
+ base + PCIE_MISC_RC_BAR2_CONFIG_HI);
|
||||||
|
+
|
||||||
|
+ scb_size_val = rc_bar2_size ?
|
||||||
|
+ ilog2(rc_bar2_size) - 15 : 0xf; /* 0xf is 1GB */
|
||||||
|
+
|
||||||
|
+ tmp = readl(base + PCIE_MISC_MISC_CTRL);
|
||||||
|
+ u32p_replace_bits(&tmp, scb_size_val,
|
||||||
|
+ MISC_CTRL_SCB0_SIZE_MASK);
|
||||||
|
+ writel(tmp, base + PCIE_MISC_MISC_CTRL);
|
||||||
|
+
|
||||||
|
+ /* Disable the PCIe->GISB memory window (RC_BAR1) */
|
||||||
|
+ clrbits_le32(base + PCIE_MISC_RC_BAR1_CONFIG_LO,
|
||||||
|
+ RC_BAR1_CONFIG_LO_SIZE_MASK);
|
||||||
|
+
|
||||||
|
+ /* Disable the PCIe->SCB memory window (RC_BAR3) */
|
||||||
|
+ clrbits_le32(base + PCIE_MISC_RC_BAR3_CONFIG_LO,
|
||||||
|
+ RC_BAR3_CONFIG_LO_SIZE_MASK);
|
||||||
|
+
|
||||||
|
+ /* Mask all interrupts since we are not handling any yet */
|
||||||
|
+ writel(0xffffffff, base + PCIE_MSI_INTR2_MASK_SET);
|
||||||
|
+
|
||||||
|
+ /* Clear any interrupts we find on boot */
|
||||||
|
+ writel(0xffffffff, base + PCIE_MSI_INTR2_CLR);
|
||||||
|
+
|
||||||
|
+ if (pcie->gen)
|
||||||
|
+ brcm_pcie_set_gen(pcie, pcie->gen);
|
||||||
|
+
|
||||||
|
+ /* Unassert the fundamental reset */
|
||||||
|
+ clrbits_le32(pcie->base + PCIE_RGR1_SW_INIT_1,
|
||||||
|
+ RGR1_SW_INIT_1_PERST_MASK);
|
||||||
|
+
|
||||||
|
+ /* Give the RC/EP time to wake up, before trying to configure RC.
|
||||||
|
+ * Intermittently check status for link-up, up to a total of 100ms.
|
||||||
|
+ */
|
||||||
|
+ for (i = 0; i < 100 && !brcm_pcie_link_up(pcie); i += 5)
|
||||||
|
+ mdelay(5);
|
||||||
|
+
|
||||||
|
+ if (!brcm_pcie_link_up(pcie)) {
|
||||||
|
+ printf("PCIe BRCM: link down\n");
|
||||||
|
+ return -EINVAL;
|
||||||
|
+ }
|
||||||
|
+
|
||||||
|
+ if (!brcm_pcie_rc_mode(pcie)) {
|
||||||
|
+ printf("PCIe misconfigured; is in EP mode\n");
|
||||||
|
+ return -EINVAL;
|
||||||
|
+ }
|
||||||
|
+
|
||||||
|
+ for (i = 0; i < hose->region_count; i++) {
|
||||||
|
+ struct pci_region *reg = &hose->regions[i];
|
||||||
|
+
|
||||||
|
+ if (reg->flags != PCI_REGION_MEM)
|
||||||
|
+ continue;
|
||||||
|
+
|
||||||
|
+ if (num_out_wins >= BRCM_NUM_PCIE_OUT_WINS)
|
||||||
|
+ return -EINVAL;
|
||||||
|
+
|
||||||
|
+ brcm_pcie_set_outbound_win(pcie, num_out_wins, reg->phys_start,
|
||||||
|
+ reg->bus_start, reg->size);
|
||||||
|
+
|
||||||
|
+ num_out_wins++;
|
||||||
|
+ }
|
||||||
|
+
|
||||||
|
+ /*
|
||||||
|
+ * For config space accesses on the RC, show the right class for
|
||||||
|
+ * a PCIe-PCIe bridge (the default setting is to be EP mode).
|
||||||
|
+ */
|
||||||
|
+ clrsetbits_le32(base + PCIE_RC_CFG_PRIV1_ID_VAL3,
|
||||||
|
+ CFG_PRIV1_ID_VAL3_CLASS_CODE_MASK, 0x060400);
|
||||||
|
+
|
||||||
|
+ if (pcie->ssc) {
|
||||||
|
+ ret = brcm_pcie_set_ssc(pcie->base);
|
||||||
|
+ if (!ret)
|
||||||
|
+ ssc_good = true;
|
||||||
|
+ else
|
||||||
|
+ printf("PCIe BRCM: failed attempt to enter SSC mode\n");
|
||||||
|
+ }
|
||||||
|
+
|
||||||
|
+ lnksta = readw(base + BRCM_PCIE_CAP_REGS + PCI_EXP_LNKSTA);
|
||||||
|
+ cls = lnksta & PCI_EXP_LNKSTA_CLS;
|
||||||
|
+ nlw = (lnksta & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT;
|
||||||
|
+
|
||||||
|
+ printf("PCIe BRCM: link up, %s Gbps x%u %s\n", link_speed_to_str(cls),
|
||||||
|
+ nlw, ssc_good ? "(SSC)" : "(!SSC)");
|
||||||
|
+
|
||||||
|
+ /* PCIe->SCB endian mode for BAR */
|
||||||
|
+ clrsetbits_le32(base + PCIE_RC_CFG_VENDOR_SPECIFIC_REG1,
|
||||||
|
+ VENDOR_SPECIFIC_REG1_ENDIAN_MODE_BAR2_MASK,
|
||||||
|
+ VENDOR_SPECIFIC_REG1_LITTLE_ENDIAN);
|
||||||
|
+ /*
|
||||||
|
+ * Refclk from RC should be gated with CLKREQ# input when ASPM L0s,L1
|
||||||
|
+ * is enabled => setting the CLKREQ_DEBUG_ENABLE field to 1.
|
||||||
|
+ */
|
||||||
|
+ setbits_le32(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG,
|
||||||
|
+ PCIE_HARD_DEBUG_CLKREQ_DEBUG_ENABLE_MASK);
|
||||||
|
+
|
||||||
|
+ return 0;
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
+static int brcm_pcie_ofdata_to_platdata(struct udevice *dev)
|
||||||
|
+{
|
||||||
|
+ struct brcm_pcie *pcie = dev_get_priv(dev);
|
||||||
|
+ ofnode dn = dev_ofnode(dev);
|
||||||
|
+ u32 max_link_speed;
|
||||||
|
+ int ret;
|
||||||
|
+
|
||||||
|
+ /* Get the controller base address */
|
||||||
|
+ pcie->base = dev_read_addr_ptr(dev);
|
||||||
|
+ if (!pcie->base)
|
||||||
|
+ return -EINVAL;
|
||||||
|
+
|
||||||
|
+ pcie->ssc = ofnode_read_bool(dn, "brcm,enable-ssc");
|
||||||
|
+
|
||||||
|
+ ret = ofnode_read_u32(dn, "max-link-speed", &max_link_speed);
|
||||||
|
+ if (ret < 0 || max_link_speed > 4)
|
||||||
|
+ pcie->gen = 0;
|
||||||
|
+ else
|
||||||
|
+ pcie->gen = max_link_speed;
|
||||||
|
+
|
||||||
|
+ return 0;
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
+static const struct dm_pci_ops brcm_pcie_ops = {
|
||||||
|
+ .read_config = brcm_pcie_read_config,
|
||||||
|
+ .write_config = brcm_pcie_write_config,
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
+static const struct udevice_id brcm_pcie_ids[] = {
|
||||||
|
+ { .compatible = "brcm,bcm2711-pcie" },
|
||||||
|
+ { }
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
+U_BOOT_DRIVER(pcie_brcm_base) = {
|
||||||
|
+ .name = "pcie_brcm",
|
||||||
|
+ .id = UCLASS_PCI,
|
||||||
|
+ .ops = &brcm_pcie_ops,
|
||||||
|
+ .of_match = brcm_pcie_ids,
|
||||||
|
+ .probe = brcm_pcie_probe,
|
||||||
|
+ .ofdata_to_platdata = brcm_pcie_ofdata_to_platdata,
|
||||||
|
+ .priv_auto_alloc_size = sizeof(struct brcm_pcie),
|
||||||
|
+};
|
||||||
|
diff --git a/drivers/pci/pcie_intel_fpga.c b/drivers/pci/pcie_intel_fpga.c
|
||||||
|
index aa1903e547..9f102c64c6 100644
|
||||||
|
--- a/drivers/pci/pcie_intel_fpga.c
|
||||||
|
+++ b/drivers/pci/pcie_intel_fpga.c
|
||||||
|
@@ -67,9 +67,6 @@
|
||||||
|
#define IS_ROOT_PORT(pcie, bdf) \
|
||||||
|
((PCI_BUS(bdf) == pcie->first_busno) ? true : false)
|
||||||
|
|
||||||
|
-#define PCI_EXP_LNKSTA 18 /* Link Status */
|
||||||
|
-#define PCI_EXP_LNKSTA_DLLLA 0x2000 /* Data Link Layer Link Active */
|
||||||
|
-
|
||||||
|
/**
|
||||||
|
* struct intel_fpga_pcie - Intel FPGA PCIe controller state
|
||||||
|
* @bus: Pointer to the PCI bus
|
||||||
|
diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
|
||||||
|
index 2d968aafb0..f446520528 100644
|
||||||
|
--- a/drivers/usb/host/xhci-mem.c
|
||||||
|
+++ b/drivers/usb/host/xhci-mem.c
|
||||||
|
@@ -395,6 +395,9 @@ static int xhci_scratchpad_alloc(struct xhci_ctrl *ctrl)
|
||||||
|
scratchpad->sp_array[i] = cpu_to_le64(ptr);
|
||||||
|
}
|
||||||
|
|
||||||
|
+ xhci_flush_cache((uintptr_t)scratchpad->sp_array,
|
||||||
|
+ sizeof(u64) * num_sp);
|
||||||
|
+
|
||||||
|
return 0;
|
||||||
|
|
||||||
|
fail_sp3:
|
||||||
|
diff --git a/include/linux/bitfield.h b/include/linux/bitfield.h
|
||||||
|
index 8b9d6fff00..7ad8b088ed 100644
|
||||||
|
--- a/include/linux/bitfield.h
|
||||||
|
+++ b/include/linux/bitfield.h
|
||||||
|
@@ -103,4 +103,56 @@
|
||||||
|
(typeof(_mask))(((_reg) & (_mask)) >> __bf_shf(_mask)); \
|
||||||
|
})
|
||||||
|
|
||||||
|
+extern void __compiletime_error("value doesn't fit into mask")
|
||||||
|
+__field_overflow(void);
|
||||||
|
+extern void __compiletime_error("bad bitfield mask")
|
||||||
|
+__bad_mask(void);
|
||||||
|
+
|
||||||
|
+static __always_inline u64 field_multiplier(u64 field)
|
||||||
|
+{
|
||||||
|
+ if ((field | (field - 1)) & ((field | (field - 1)) + 1))
|
||||||
|
+ __bad_mask();
|
||||||
|
+ return field & -field;
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
+static __always_inline u64 field_mask(u64 field)
|
||||||
|
+{
|
||||||
|
+ return field / field_multiplier(field);
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
+#define ____MAKE_OP(type, base, to, from) \
|
||||||
|
+static __always_inline __##type type##_encode_bits(base v, base field) \
|
||||||
|
+{ \
|
||||||
|
+ if (__builtin_constant_p(v) && (v & ~field_mask(field))) \
|
||||||
|
+ __field_overflow(); \
|
||||||
|
+ return to((v & field_mask(field)) * field_multiplier(field)); \
|
||||||
|
+} \
|
||||||
|
+static __always_inline __##type type##_replace_bits(__##type old, \
|
||||||
|
+ base val, base field) \
|
||||||
|
+{ \
|
||||||
|
+ return (old & ~to(field)) | type##_encode_bits(val, field); \
|
||||||
|
+} \
|
||||||
|
+static __always_inline void type##p_replace_bits(__##type * p, \
|
||||||
|
+ base val, base field) \
|
||||||
|
+{ \
|
||||||
|
+ *p = (*p & ~to(field)) | type##_encode_bits(val, field); \
|
||||||
|
+} \
|
||||||
|
+static __always_inline base type##_get_bits(__##type v, base field) \
|
||||||
|
+{ \
|
||||||
|
+ return (from(v) & field) / field_multiplier(field); \
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
+#define __MAKE_OP(size) \
|
||||||
|
+ ____MAKE_OP(le##size, u##size, cpu_to_le##size, le##size##_to_cpu) \
|
||||||
|
+ ____MAKE_OP(be##size, u##size, cpu_to_be##size, be##size##_to_cpu) \
|
||||||
|
+ ____MAKE_OP(u##size, u##size, ,)
|
||||||
|
+
|
||||||
|
+____MAKE_OP(u8, u8, ,)
|
||||||
|
+__MAKE_OP(16)
|
||||||
|
+__MAKE_OP(32)
|
||||||
|
+__MAKE_OP(64)
|
||||||
|
+
|
||||||
|
+#undef __MAKE_OP
|
||||||
|
+#undef ____MAKE_OP
|
||||||
|
+
|
||||||
|
#endif
|
||||||
|
diff --git a/include/pci.h b/include/pci.h
|
||||||
|
index 19c9244b94..281f353916 100644
|
||||||
|
--- a/include/pci.h
|
||||||
|
+++ b/include/pci.h
|
||||||
|
@@ -471,10 +471,28 @@
|
||||||
|
#define PCI_EA_FIELD_MASK 0xfffffffc /* For Base & Max Offset */
|
||||||
|
|
||||||
|
/* PCI Express capabilities */
|
||||||
|
+#define PCI_EXP_FLAGS 2 /* Capabilities register */
|
||||||
|
+#define PCI_EXP_FLAGS_TYPE 0x00f0 /* Device/Port type */
|
||||||
|
+#define PCI_EXP_TYPE_ROOT_PORT 0x4 /* Root Port */
|
||||||
|
#define PCI_EXP_DEVCAP 4 /* Device capabilities */
|
||||||
|
-#define PCI_EXP_DEVCAP_FLR 0x10000000 /* Function Level Reset */
|
||||||
|
+#define PCI_EXP_DEVCAP_FLR 0x10000000 /* Function Level Reset */
|
||||||
|
#define PCI_EXP_DEVCTL 8 /* Device Control */
|
||||||
|
-#define PCI_EXP_DEVCTL_BCR_FLR 0x8000 /* Bridge Configuration Retry / FLR */
|
||||||
|
+#define PCI_EXP_DEVCTL_BCR_FLR 0x8000 /* Bridge Configuration Retry / FLR */
|
||||||
|
+#define PCI_EXP_LNKCAP 12 /* Link Capabilities */
|
||||||
|
+#define PCI_EXP_LNKCAP_SLS 0x0000000f /* Supported Link Speeds */
|
||||||
|
+#define PCI_EXP_LNKCAP_MLW 0x000003f0 /* Maximum Link Width */
|
||||||
|
+#define PCI_EXP_LNKCAP_DLLLARC 0x00100000 /* Data Link Layer Link Active Reporting Capable */
|
||||||
|
+#define PCI_EXP_LNKSTA 18 /* Link Status */
|
||||||
|
+#define PCI_EXP_LNKSTA_CLS 0x000f /* Current Link Speed */
|
||||||
|
+#define PCI_EXP_LNKSTA_CLS_2_5GB 0x0001 /* Current Link Speed 2.5GT/s */
|
||||||
|
+#define PCI_EXP_LNKSTA_CLS_5_0GB 0x0002 /* Current Link Speed 5.0GT/s */
|
||||||
|
+#define PCI_EXP_LNKSTA_CLS_8_0GB 0x0003 /* Current Link Speed 8.0GT/s */
|
||||||
|
+#define PCI_EXP_LNKSTA_NLW 0x03f0 /* Negotiated Link Width */
|
||||||
|
+#define PCI_EXP_LNKSTA_NLW_SHIFT 4 /* start of NLW mask in link status */
|
||||||
|
+#define PCI_EXP_LNKSTA_DLLLA 0x2000 /* Data Link Layer Link Active */
|
||||||
|
+#define PCI_EXP_SLTCAP 20 /* Slot Capabilities */
|
||||||
|
+#define PCI_EXP_SLTCAP_PSN 0xfff80000 /* Physical Slot Number */
|
||||||
|
+#define PCI_EXP_LNKCTL2 48 /* Link Control 2 */
|
||||||
|
|
||||||
|
/* Include the ID list */
|
||||||
|
|
||||||
|
diff --git a/include/usb/xhci.h b/include/usb/xhci.h
|
||||||
|
index 20e4a21066..1170c0ac69 100644
|
||||||
|
--- a/include/usb/xhci.h
|
||||||
|
+++ b/include/usb/xhci.h
|
||||||
|
@@ -1114,28 +1114,20 @@ static inline void xhci_writel(uint32_t volatile *regs, const unsigned int val)
|
||||||
|
*/
|
||||||
|
static inline u64 xhci_readq(__le64 volatile *regs)
|
||||||
|
{
|
||||||
|
-#if BITS_PER_LONG == 64
|
||||||
|
- return readq(regs);
|
||||||
|
-#else
|
||||||
|
__u32 *ptr = (__u32 *)regs;
|
||||||
|
u64 val_lo = readl(ptr);
|
||||||
|
u64 val_hi = readl(ptr + 1);
|
||||||
|
return val_lo + (val_hi << 32);
|
||||||
|
-#endif
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline void xhci_writeq(__le64 volatile *regs, const u64 val)
|
||||||
|
{
|
||||||
|
-#if BITS_PER_LONG == 64
|
||||||
|
- writeq(val, regs);
|
||||||
|
-#else
|
||||||
|
__u32 *ptr = (__u32 *)regs;
|
||||||
|
u32 val_lo = lower_32_bits(val);
|
||||||
|
/* FIXME */
|
||||||
|
u32 val_hi = upper_32_bits(val);
|
||||||
|
writel(val_lo, ptr);
|
||||||
|
writel(val_hi, ptr + 1);
|
||||||
|
-#endif
|
||||||
|
}
|
||||||
|
|
||||||
|
int xhci_hcd_init(int index, struct xhci_hccr **ret_hccr,
|
||||||
|
--
|
||||||
|
2.26.2
|
||||||
|
|
||||||
@ -1,40 +1,69 @@
|
|||||||
a64-olinuxino
|
a64-olinuxino
|
||||||
avnet_ultra96_rev1
|
amarula_a64_relic
|
||||||
|
bananapi_m2_plus_h5
|
||||||
bananapi_m64
|
bananapi_m64
|
||||||
dragonboard410c
|
dragonboard410c
|
||||||
dragonboard820c
|
dragonboard820c
|
||||||
espresso7420
|
espresso7420
|
||||||
evb-rk3328
|
evb-rk3328
|
||||||
evb-rk3399
|
evb-rk3399
|
||||||
|
ficus-rk3399
|
||||||
firefly-rk3399
|
firefly-rk3399
|
||||||
geekbox
|
geekbox
|
||||||
hikey
|
hikey
|
||||||
|
khadas-edge-captain-rk3399
|
||||||
|
khadas-edge-v-rk3399
|
||||||
|
khadas-edge-rk3399
|
||||||
khadas-vim
|
khadas-vim
|
||||||
libretech-cc
|
khadas-vim2
|
||||||
|
khadas-vim3
|
||||||
|
khadas-vim3l
|
||||||
|
libretech-ac
|
||||||
libretech_all_h3_cc_h5
|
libretech_all_h3_cc_h5
|
||||||
|
libretech_all_h3_it_h5
|
||||||
|
libretech_all_h5_cc_h5
|
||||||
|
libretech-cc
|
||||||
mvebu_espressobin-88f3720
|
mvebu_espressobin-88f3720
|
||||||
mvebu_mcbin-88f8040
|
mvebu_mcbin-88f8040
|
||||||
|
nanopc-t4-rk3399
|
||||||
|
nanopi_a64
|
||||||
nanopi-k2
|
nanopi-k2
|
||||||
|
nanopi-m4-rk3399
|
||||||
nanopi_neo2
|
nanopi_neo2
|
||||||
|
nanopi-neo4-rk3399
|
||||||
nanopi_neo_plus2
|
nanopi_neo_plus2
|
||||||
odroid-c2
|
odroid-c2
|
||||||
|
orangepi_lite2
|
||||||
orangepi_one_plus
|
orangepi_one_plus
|
||||||
orangepi_pc2
|
orangepi_pc2
|
||||||
orangepi_prime
|
orangepi_prime
|
||||||
|
orangepi-rk3399
|
||||||
orangepi_win
|
orangepi_win
|
||||||
orangepi_zero_plus
|
orangepi_zero_plus
|
||||||
orangepi_zero_plus2
|
orangepi_zero_plus2
|
||||||
p212
|
p212
|
||||||
p2371-2180
|
p2371-2180
|
||||||
p2771-0000-500
|
p2771-0000-500
|
||||||
pine_h64
|
p3450-0000
|
||||||
|
pine64-lts
|
||||||
pine64_plus
|
pine64_plus
|
||||||
|
pinebook
|
||||||
|
pinebook-pro-rk3399
|
||||||
|
pinephone
|
||||||
|
pinetab
|
||||||
|
pine_h64
|
||||||
poplar
|
poplar
|
||||||
|
puma-rk3399
|
||||||
|
rock64-rk3328
|
||||||
rock960-rk3399
|
rock960-rk3399
|
||||||
|
rock-pi-4-rk3399
|
||||||
|
rockpro64-rk3399
|
||||||
|
roc-pc-rk3399
|
||||||
rpi_3
|
rpi_3
|
||||||
|
rpi_4
|
||||||
|
rpi_arm64
|
||||||
sopine_baseboard
|
sopine_baseboard
|
||||||
|
teres_i
|
||||||
turris_mox
|
turris_mox
|
||||||
vexpress_aemv8a_dram
|
|
||||||
vexpress_aemv8a_juno
|
vexpress_aemv8a_juno
|
||||||
vexpress_aemv8a_semi
|
xilinx_zynqmp_virt
|
||||||
xilinx_zynqmp_zcu100_revC
|
|
||||||
|
|||||||
@ -0,0 +1,55 @@
|
|||||||
|
From a63eb1bdcd25246b2c637c7846917dc6dc607725 Mon Sep 17 00:00:00 2001
|
||||||
|
From: Peter Robinson <pbrobinson@gmail.com>
|
||||||
|
Date: Thu, 18 Apr 2019 15:44:59 +0100
|
||||||
|
Subject: [PATCH] add BOOTENV_EFI_SET_FDTFILE_FALLBACK for tegra186 because tx2
|
||||||
|
variants
|
||||||
|
|
||||||
|
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
|
||||||
|
---
|
||||||
|
include/config_distro_bootcmd.h | 2 ++
|
||||||
|
include/configs/tegra186-common.h | 7 ++++++-
|
||||||
|
2 files changed, 8 insertions(+), 1 deletion(-)
|
||||||
|
|
||||||
|
diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h
|
||||||
|
index fc0935fa21..fd1c5f5afa 100644
|
||||||
|
--- a/include/config_distro_bootcmd.h
|
||||||
|
+++ b/include/config_distro_bootcmd.h
|
||||||
|
@@ -118,8 +118,10 @@
|
||||||
|
"setenv efi_fdtfile ${soc}-${board}${boardver}.dtb; " \
|
||||||
|
"fi; "
|
||||||
|
#else
|
||||||
|
+#ifndef BOOTENV_EFI_SET_FDTFILE_FALLBACK
|
||||||
|
#define BOOTENV_EFI_SET_FDTFILE_FALLBACK
|
||||||
|
#endif
|
||||||
|
+#endif
|
||||||
|
|
||||||
|
|
||||||
|
#define BOOTENV_SHARED_EFI \
|
||||||
|
diff --git a/include/configs/tegra186-common.h b/include/configs/tegra186-common.h
|
||||||
|
index 5c3ad35c76..d5f21e0907 100644
|
||||||
|
--- a/include/configs/tegra186-common.h
|
||||||
|
+++ b/include/configs/tegra186-common.h
|
||||||
|
@@ -20,6 +20,12 @@
|
||||||
|
/* Generic Interrupt Controller */
|
||||||
|
#define CONFIG_GICV2
|
||||||
|
|
||||||
|
+#undef FDTFILE
|
||||||
|
+#define BOOTENV_EFI_SET_FDTFILE_FALLBACK \
|
||||||
|
+ "if test -z \"${fdtfile}\" -a -n \"${soc}\"; then " \
|
||||||
|
+ "setenv efi_fdtfile ${vendor}/${soc}-${board}${boardver}.dtb; " \
|
||||||
|
+ "fi; "
|
||||||
|
+
|
||||||
|
/*
|
||||||
|
* Memory layout for where various images get loaded by boot scripts:
|
||||||
|
*
|
||||||
|
@@ -49,7 +55,6 @@
|
||||||
|
"scriptaddr=0x90000000\0" \
|
||||||
|
"pxefile_addr_r=0x90100000\0" \
|
||||||
|
"kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
|
||||||
|
- "fdtfile=" FDTFILE "\0" \
|
||||||
|
"fdt_addr_r=0x82000000\0" \
|
||||||
|
"ramdisk_addr_r=0x82100000\0"
|
||||||
|
|
||||||
|
--
|
||||||
|
2.26.0
|
||||||
|
|
||||||
156
arm-boards
156
arm-boards
@ -6,24 +6,26 @@ A20-Olimex-SOM-EVB
|
|||||||
A20-OLinuXino-Lime
|
A20-OLinuXino-Lime
|
||||||
A20-OLinuXino-Lime2
|
A20-OLinuXino-Lime2
|
||||||
A20-OLinuXino_MICRO
|
A20-OLinuXino_MICRO
|
||||||
am335x_boneblack
|
|
||||||
am335x_evm
|
am335x_evm
|
||||||
am335x_evm_usbspl
|
|
||||||
am57xx_evm
|
am57xx_evm
|
||||||
Ampe_A76
|
Ampe_A76
|
||||||
|
apalis_imx6
|
||||||
arndale
|
arndale
|
||||||
Auxtek-T003
|
Auxtek-T003
|
||||||
Auxtek-T004
|
Auxtek-T004
|
||||||
ba10_tv_box
|
ba10_tv_box
|
||||||
Bananapi
|
Bananapi
|
||||||
|
bananapi_m1_plus
|
||||||
bananapi_m2_berry
|
bananapi_m2_berry
|
||||||
|
Bananapi_m2m
|
||||||
|
bananapi_m2_plus_h3
|
||||||
Bananapi_M2_Ultra
|
Bananapi_M2_Ultra
|
||||||
|
bananapi_m2_zero
|
||||||
Bananapro
|
Bananapro
|
||||||
chiliboard
|
chiliboard
|
||||||
CHIP
|
CHIP
|
||||||
Chuwi_V7_CW0825
|
Chuwi_V7_CW0825
|
||||||
clearfog
|
clearfog
|
||||||
cl-som-am57x
|
|
||||||
cm_fx6
|
cm_fx6
|
||||||
Colombus
|
Colombus
|
||||||
colorfly_e708_q1
|
colorfly_e708_q1
|
||||||
@ -37,7 +39,6 @@ db-mv784mp-gp
|
|||||||
difrnce_dit4350
|
difrnce_dit4350
|
||||||
dserve_dsrv9703c
|
dserve_dsrv9703c
|
||||||
evb-rk3229
|
evb-rk3229
|
||||||
fennec-rk3288
|
|
||||||
firefly-rk3288
|
firefly-rk3288
|
||||||
helios4
|
helios4
|
||||||
Hummingbird_A31
|
Hummingbird_A31
|
||||||
@ -86,7 +87,6 @@ novena
|
|||||||
odroid
|
odroid
|
||||||
odroid-xu3
|
odroid-xu3
|
||||||
omap3_beagle
|
omap3_beagle
|
||||||
omap3_pandora
|
|
||||||
omap4_panda
|
omap4_panda
|
||||||
omap5_uevm
|
omap5_uevm
|
||||||
Orangepi
|
Orangepi
|
||||||
@ -115,17 +115,15 @@ rock
|
|||||||
rock2
|
rock2
|
||||||
rpi_2
|
rpi_2
|
||||||
rpi_3_32b
|
rpi_3_32b
|
||||||
|
rpi_4_32b
|
||||||
Sinlinx_SinA31s
|
Sinlinx_SinA31s
|
||||||
Sinovoip_BPI_M2
|
Sinovoip_BPI_M2
|
||||||
Sinovoip_BPI_M2_Plus
|
|
||||||
Sinovoip_BPI_M3
|
Sinovoip_BPI_M3
|
||||||
smdkv310
|
|
||||||
stih410-b2260
|
stih410-b2260
|
||||||
sunxi_Gemei_G9
|
sunxi_Gemei_G9
|
||||||
tbs_a711
|
tbs_a711
|
||||||
tinker-rk3288
|
tinker-rk3288
|
||||||
trimslice
|
trimslice
|
||||||
turris_omnia
|
|
||||||
udoo
|
udoo
|
||||||
udoo_neo
|
udoo_neo
|
||||||
usbarmory
|
usbarmory
|
||||||
@ -138,6 +136,142 @@ warp7
|
|||||||
Wexler_TAB7200
|
Wexler_TAB7200
|
||||||
Wits_Pro_A20_DKT
|
Wits_Pro_A20_DKT
|
||||||
Yones_Toptech_BS1078_V2
|
Yones_Toptech_BS1078_V2
|
||||||
zynq_microzed
|
xilinx_zynq_virtA10-OLinuXino-Lime
|
||||||
zynq_zed
|
A10s-OLinuXino-M
|
||||||
zynq_zybo
|
A13-OLinuXino
|
||||||
|
A13-OLinuXinoM
|
||||||
|
A20-Olimex-SOM-EVB
|
||||||
|
A20-OLinuXino-Lime
|
||||||
|
A20-OLinuXino-Lime2
|
||||||
|
A20-OLinuXino_MICRO
|
||||||
|
am335x_evm
|
||||||
|
am57xx_evm
|
||||||
|
Ampe_A76
|
||||||
|
apalis_imx6
|
||||||
|
arndale
|
||||||
|
Auxtek-T003
|
||||||
|
Auxtek-T004
|
||||||
|
ba10_tv_box
|
||||||
|
Bananapi
|
||||||
|
bananapi_m1_plus
|
||||||
|
bananapi_m2_berry
|
||||||
|
Bananapi_m2m
|
||||||
|
bananapi_m2_plus_h3
|
||||||
|
Bananapi_M2_Ultra
|
||||||
|
bananapi_m2_zero
|
||||||
|
Bananapro
|
||||||
|
chiliboard
|
||||||
|
CHIP
|
||||||
|
Chuwi_V7_CW0825
|
||||||
|
clearfog
|
||||||
|
cm_fx6
|
||||||
|
Colombus
|
||||||
|
colorfly_e708_q1
|
||||||
|
CSQ_CS908
|
||||||
|
Cubieboard
|
||||||
|
Cubieboard2
|
||||||
|
Cubieboard4
|
||||||
|
Cubietruck
|
||||||
|
Cubietruck_plus
|
||||||
|
db-mv784mp-gp
|
||||||
|
difrnce_dit4350
|
||||||
|
dserve_dsrv9703c
|
||||||
|
evb-rk3229
|
||||||
|
firefly-rk3288
|
||||||
|
helios4
|
||||||
|
Hummingbird_A31
|
||||||
|
Hyundai_A7HD
|
||||||
|
i12-tvbox
|
||||||
|
icnova-a20-swac
|
||||||
|
inet1
|
||||||
|
iNet_3F
|
||||||
|
iNet_3W
|
||||||
|
inet86dz
|
||||||
|
iNet_86VS
|
||||||
|
inet97fv2
|
||||||
|
inet98v_rev2
|
||||||
|
inet9f_rev03
|
||||||
|
inet_q972
|
||||||
|
Itead_Ibox_A20
|
||||||
|
jesurun_q5
|
||||||
|
jetson-tk1
|
||||||
|
kc1
|
||||||
|
Lamobo_R1
|
||||||
|
libretech_all_h3_cc_h2_plus
|
||||||
|
Linksprite_pcDuino
|
||||||
|
Linksprite_pcDuino3
|
||||||
|
Linksprite_pcDuino3_Nano
|
||||||
|
liteboard
|
||||||
|
marsboard
|
||||||
|
Marsboard_A10
|
||||||
|
Mele_A1000
|
||||||
|
Mele_A1000G_quad
|
||||||
|
Mele_I7
|
||||||
|
Mele_M3
|
||||||
|
Mele_M5
|
||||||
|
Mele_M9
|
||||||
|
Mini-X
|
||||||
|
mk802
|
||||||
|
mk802_a10s
|
||||||
|
mk802ii
|
||||||
|
MK808C
|
||||||
|
MSI_Primo73
|
||||||
|
MSI_Primo81
|
||||||
|
mx6cuboxi
|
||||||
|
nanopi_m1
|
||||||
|
nanopi_m1_plus
|
||||||
|
nanopi_neo
|
||||||
|
novena
|
||||||
|
odroid
|
||||||
|
odroid-xu3
|
||||||
|
omap3_beagle
|
||||||
|
omap4_panda
|
||||||
|
omap5_uevm
|
||||||
|
Orangepi
|
||||||
|
orangepi_2
|
||||||
|
orangepi_lite
|
||||||
|
Orangepi_mini
|
||||||
|
orangepi_one
|
||||||
|
orangepi_pc
|
||||||
|
orangepi_pc_plus
|
||||||
|
orangepi_plus
|
||||||
|
orangepi_plus2e
|
||||||
|
orangepi_r1
|
||||||
|
orangepi_zero
|
||||||
|
origen
|
||||||
|
paz00
|
||||||
|
polaroid_mid2809pxe04
|
||||||
|
pov_protab2_ips9
|
||||||
|
q8_a13_tablet
|
||||||
|
q8_a23_tablet_800x480
|
||||||
|
q8_a33_tablet_1024x600
|
||||||
|
q8_a33_tablet_800x480
|
||||||
|
qemu_arm
|
||||||
|
r7-tv-dongle
|
||||||
|
riotboard
|
||||||
|
rock
|
||||||
|
rock2
|
||||||
|
rpi_2
|
||||||
|
rpi_3_32b
|
||||||
|
rpi_4_32b
|
||||||
|
Sinlinx_SinA31s
|
||||||
|
Sinovoip_BPI_M2
|
||||||
|
Sinovoip_BPI_M3
|
||||||
|
stih410-b2260
|
||||||
|
sunxi_Gemei_G9
|
||||||
|
tbs_a711
|
||||||
|
tinker-rk3288
|
||||||
|
trimslice
|
||||||
|
udoo
|
||||||
|
udoo_neo
|
||||||
|
usbarmory
|
||||||
|
UTOO_P66
|
||||||
|
vexpress_ca15_tc2
|
||||||
|
vexpress_ca9x4
|
||||||
|
wandboard
|
||||||
|
warp
|
||||||
|
warp7
|
||||||
|
Wexler_TAB7200
|
||||||
|
Wits_Pro_A20_DKT
|
||||||
|
Yones_Toptech_BS1078_V2
|
||||||
|
xilinx_zynq_virt
|
||||||
96
arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch
Normal file
96
arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch
Normal file
@ -0,0 +1,96 @@
|
|||||||
|
From 88725c4d036bab25c900cc3c962fc42d94e0ab69 Mon Sep 17 00:00:00 2001
|
||||||
|
From: Peter Robinson <pbrobinson@gmail.com>
|
||||||
|
Date: Wed, 10 Jun 2020 13:26:43 +0100
|
||||||
|
Subject: [PATCH] arm: rk3399: enable rng on rock960 and firefly3399
|
||||||
|
|
||||||
|
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
|
||||||
|
---
|
||||||
|
arch/arm/dts/rk3399-firefly-u-boot.dtsi | 4 ++++
|
||||||
|
arch/arm/dts/rk3399-rock960-u-boot.dtsi | 4 ++++
|
||||||
|
arch/arm/dts/rk3399-rockpro64-u-boot.dtsi | 4 ++++
|
||||||
|
configs/firefly-rk3399_defconfig | 2 ++
|
||||||
|
configs/rock960-rk3399_defconfig | 2 ++
|
||||||
|
configs/rockpro64-rk3399_defconfig | 2 ++
|
||||||
|
6 files changed, 18 insertions(+)
|
||||||
|
|
||||||
|
diff --git a/arch/arm/dts/rk3399-firefly-u-boot.dtsi b/arch/arm/dts/rk3399-firefly-u-boot.dtsi
|
||||||
|
index 38e0897db9..a6c7b913da 100644
|
||||||
|
--- a/arch/arm/dts/rk3399-firefly-u-boot.dtsi
|
||||||
|
+++ b/arch/arm/dts/rk3399-firefly-u-boot.dtsi
|
||||||
|
@@ -11,3 +11,7 @@
|
||||||
|
u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
+
|
||||||
|
+&rng {
|
||||||
|
+ status = "okay";
|
||||||
|
+};
|
||||||
|
diff --git a/arch/arm/dts/rk3399-rock960-u-boot.dtsi b/arch/arm/dts/rk3399-rock960-u-boot.dtsi
|
||||||
|
index c190089e26..08292dbd39 100644
|
||||||
|
--- a/arch/arm/dts/rk3399-rock960-u-boot.dtsi
|
||||||
|
+++ b/arch/arm/dts/rk3399-rock960-u-boot.dtsi
|
||||||
|
@@ -24,3 +24,7 @@
|
||||||
|
};
|
||||||
|
|
||||||
|
};
|
||||||
|
+
|
||||||
|
+&rng {
|
||||||
|
+ status = "okay";
|
||||||
|
+};
|
||||||
|
diff --git a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
|
||||||
|
index bac09df4a3..38fe3bb0ec 100644
|
||||||
|
--- a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
|
||||||
|
+++ b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
|
||||||
|
@@ -25,6 +25,10 @@
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
+&rng {
|
||||||
|
+ status = "okay";
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
&vdd_center {
|
||||||
|
regulator-min-microvolt = <950000>;
|
||||||
|
regulator-max-microvolt = <950000>;
|
||||||
|
diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
|
||||||
|
index 5bb54f5835..551687d6d0 100644
|
||||||
|
--- a/configs/firefly-rk3399_defconfig
|
||||||
|
+++ b/configs/firefly-rk3399_defconfig
|
||||||
|
@@ -35,6 +35,8 @@ CONFIG_MMC_DW=y
|
||||||
|
CONFIG_MMC_DW_ROCKCHIP=y
|
||||||
|
CONFIG_MMC_SDHCI=y
|
||||||
|
CONFIG_MMC_SDHCI_ROCKCHIP=y
|
||||||
|
+CONFIG_DM_RNG=y
|
||||||
|
+CONFIG_RNG_ROCKCHIP=y
|
||||||
|
CONFIG_SF_DEFAULT_SPEED=20000000
|
||||||
|
CONFIG_DM_ETH=y
|
||||||
|
CONFIG_ETH_DESIGNWARE=y
|
||||||
|
diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig
|
||||||
|
index 59a85c78a1..f31cb92884 100644
|
||||||
|
--- a/configs/rock960-rk3399_defconfig
|
||||||
|
+++ b/configs/rock960-rk3399_defconfig
|
||||||
|
@@ -37,6 +37,8 @@ CONFIG_MMC_DW_ROCKCHIP=y
|
||||||
|
CONFIG_MMC_SDHCI=y
|
||||||
|
CONFIG_MMC_SDHCI_SDMA=y
|
||||||
|
CONFIG_MMC_SDHCI_ROCKCHIP=y
|
||||||
|
+CONFIG_DM_RNG=y
|
||||||
|
+CONFIG_RNG_ROCKCHIP=y
|
||||||
|
CONFIG_DM_ETH=y
|
||||||
|
CONFIG_NVME=y
|
||||||
|
CONFIG_PCI=y
|
||||||
|
diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig
|
||||||
|
index 807747485a..f778f0b640 100644
|
||||||
|
--- a/configs/rockpro64-rk3399_defconfig
|
||||||
|
+++ b/configs/rockpro64-rk3399_defconfig
|
||||||
|
@@ -40,6 +40,8 @@ CONFIG_MMC_DW=y
|
||||||
|
CONFIG_MMC_DW_ROCKCHIP=y
|
||||||
|
CONFIG_MMC_SDHCI=y
|
||||||
|
CONFIG_MMC_SDHCI_ROCKCHIP=y
|
||||||
|
+CONFIG_DM_RNG=y
|
||||||
|
+CONFIG_RNG_ROCKCHIP=y
|
||||||
|
CONFIG_SPI_FLASH_GIGADEVICE=y
|
||||||
|
CONFIG_DM_ETH=y
|
||||||
|
CONFIG_ETH_DESIGNWARE=y
|
||||||
|
--
|
||||||
|
2.26.2
|
||||||
|
|
||||||
113
arm-tegra-define-fdtfile-option-for-distro-boot.patch
Normal file
113
arm-tegra-define-fdtfile-option-for-distro-boot.patch
Normal file
@ -0,0 +1,113 @@
|
|||||||
|
From c3332b102d2ddae01710ae8f4393a2a18a3a1bb3 Mon Sep 17 00:00:00 2001
|
||||||
|
From: Peter Robinson <pbrobinson@gmail.com>
|
||||||
|
Date: Tue, 12 May 2020 08:19:48 +0100
|
||||||
|
Subject: [PATCH] arm: tegra: define fdtfile option for distro boot
|
||||||
|
|
||||||
|
For booting via UEFI we need to define the fdtfile option so
|
||||||
|
bootefi has the option to load a fdtfile from disk. For arm64
|
||||||
|
the kernel dtb is located in a vendor directory so we define
|
||||||
|
that as nvidia for that architecture.
|
||||||
|
|
||||||
|
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
|
||||||
|
---
|
||||||
|
include/configs/tegra-common.h | 6 ++++++
|
||||||
|
include/configs/tegra114-common.h | 1 +
|
||||||
|
include/configs/tegra124-common.h | 1 +
|
||||||
|
include/configs/tegra186-common.h | 1 +
|
||||||
|
include/configs/tegra20-common.h | 1 +
|
||||||
|
include/configs/tegra210-common.h | 1 +
|
||||||
|
include/configs/tegra30-common.h | 1 +
|
||||||
|
7 files changed, 12 insertions(+)
|
||||||
|
|
||||||
|
diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h
|
||||||
|
index 175c55c613..8026f4b32e 100644
|
||||||
|
--- a/include/configs/tegra-common.h
|
||||||
|
+++ b/include/configs/tegra-common.h
|
||||||
|
@@ -52,6 +52,12 @@
|
||||||
|
/* Boot Argument Buffer Size */
|
||||||
|
#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
|
||||||
|
|
||||||
|
+#ifdef CONFIG_ARM64
|
||||||
|
+#define FDTFILE "nvidia/" CONFIG_DEFAULT_DEVICE_TREE ".dtb"
|
||||||
|
+#else
|
||||||
|
+#define FDTFILE CONFIG_DEFAULT_DEVICE_TREE ".dtb"
|
||||||
|
+#endif
|
||||||
|
+
|
||||||
|
/*-----------------------------------------------------------------------
|
||||||
|
* Physical Memory Map
|
||||||
|
*/
|
||||||
|
diff --git a/include/configs/tegra114-common.h b/include/configs/tegra114-common.h
|
||||||
|
index d3a7045697..9d751b6740 100644
|
||||||
|
--- a/include/configs/tegra114-common.h
|
||||||
|
+++ b/include/configs/tegra114-common.h
|
||||||
|
@@ -50,6 +50,7 @@
|
||||||
|
"scriptaddr=0x90000000\0" \
|
||||||
|
"pxefile_addr_r=0x90100000\0" \
|
||||||
|
"kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
|
||||||
|
+ "fdtfile=" FDTFILE "\0" \
|
||||||
|
"fdt_addr_r=0x83000000\0" \
|
||||||
|
"ramdisk_addr_r=0x83100000\0"
|
||||||
|
|
||||||
|
diff --git a/include/configs/tegra124-common.h b/include/configs/tegra124-common.h
|
||||||
|
index 522993b958..0eb8f92809 100644
|
||||||
|
--- a/include/configs/tegra124-common.h
|
||||||
|
+++ b/include/configs/tegra124-common.h
|
||||||
|
@@ -52,6 +52,7 @@
|
||||||
|
"scriptaddr=0x90000000\0" \
|
||||||
|
"pxefile_addr_r=0x90100000\0" \
|
||||||
|
"kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
|
||||||
|
+ "fdtfile=" FDTFILE "\0" \
|
||||||
|
"fdt_addr_r=0x83000000\0" \
|
||||||
|
"ramdisk_addr_r=0x83100000\0"
|
||||||
|
|
||||||
|
diff --git a/include/configs/tegra186-common.h b/include/configs/tegra186-common.h
|
||||||
|
index b4936cc731..5c3ad35c76 100644
|
||||||
|
--- a/include/configs/tegra186-common.h
|
||||||
|
+++ b/include/configs/tegra186-common.h
|
||||||
|
@@ -49,6 +49,7 @@
|
||||||
|
"scriptaddr=0x90000000\0" \
|
||||||
|
"pxefile_addr_r=0x90100000\0" \
|
||||||
|
"kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
|
||||||
|
+ "fdtfile=" FDTFILE "\0" \
|
||||||
|
"fdt_addr_r=0x82000000\0" \
|
||||||
|
"ramdisk_addr_r=0x82100000\0"
|
||||||
|
|
||||||
|
diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h
|
||||||
|
index 1e31d82574..fdd8996955 100644
|
||||||
|
--- a/include/configs/tegra20-common.h
|
||||||
|
+++ b/include/configs/tegra20-common.h
|
||||||
|
@@ -51,6 +51,7 @@
|
||||||
|
"scriptaddr=0x10000000\0" \
|
||||||
|
"pxefile_addr_r=0x10100000\0" \
|
||||||
|
"kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
|
||||||
|
+ "fdtfile=" FDTFILE "\0" \
|
||||||
|
"fdt_addr_r=0x03000000\0" \
|
||||||
|
"ramdisk_addr_r=0x03100000\0"
|
||||||
|
|
||||||
|
diff --git a/include/configs/tegra210-common.h b/include/configs/tegra210-common.h
|
||||||
|
index 1b8e94b60c..2226effe16 100644
|
||||||
|
--- a/include/configs/tegra210-common.h
|
||||||
|
+++ b/include/configs/tegra210-common.h
|
||||||
|
@@ -46,6 +46,7 @@
|
||||||
|
"scriptaddr=0x90000000\0" \
|
||||||
|
"pxefile_addr_r=0x90100000\0" \
|
||||||
|
"kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
|
||||||
|
+ "fdtfile=" FDTFILE "\0" \
|
||||||
|
"fdt_addr_r=0x83000000\0" \
|
||||||
|
"ramdisk_addr_r=0x83200000\0"
|
||||||
|
|
||||||
|
diff --git a/include/configs/tegra30-common.h b/include/configs/tegra30-common.h
|
||||||
|
index 54bc6756ab..6c5dc24b26 100644
|
||||||
|
--- a/include/configs/tegra30-common.h
|
||||||
|
+++ b/include/configs/tegra30-common.h
|
||||||
|
@@ -47,6 +47,7 @@
|
||||||
|
"scriptaddr=0x90000000\0" \
|
||||||
|
"pxefile_addr_r=0x90100000\0" \
|
||||||
|
"kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
|
||||||
|
+ "fdtfile=" FDTFILE "\0" \
|
||||||
|
"fdt_addr_r=0x83000000\0" \
|
||||||
|
"ramdisk_addr_r=0x83100000\0"
|
||||||
|
|
||||||
|
--
|
||||||
|
2.26.2
|
||||||
|
|
||||||
@ -1,17 +1,17 @@
|
|||||||
From fbd0bffb20ca5edd21bbeb7cc20e24d091ab4280 Mon Sep 17 00:00:00 2001
|
From 8b0274a733cd1ce39ad9ad18e1bd8efdd02a40b7 Mon Sep 17 00:00:00 2001
|
||||||
From: Rob Clark <robdclark@gmail.com>
|
From: Rob Clark <robdclark@gmail.com>
|
||||||
Date: Wed, 21 Jun 2017 14:21:15 -0400
|
Date: Wed, 21 Jun 2017 14:21:15 -0400
|
||||||
Subject: [PATCH 1/4] WIP: fix usb
|
Subject: [PATCH 1/3] WIP: fix usb
|
||||||
|
|
||||||
---
|
---
|
||||||
common/usb_storage.c | 4 ++--
|
common/usb_storage.c | 4 ++--
|
||||||
1 file changed, 2 insertions(+), 2 deletions(-)
|
1 file changed, 2 insertions(+), 2 deletions(-)
|
||||||
|
|
||||||
diff --git a/common/usb_storage.c b/common/usb_storage.c
|
diff --git a/common/usb_storage.c b/common/usb_storage.c
|
||||||
index a91b1c0d2f..caea87a09f 100644
|
index d92ebb6eb19..9df3c3daaf4 100644
|
||||||
--- a/common/usb_storage.c
|
--- a/common/usb_storage.c
|
||||||
+++ b/common/usb_storage.c
|
+++ b/common/usb_storage.c
|
||||||
@@ -1018,7 +1018,7 @@ static int usb_request_sense(struct scsi_cmd *srb, struct us_data *ss)
|
@@ -1016,7 +1016,7 @@ static int usb_request_sense(struct scsi_cmd *srb, struct us_data *ss)
|
||||||
|
|
||||||
static int usb_test_unit_ready(struct scsi_cmd *srb, struct us_data *ss)
|
static int usb_test_unit_ready(struct scsi_cmd *srb, struct us_data *ss)
|
||||||
{
|
{
|
||||||
@ -20,7 +20,7 @@ index a91b1c0d2f..caea87a09f 100644
|
|||||||
|
|
||||||
do {
|
do {
|
||||||
memset(&srb->cmd[0], 0, 12);
|
memset(&srb->cmd[0], 0, 12);
|
||||||
@@ -1041,7 +1041,7 @@ static int usb_test_unit_ready(struct scsi_cmd *srb, struct us_data *ss)
|
@@ -1039,7 +1039,7 @@ static int usb_test_unit_ready(struct scsi_cmd *srb, struct us_data *ss)
|
||||||
if ((srb->sense_buf[2] == 0x02) &&
|
if ((srb->sense_buf[2] == 0x02) &&
|
||||||
(srb->sense_buf[12] == 0x3a))
|
(srb->sense_buf[12] == 0x3a))
|
||||||
return -1;
|
return -1;
|
||||||
@ -30,12 +30,12 @@ index a91b1c0d2f..caea87a09f 100644
|
|||||||
|
|
||||||
return -1;
|
return -1;
|
||||||
--
|
--
|
||||||
2.14.3
|
2.19.1
|
||||||
|
|
||||||
From d1b25b8d6461c5278228d657de9c24e0979e4b9d Mon Sep 17 00:00:00 2001
|
From 7bf41d74ca9d58bc2243b7688f8987c1d373ea56 Mon Sep 17 00:00:00 2001
|
||||||
From: Rob Clark <robdclark@gmail.com>
|
From: Rob Clark <robdclark@gmail.com>
|
||||||
Date: Mon, 3 Jul 2017 08:34:37 -0400
|
Date: Mon, 3 Jul 2017 08:34:37 -0400
|
||||||
Subject: [PATCH 2/4] HACK: disable emmc
|
Subject: [PATCH 2/3] HACK: disable emmc
|
||||||
|
|
||||||
Hitting some timeout which makes boot take much longer. And
|
Hitting some timeout which makes boot take much longer. And
|
||||||
uefi/boot/rootfs partitions will be on sd-card or usb disk, etc,
|
uefi/boot/rootfs partitions will be on sd-card or usb disk, etc,
|
||||||
@ -45,18 +45,18 @@ so we can just ignore emmc.
|
|||||||
1 file changed, 2 insertions(+)
|
1 file changed, 2 insertions(+)
|
||||||
|
|
||||||
diff --git a/arch/arm/dts/dragonboard410c.dts b/arch/arm/dts/dragonboard410c.dts
|
diff --git a/arch/arm/dts/dragonboard410c.dts b/arch/arm/dts/dragonboard410c.dts
|
||||||
index 5ccfe7f8c8..9e2d3f5d9b 100644
|
index fa348bc621e..bfe7f15d5ed 100644
|
||||||
--- a/arch/arm/dts/dragonboard410c.dts
|
--- a/arch/arm/dts/dragonboard410c.dts
|
||||||
+++ b/arch/arm/dts/dragonboard410c.dts
|
+++ b/arch/arm/dts/dragonboard410c.dts
|
||||||
@@ -67,6 +67,7 @@
|
@@ -106,6 +106,7 @@
|
||||||
reg = <0x78d9000 0x400>;
|
#phy-cells = <0>;
|
||||||
};
|
};
|
||||||
|
|
||||||
+/*
|
+/*
|
||||||
sdhci@07824000 {
|
sdhci@07824000 {
|
||||||
compatible = "qcom,sdhci-msm-v4";
|
compatible = "qcom,sdhci-msm-v4";
|
||||||
reg = <0x7824900 0x11c 0x7824000 0x800>;
|
reg = <0x7824900 0x11c 0x7824000 0x800>;
|
||||||
@@ -76,6 +77,7 @@
|
@@ -115,6 +116,7 @@
|
||||||
clock = <&clkc 0>;
|
clock = <&clkc 0>;
|
||||||
clock-frequency = <100000000>;
|
clock-frequency = <100000000>;
|
||||||
};
|
};
|
||||||
@ -65,22 +65,23 @@ index 5ccfe7f8c8..9e2d3f5d9b 100644
|
|||||||
sdhci@07864000 {
|
sdhci@07864000 {
|
||||||
compatible = "qcom,sdhci-msm-v4";
|
compatible = "qcom,sdhci-msm-v4";
|
||||||
--
|
--
|
||||||
2.14.3
|
2.19.1
|
||||||
From 6baac1d73a20f880cb91f3bc03fe4f9cf88c61f6 Mon Sep 17 00:00:00 2001
|
|
||||||
|
From 871fe802cf3ab593b9332c4f36ab2b3f179d51ae Mon Sep 17 00:00:00 2001
|
||||||
From: Peter Robinson <pbrobinson@gmail.com>
|
From: Peter Robinson <pbrobinson@gmail.com>
|
||||||
Date: Tue, 4 Sep 2018 12:21:59 +0100
|
Date: Tue, 4 Sep 2018 12:21:59 +0100
|
||||||
Subject: [PATCH] add options for dm410c config
|
Subject: [PATCH 3/3] add options for dm410c config
|
||||||
|
|
||||||
---
|
---
|
||||||
configs/dragonboard410c_defconfig | 10 ++++++++++
|
configs/dragonboard410c_defconfig | 10 ++++++++++
|
||||||
1 file changed, 10 insertions(+)
|
1 file changed, 10 insertions(+)
|
||||||
|
|
||||||
diff --git a/configs/dragonboard410c_defconfig b/configs/dragonboard410c_defconfig
|
diff --git a/configs/dragonboard410c_defconfig b/configs/dragonboard410c_defconfig
|
||||||
index 96a831443a..d167c765b1 100644
|
index a55abaf8df5..4ece0cafbe4 100644
|
||||||
--- a/configs/dragonboard410c_defconfig
|
--- a/configs/dragonboard410c_defconfig
|
||||||
+++ b/configs/dragonboard410c_defconfig
|
+++ b/configs/dragonboard410c_defconfig
|
||||||
@@ -6,6 +6,8 @@ CONFIG_DISTRO_DEFAULTS=y
|
@@ -7,6 +7,8 @@ CONFIG_NR_DRAM_BANKS=1
|
||||||
CONFIG_NR_DRAM_BANKS=1
|
# CONFIG_ANDROID_BOOT_IMAGE is not set
|
||||||
CONFIG_FIT=y
|
CONFIG_FIT=y
|
||||||
CONFIG_OF_BOARD_SETUP=y
|
CONFIG_OF_BOARD_SETUP=y
|
||||||
+CONFIG_FAT_WRITE=y
|
+CONFIG_FAT_WRITE=y
|
||||||
@ -88,7 +89,7 @@ index 96a831443a..d167c765b1 100644
|
|||||||
CONFIG_MISC_INIT_R=y
|
CONFIG_MISC_INIT_R=y
|
||||||
# CONFIG_DISPLAY_CPUINFO is not set
|
# CONFIG_DISPLAY_CPUINFO is not set
|
||||||
# CONFIG_DISPLAY_BOARDINFO is not set
|
# CONFIG_DISPLAY_BOARDINFO is not set
|
||||||
@@ -35,6 +37,13 @@ CONFIG_DM_PMIC=y
|
@@ -41,6 +43,13 @@ CONFIG_DM_PMIC=y
|
||||||
CONFIG_PMIC_PM8916=y
|
CONFIG_PMIC_PM8916=y
|
||||||
CONFIG_MSM_SERIAL=y
|
CONFIG_MSM_SERIAL=y
|
||||||
CONFIG_SPMI_MSM=y
|
CONFIG_SPMI_MSM=y
|
||||||
@ -102,7 +103,7 @@ index 96a831443a..d167c765b1 100644
|
|||||||
CONFIG_USB=y
|
CONFIG_USB=y
|
||||||
CONFIG_DM_USB=y
|
CONFIG_DM_USB=y
|
||||||
CONFIG_USB_EHCI_HCD=y
|
CONFIG_USB_EHCI_HCD=y
|
||||||
@@ -46,5 +55,6 @@ CONFIG_USB_HOST_ETHER=y
|
@@ -57,5 +66,6 @@ CONFIG_USB_HOST_ETHER=y
|
||||||
CONFIG_USB_ETHER_ASIX=y
|
CONFIG_USB_ETHER_ASIX=y
|
||||||
CONFIG_USB_ETHER_ASIX88179=y
|
CONFIG_USB_ETHER_ASIX88179=y
|
||||||
CONFIG_USB_ETHER_MCS7830=y
|
CONFIG_USB_ETHER_MCS7830=y
|
||||||
@ -110,5 +111,5 @@ index 96a831443a..d167c765b1 100644
|
|||||||
CONFIG_USB_ETHER_SMSC95XX=y
|
CONFIG_USB_ETHER_SMSC95XX=y
|
||||||
CONFIG_OF_LIBFDT_OVERLAY=y
|
CONFIG_OF_LIBFDT_OVERLAY=y
|
||||||
--
|
--
|
||||||
2.19.0.rc0
|
2.19.1
|
||||||
|
|
||||||
|
|||||||
@ -1,772 +0,0 @@
|
|||||||
From patchwork Tue Aug 21 17:28:16 2018
|
|
||||||
Content-Type: text/plain; charset="utf-8"
|
|
||||||
MIME-Version: 1.0
|
|
||||||
Content-Transfer-Encoding: 7bit
|
|
||||||
Subject: [U-Boot,v2,1/2] arm: dts: Add Rock960 devicetree support
|
|
||||||
X-Patchwork-Submitter: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
|
|
||||||
X-Patchwork-Id: 960637
|
|
||||||
Message-Id: <20180821172817.26463-2-manivannan.sadhasivam@linaro.org>
|
|
||||||
To: sjg@chromium.org,
|
|
||||||
philipp.tomsich@theobroma-systems.com
|
|
||||||
Cc: tom@vamrs.com, amit.kucheria@linaro.org, dev@vamrs.com,
|
|
||||||
u-boot@lists.denx.de,
|
|
||||||
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>,
|
|
||||||
stephen@vamrs.com
|
|
||||||
Date: Tue, 21 Aug 2018 22:58:16 +0530
|
|
||||||
From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
|
|
||||||
List-Id: U-Boot discussion <u-boot.lists.denx.de>
|
|
||||||
|
|
||||||
Add devicetree support for Vamrs Limited Rock960. This board is one of
|
|
||||||
the 96Boards Consumer Edition platform.
|
|
||||||
|
|
||||||
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
|
|
||||||
---
|
|
||||||
|
|
||||||
Changes in v2:
|
|
||||||
|
|
||||||
* Added missing DTB entry in arch/arm/dts/Makefile
|
|
||||||
|
|
||||||
arch/arm/dts/Makefile | 1 +
|
|
||||||
arch/arm/dts/rk3399-rock960.dts | 348 ++++++++++++++++++++++++++++++++
|
|
||||||
2 files changed, 349 insertions(+)
|
|
||||||
create mode 100644 arch/arm/dts/rk3399-rock960.dts
|
|
||||||
|
|
||||||
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
|
|
||||||
index ebfa2272627..9b891826b73 100644
|
|
||||||
--- a/arch/arm/dts/Makefile
|
|
||||||
+++ b/arch/arm/dts/Makefile
|
|
||||||
@@ -51,6 +51,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
|
|
||||||
rk3399-puma-ddr1333.dtb \
|
|
||||||
rk3399-puma-ddr1600.dtb \
|
|
||||||
rk3399-puma-ddr1866.dtb \
|
|
||||||
+ rk3399-rock960.dtb \
|
|
||||||
rv1108-evb.dtb
|
|
||||||
dtb-$(CONFIG_ARCH_MESON) += \
|
|
||||||
meson-gxbb-nanopi-k2.dtb \
|
|
||||||
diff --git a/arch/arm/dts/rk3399-rock960.dts b/arch/arm/dts/rk3399-rock960.dts
|
|
||||||
new file mode 100644
|
|
||||||
index 00000000000..8662548e642
|
|
||||||
--- /dev/null
|
|
||||||
+++ b/arch/arm/dts/rk3399-rock960.dts
|
|
||||||
@@ -0,0 +1,348 @@
|
|
||||||
+// SPDX-License-Identifier: GPL-2.0+
|
|
||||||
+/*
|
|
||||||
+ * Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
|
|
||||||
+ */
|
|
||||||
+
|
|
||||||
+/dts-v1/;
|
|
||||||
+#include <dt-bindings/pwm/pwm.h>
|
|
||||||
+#include <dt-bindings/pinctrl/rockchip.h>
|
|
||||||
+#include "rk3399.dtsi"
|
|
||||||
+#include "rk3399-sdram-lpddr3-4GB-1600.dtsi"
|
|
||||||
+
|
|
||||||
+/ {
|
|
||||||
+ model = "Vamrs Limited Rock960 96Board";
|
|
||||||
+ compatible = "rockchip,rk3399-rock960", "rockchip,rk3399";
|
|
||||||
+
|
|
||||||
+ chosen {
|
|
||||||
+ stdout-path = &uart2;
|
|
||||||
+ u-boot,spl-boot-order = \
|
|
||||||
+ &sdhci, &sdmmc;
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ vccsys: vccsys {
|
|
||||||
+ compatible = "regulator-fixed";
|
|
||||||
+ regulator-name = "vccsys";
|
|
||||||
+ regulator-boot-on;
|
|
||||||
+ regulator-always-on;
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ vcc3v3_sys: vcc3v3-sys {
|
|
||||||
+ compatible = "regulator-fixed";
|
|
||||||
+ regulator-name = "vcc3v3_sys";
|
|
||||||
+ regulator-always-on;
|
|
||||||
+ regulator-boot-on;
|
|
||||||
+ regulator-min-microvolt = <3300000>;
|
|
||||||
+ regulator-max-microvolt = <3300000>;
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ vcc5v0_sys: vcc5v0-sys {
|
|
||||||
+ compatible = "regulator-fixed";
|
|
||||||
+ regulator-name = "vcc5v0_sys";
|
|
||||||
+ regulator-always-on;
|
|
||||||
+ regulator-boot-on;
|
|
||||||
+ regulator-min-microvolt = <5000000>;
|
|
||||||
+ regulator-max-microvolt = <5000000>;
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ vcc5v0_usb: vcc5v0-usb {
|
|
||||||
+ compatible = "regulator-fixed";
|
|
||||||
+ regulator-name = "vcc5v0_usb";
|
|
||||||
+ regulator-always-on;
|
|
||||||
+ regulator-boot-on;
|
|
||||||
+ regulator-min-microvolt = <5000000>;
|
|
||||||
+ regulator-max-microvolt = <5000000>;
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ vcc5v0_host0: vcc5v0-host0-regulator {
|
|
||||||
+ compatible = "regulator-fixed";
|
|
||||||
+ regulator-name = "vcc5v0_host0";
|
|
||||||
+ gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ vcc5v0_host1: vcc5v0-host1-regulator {
|
|
||||||
+ compatible = "regulator-fixed";
|
|
||||||
+ regulator-name = "vcc5v0_host1";
|
|
||||||
+ gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ vcc5v0_host2: vcc5v0-host2-regulator {
|
|
||||||
+ compatible = "regulator-fixed";
|
|
||||||
+ regulator-name = "vcc5v0_host2";
|
|
||||||
+ gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ vbus_typec: vbus-typec-regulator {
|
|
||||||
+ compatible = "regulator-fixed";
|
|
||||||
+ regulator-name = "vbus_typec";
|
|
||||||
+ gpio = <&gpio1 3 GPIO_ACTIVE_HIGH>;
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ vdd_log: vdd-log {
|
|
||||||
+ compatible = "pwm-regulator";
|
|
||||||
+ pwms = <&pwm2 0 25000 1>;
|
|
||||||
+ regulator-name = "vdd_log";
|
|
||||||
+ regulator-always-on;
|
|
||||||
+ regulator-boot-on;
|
|
||||||
+ regulator-min-microvolt = <800000>;
|
|
||||||
+ regulator-max-microvolt = <1400000>;
|
|
||||||
+ regulator-init-microvolt = <900000>;
|
|
||||||
+ };
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&emmc_phy {
|
|
||||||
+ status = "okay";
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&pwm0 {
|
|
||||||
+ status = "okay";
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&pwm2 {
|
|
||||||
+ status = "okay";
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&pwm3 {
|
|
||||||
+ status = "okay";
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&saradc {
|
|
||||||
+ status = "okay";
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&sdmmc {
|
|
||||||
+ u-boot,dm-pre-reloc;
|
|
||||||
+ bus-width = <4>;
|
|
||||||
+ status = "okay";
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&sdhci {
|
|
||||||
+ bus-width = <8>;
|
|
||||||
+ mmc-hs400-1_8v;
|
|
||||||
+ mmc-hs400-enhanced-strobe;
|
|
||||||
+ non-removable;
|
|
||||||
+ status = "okay";
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&uart2 {
|
|
||||||
+ status = "okay";
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&i2c0 {
|
|
||||||
+ status = "okay";
|
|
||||||
+ clock-frequency = <400000>;
|
|
||||||
+ i2c-scl-falling-time-ns = <50>;
|
|
||||||
+ i2c-scl-rising-time-ns = <100>;
|
|
||||||
+ u-boot,dm-pre-reloc;
|
|
||||||
+
|
|
||||||
+ rk808: pmic@1b {
|
|
||||||
+ compatible = "rockchip,rk808";
|
|
||||||
+ reg = <0x1b>;
|
|
||||||
+ interrupt-parent = <&gpio1>;
|
|
||||||
+ interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
|
|
||||||
+ #clock-cells = <1>;
|
|
||||||
+ clock-output-names = "rtc_clko_soc", "rtc_clko_wifi";
|
|
||||||
+ pinctrl-names = "default";
|
|
||||||
+ pinctrl-0 = <&pmic_int_l>;
|
|
||||||
+ rockchip,system-power-controller;
|
|
||||||
+ wakeup-source;
|
|
||||||
+
|
|
||||||
+ vcc1-supply = <&vcc5v0_sys>;
|
|
||||||
+ vcc2-supply = <&vcc5v0_sys>;
|
|
||||||
+ vcc3-supply = <&vcc5v0_sys>;
|
|
||||||
+ vcc4-supply = <&vcc5v0_sys>;
|
|
||||||
+ vcc6-supply = <&vcc5v0_sys>;
|
|
||||||
+ vcc7-supply = <&vcc5v0_sys>;
|
|
||||||
+ vcc8-supply = <&vcc5v0_sys>;
|
|
||||||
+ vcc9-supply = <&vcc5v0_sys>;
|
|
||||||
+ vcc10-supply = <&vcc5v0_sys>;
|
|
||||||
+ vcc11-supply = <&vcc5v0_sys>;
|
|
||||||
+ vcc12-supply = <&vcc3v3_sys>;
|
|
||||||
+ vcc13-supply = <&vcc5v0_sys>;
|
|
||||||
+ vcc14-supply = <&vcc5v0_sys>;
|
|
||||||
+ vddio-supply = <&vcc_1v8>;
|
|
||||||
+
|
|
||||||
+ regulators {
|
|
||||||
+ vdd_center: DCDC_REG1 {
|
|
||||||
+ regulator-name = "vdd_center";
|
|
||||||
+ regulator-always-on;
|
|
||||||
+ regulator-boot-on;
|
|
||||||
+ regulator-min-microvolt = <750000>;
|
|
||||||
+ regulator-max-microvolt = <1350000>;
|
|
||||||
+ regulator-ramp-delay = <6001>;
|
|
||||||
+ regulator-state-mem {
|
|
||||||
+ regulator-off-in-suspend;
|
|
||||||
+ };
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ vdd_cpu_l: DCDC_REG2 {
|
|
||||||
+ regulator-name = "vdd_cpu_l";
|
|
||||||
+ regulator-always-on;
|
|
||||||
+ regulator-boot-on;
|
|
||||||
+ regulator-min-microvolt = <750000>;
|
|
||||||
+ regulator-max-microvolt = <1350000>;
|
|
||||||
+ regulator-ramp-delay = <6001>;
|
|
||||||
+ regulator-state-mem {
|
|
||||||
+ regulator-off-in-suspend;
|
|
||||||
+ };
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ vcc_ddr: DCDC_REG3 {
|
|
||||||
+ regulator-name = "vcc_ddr";
|
|
||||||
+ regulator-always-on;
|
|
||||||
+ regulator-boot-on;
|
|
||||||
+ regulator-min-microvolt = <1800000>;
|
|
||||||
+ regulator-max-microvolt = <1800000>;
|
|
||||||
+ regulator-state-mem {
|
|
||||||
+ regulator-on-in-suspend;
|
|
||||||
+ };
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ vcc_1v8: DCDC_REG4 {
|
|
||||||
+ regulator-name = "vcc_1v8";
|
|
||||||
+ regulator-always-on;
|
|
||||||
+ regulator-boot-on;
|
|
||||||
+ regulator-min-microvolt = <1800000>;
|
|
||||||
+ regulator-max-microvolt = <1800000>;
|
|
||||||
+ regulator-state-mem {
|
|
||||||
+ regulator-on-in-suspend;
|
|
||||||
+ regulator-suspend-microvolt = <1800000>;
|
|
||||||
+ };
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ vcc1v8_dvp: LDO_REG1 {
|
|
||||||
+ regulator-name = "vcc1v8_dvp";
|
|
||||||
+ regulator-always-on;
|
|
||||||
+ regulator-boot-on;
|
|
||||||
+ regulator-min-microvolt = <1800000>;
|
|
||||||
+ regulator-max-microvolt = <1800000>;
|
|
||||||
+ regulator-state-mem {
|
|
||||||
+ regulator-off-in-suspend;
|
|
||||||
+ };
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ vcca1v8_hdmi: LDO_REG2 {
|
|
||||||
+ regulator-name = "vcca1v8_hdmi";
|
|
||||||
+ regulator-always-on;
|
|
||||||
+ regulator-boot-on;
|
|
||||||
+ regulator-min-microvolt = <1800000>;
|
|
||||||
+ regulator-max-microvolt = <1800000>;
|
|
||||||
+ regulator-state-mem {
|
|
||||||
+ regulator-off-in-suspend;
|
|
||||||
+ };
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ vcca_1v8: LDO_REG3 {
|
|
||||||
+ regulator-name = "vcca_1v8";
|
|
||||||
+ regulator-always-on;
|
|
||||||
+ regulator-boot-on;
|
|
||||||
+ regulator-min-microvolt = <1800000>;
|
|
||||||
+ regulator-max-microvolt = <1800000>;
|
|
||||||
+ regulator-state-mem {
|
|
||||||
+ regulator-on-in-suspend;
|
|
||||||
+ regulator-suspend-microvolt = <1800000>;
|
|
||||||
+ };
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ vcc_sdio: LDO_REG4 {
|
|
||||||
+ regulator-name = "vcc_sdio";
|
|
||||||
+ regulator-always-on;
|
|
||||||
+ regulator-boot-on;
|
|
||||||
+ regulator-min-microvolt = <1800000>;
|
|
||||||
+ regulator-max-microvolt = <3000000>;
|
|
||||||
+ regulator-state-mem {
|
|
||||||
+ regulator-on-in-suspend;
|
|
||||||
+ regulator-suspend-microvolt = <3000000>;
|
|
||||||
+ };
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ vcca1v8_mipi: LDO_REG5 {
|
|
||||||
+ regulator-name = "vcca1v8_mipi";
|
|
||||||
+ regulator-always-on;
|
|
||||||
+ regulator-boot-on;
|
|
||||||
+ regulator-min-microvolt = <3000000>;
|
|
||||||
+ regulator-max-microvolt = <3000000>;
|
|
||||||
+ regulator-state-mem {
|
|
||||||
+ regulator-off-in-suspend;
|
|
||||||
+ };
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ vcc_1v5: LDO_REG6 {
|
|
||||||
+ regulator-name = "vcc_1v5";
|
|
||||||
+ regulator-always-on;
|
|
||||||
+ regulator-boot-on;
|
|
||||||
+ regulator-min-microvolt = <1500000>;
|
|
||||||
+ regulator-max-microvolt = <1500000>;
|
|
||||||
+ regulator-state-mem {
|
|
||||||
+ regulator-on-in-suspend;
|
|
||||||
+ regulator-suspend-microvolt = <1500000>;
|
|
||||||
+ };
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ vcca0v9_hdmi: LDO_REG7 {
|
|
||||||
+ regulator-name = "vcca0v9_hdmi";
|
|
||||||
+ regulator-always-on;
|
|
||||||
+ regulator-boot-on;
|
|
||||||
+ regulator-min-microvolt = <900000>;
|
|
||||||
+ regulator-max-microvolt = <900000>;
|
|
||||||
+ regulator-state-mem {
|
|
||||||
+ regulator-off-in-suspend;
|
|
||||||
+ };
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ vcc_3v0: LDO_REG8 {
|
|
||||||
+ regulator-name = "vcc_3v0";
|
|
||||||
+ regulator-always-on;
|
|
||||||
+ regulator-boot-on;
|
|
||||||
+ regulator-min-microvolt = <3000000>;
|
|
||||||
+ regulator-max-microvolt = <3000000>;
|
|
||||||
+ regulator-state-mem {
|
|
||||||
+ regulator-on-in-suspend;
|
|
||||||
+ regulator-suspend-microvolt = <3000000>;
|
|
||||||
+ };
|
|
||||||
+ };
|
|
||||||
+ };
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ vdd_cpu_b: regulator@40 {
|
|
||||||
+ compatible = "silergy,syr827";
|
|
||||||
+ reg = <0x40>;
|
|
||||||
+ fcs,suspend-voltage-selector = <0>;
|
|
||||||
+ regulator-name = "vdd_cpu_b";
|
|
||||||
+ regulator-min-microvolt = <712500>;
|
|
||||||
+ regulator-max-microvolt = <1500000>;
|
|
||||||
+ regulator-ramp-delay = <1000>;
|
|
||||||
+ regulator-always-on;
|
|
||||||
+ regulator-boot-on;
|
|
||||||
+ vin-supply = <&vcc5v0_sys>;
|
|
||||||
+
|
|
||||||
+ regulator-state-mem {
|
|
||||||
+ regulator-off-in-suspend;
|
|
||||||
+ };
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ vdd_gpu: regulator@41 {
|
|
||||||
+ compatible = "silergy,syr828";
|
|
||||||
+ reg = <0x41>;
|
|
||||||
+ fcs,suspend-voltage-selector = <1>;
|
|
||||||
+ regulator-name = "vdd_gpu";
|
|
||||||
+ regulator-min-microvolt = <712500>;
|
|
||||||
+ regulator-max-microvolt = <1500000>;
|
|
||||||
+ regulator-ramp-delay = <1000>;
|
|
||||||
+ regulator-always-on;
|
|
||||||
+ regulator-boot-on;
|
|
||||||
+ vin-supply = <&vcc5v0_sys>;
|
|
||||||
+
|
|
||||||
+ regulator-state-mem {
|
|
||||||
+ regulator-off-in-suspend;
|
|
||||||
+ };
|
|
||||||
+ };
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&pinctrl {
|
|
||||||
+ pmic {
|
|
||||||
+ pmic_int_l: pmic-int-l {
|
|
||||||
+ rockchip,pins =
|
|
||||||
+ <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
||||||
+ };
|
|
||||||
+ };
|
|
||||||
+};
|
|
||||||
|
|
||||||
From patchwork Tue Aug 21 17:28:17 2018
|
|
||||||
Content-Type: text/plain; charset="utf-8"
|
|
||||||
MIME-Version: 1.0
|
|
||||||
Content-Transfer-Encoding: 7bit
|
|
||||||
Subject: [U-Boot,v2,2/2] board: Add Vamrs Limited Rock960 board support
|
|
||||||
X-Patchwork-Submitter: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
|
|
||||||
X-Patchwork-Id: 960641
|
|
||||||
Message-Id: <20180821172817.26463-3-manivannan.sadhasivam@linaro.org>
|
|
||||||
To: sjg@chromium.org,
|
|
||||||
philipp.tomsich@theobroma-systems.com
|
|
||||||
Cc: tom@vamrs.com, amit.kucheria@linaro.org, dev@vamrs.com,
|
|
||||||
u-boot@lists.denx.de,
|
|
||||||
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>,
|
|
||||||
stephen@vamrs.com
|
|
||||||
Date: Tue, 21 Aug 2018 22:58:17 +0530
|
|
||||||
From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
|
|
||||||
List-Id: U-Boot discussion <u-boot.lists.denx.de>
|
|
||||||
|
|
||||||
Add board support for Vamrs Limited Rock960 board, which is
|
|
||||||
one of the 96Boards Consumer Edition platform.
|
|
||||||
|
|
||||||
Rock960 features:
|
|
||||||
* CPU: ARMv8 64bit Big-Little architecture,
|
|
||||||
* Big: dual-core Cortex-A72
|
|
||||||
* Little: quad-core Cortex-A53
|
|
||||||
* IRAM: 200KB
|
|
||||||
* DRAM: 2GB/4GB LPDDR3 @ 1866MHz
|
|
||||||
* eMMC: 16/32GB eMMC 5.1
|
|
||||||
* PMU: RK808
|
|
||||||
* SD/MMC
|
|
||||||
* USB:
|
|
||||||
* 1x USB 3.0 type A, 1x USB 2.0 type A (host mode only) and
|
|
||||||
1x USB 3.0 type C OTG
|
|
||||||
* Display:
|
|
||||||
* 1x HDMI 2.0(Type A - full) up to 4Kx2K@60Hz,
|
|
||||||
1x 4L - MIPI DSI up to 1080p@60Hz,
|
|
||||||
1x DP 1.2(Type C) up to 4Kx2K@60
|
|
||||||
* Camera: 2x 4-lane MIPI CSI
|
|
||||||
* PCI-E: 4- lane M.2 PCI-E 2.1
|
|
||||||
* Low Speed Expansion Connector
|
|
||||||
* High Speed Expansion Connector
|
|
||||||
|
|
||||||
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
|
|
||||||
---
|
|
||||||
|
|
||||||
Changes in v2: None
|
|
||||||
|
|
||||||
arch/arm/mach-rockchip/rk3399/Kconfig | 16 +++++
|
|
||||||
board/vamrs/rock960_rk3399/Kconfig | 15 ++++
|
|
||||||
board/vamrs/rock960_rk3399/MAINTAINERS | 6 ++
|
|
||||||
board/vamrs/rock960_rk3399/Makefile | 6 ++
|
|
||||||
board/vamrs/rock960_rk3399/README | 79 +++++++++++++++++++++
|
|
||||||
board/vamrs/rock960_rk3399/rock960-rk3399.c | 50 +++++++++++++
|
|
||||||
configs/rock960-rk3399_defconfig | 62 ++++++++++++++++
|
|
||||||
include/configs/rock960_rk3399.h | 15 ++++
|
|
||||||
8 files changed, 249 insertions(+)
|
|
||||||
create mode 100644 board/vamrs/rock960_rk3399/Kconfig
|
|
||||||
create mode 100644 board/vamrs/rock960_rk3399/MAINTAINERS
|
|
||||||
create mode 100644 board/vamrs/rock960_rk3399/Makefile
|
|
||||||
create mode 100644 board/vamrs/rock960_rk3399/README
|
|
||||||
create mode 100644 board/vamrs/rock960_rk3399/rock960-rk3399.c
|
|
||||||
create mode 100644 configs/rock960-rk3399_defconfig
|
|
||||||
create mode 100644 include/configs/rock960_rk3399.h
|
|
||||||
|
|
||||||
diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig b/arch/arm/mach-rockchip/rk3399/Kconfig
|
|
||||||
index 415466a49bb..ce4605187e3 100644
|
|
||||||
--- a/arch/arm/mach-rockchip/rk3399/Kconfig
|
|
||||||
+++ b/arch/arm/mach-rockchip/rk3399/Kconfig
|
|
||||||
@@ -28,6 +28,21 @@ config TARGET_PUMA_RK3399
|
|
||||||
* HDMI, eDP, MIPI-DSI, MIPI-DSI/CSI and MIPI-CSI
|
|
||||||
* SPI, I2C, I2S, UART, GPIO, ...
|
|
||||||
|
|
||||||
+config TARGET_ROCK960_RK3399
|
|
||||||
+ bool "Vamrs Limited Rock960 board"
|
|
||||||
+ help
|
|
||||||
+ Support for Rock960 board. This board complies with
|
|
||||||
+ 96Board Consumer Edition Specification.
|
|
||||||
+
|
|
||||||
+ Features:
|
|
||||||
+ * Rockchip RK3399 SoC (2xCortex A72, 4xCortex A53, ARM Mali T860MP4)
|
|
||||||
+ * 2GiB/4GiB RAM
|
|
||||||
+ * 16/32GB eMMC, uSD slot
|
|
||||||
+ * WiFi, Bluetooth
|
|
||||||
+ * 1x USB 3.0 type A, 1x USB 2.0 type A (host mode only), 1x USB 3.0 type C OTG
|
|
||||||
+ * HDMI
|
|
||||||
+ * 20-pin low speed and 40-pin high speed expanders, 6 LED, 3 buttons
|
|
||||||
+
|
|
||||||
endchoice
|
|
||||||
|
|
||||||
config SYS_SOC
|
|
||||||
@@ -38,5 +53,6 @@ config SYS_MALLOC_F_LEN
|
|
||||||
|
|
||||||
source "board/rockchip/evb_rk3399/Kconfig"
|
|
||||||
source "board/theobroma-systems/puma_rk3399/Kconfig"
|
|
||||||
+source "board/vamrs/rock960_rk3399/Kconfig"
|
|
||||||
|
|
||||||
endif
|
|
||||||
diff --git a/board/vamrs/rock960_rk3399/Kconfig b/board/vamrs/rock960_rk3399/Kconfig
|
|
||||||
new file mode 100644
|
|
||||||
index 00000000000..cacc53f3780
|
|
||||||
--- /dev/null
|
|
||||||
+++ b/board/vamrs/rock960_rk3399/Kconfig
|
|
||||||
@@ -0,0 +1,15 @@
|
|
||||||
+if TARGET_ROCK960_RK3399
|
|
||||||
+
|
|
||||||
+config SYS_BOARD
|
|
||||||
+ default "rock960_rk3399"
|
|
||||||
+
|
|
||||||
+config SYS_VENDOR
|
|
||||||
+ default "vamrs"
|
|
||||||
+
|
|
||||||
+config SYS_CONFIG_NAME
|
|
||||||
+ default "rock960_rk3399"
|
|
||||||
+
|
|
||||||
+config BOARD_SPECIFIC_OPTIONS # dummy
|
|
||||||
+ def_bool y
|
|
||||||
+
|
|
||||||
+endif
|
|
||||||
diff --git a/board/vamrs/rock960_rk3399/MAINTAINERS b/board/vamrs/rock960_rk3399/MAINTAINERS
|
|
||||||
new file mode 100644
|
|
||||||
index 00000000000..9f3fe75f4fb
|
|
||||||
--- /dev/null
|
|
||||||
+++ b/board/vamrs/rock960_rk3399/MAINTAINERS
|
|
||||||
@@ -0,0 +1,6 @@
|
|
||||||
+ROCK960-RK3399
|
|
||||||
+M: Manivannan Sadhasivam manivannan.sadhasivam@linaro.org
|
|
||||||
+S: Maintained
|
|
||||||
+F: board/rockchip/rock960_rk3399
|
|
||||||
+F: include/configs/rock960_rk3399.h
|
|
||||||
+F: configs/rock960-rk3399_defconfig
|
|
||||||
diff --git a/board/vamrs/rock960_rk3399/Makefile b/board/vamrs/rock960_rk3399/Makefile
|
|
||||||
new file mode 100644
|
|
||||||
index 00000000000..6c3e475b3a8
|
|
||||||
--- /dev/null
|
|
||||||
+++ b/board/vamrs/rock960_rk3399/Makefile
|
|
||||||
@@ -0,0 +1,6 @@
|
|
||||||
+# SPDX-License-Identifier: GPL-2.0+
|
|
||||||
+#
|
|
||||||
+# Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
|
|
||||||
+#
|
|
||||||
+
|
|
||||||
+obj-y += rock960-rk3399.o
|
|
||||||
diff --git a/board/vamrs/rock960_rk3399/README b/board/vamrs/rock960_rk3399/README
|
|
||||||
new file mode 100644
|
|
||||||
index 00000000000..be6b5cd1d34
|
|
||||||
--- /dev/null
|
|
||||||
+++ b/board/vamrs/rock960_rk3399/README
|
|
||||||
@@ -0,0 +1,79 @@
|
|
||||||
+Introduction
|
|
||||||
+============
|
|
||||||
+
|
|
||||||
+Rock960 is a 96Boards Consumer Edition platform featuring the Rockchip
|
|
||||||
+RK3399 SoC.
|
|
||||||
+
|
|
||||||
+Rock960 features:
|
|
||||||
+ * CPU: ARMv8 64bit Big-Little architecture,
|
|
||||||
+ * Big: dual-core Cortex-A72
|
|
||||||
+ * Little: quad-core Cortex-A53
|
|
||||||
+ * IRAM: 200KB
|
|
||||||
+ * DRAM: 2GB/4GB LPDDR3 @ 1866MHz
|
|
||||||
+ * eMMC: 16/32GB eMMC 5.1
|
|
||||||
+ * PMU: RK808
|
|
||||||
+ * SD/MMC
|
|
||||||
+ * USB:
|
|
||||||
+ * 1x USB 3.0 type A, 1x USB 2.0 type A (host mode only) and
|
|
||||||
+ 1x USB 3.0 type C OTG
|
|
||||||
+ * Display:
|
|
||||||
+ * 1x HDMI 2.0(Type A - full) up to 4Kx2K@60Hz,
|
|
||||||
+ 1x 4L - MIPI DSI up to 1080p@60Hz,
|
|
||||||
+ 1x DP 1.2(Type C) up to 4Kx2K@60
|
|
||||||
+ * Camera: 2x 4-lane MIPI CSI
|
|
||||||
+ * PCI-E: 4- lane M.2 PCI-E 2.1
|
|
||||||
+ * Low Speed Expansion Connector
|
|
||||||
+ * High Speed Expansion Connector
|
|
||||||
+
|
|
||||||
+Here is the step-by-step to boot to U-Boot on rk3399.
|
|
||||||
+
|
|
||||||
+Get the Source and prebuild binary
|
|
||||||
+==================================
|
|
||||||
+
|
|
||||||
+ > git clone https://github.com/96rocks/rkbin.git
|
|
||||||
+ > git clone https://github.com/rockchip-linux/rkdeveloptool.git
|
|
||||||
+
|
|
||||||
+Compile the U-Boot
|
|
||||||
+==================
|
|
||||||
+
|
|
||||||
+ > cd ../u-boot
|
|
||||||
+ > export ARCH=arm64
|
|
||||||
+ > export CROSS_COMPILE=aarch64-linux-gnu-
|
|
||||||
+ > make rock960-rk3399_defconfig
|
|
||||||
+ > make
|
|
||||||
+
|
|
||||||
+Compile the rkdeveloptool
|
|
||||||
+=========================
|
|
||||||
+ Follow instructions in latest README
|
|
||||||
+ > cd ../rkdeveloptool
|
|
||||||
+ > autoreconf -i
|
|
||||||
+ > ./configure
|
|
||||||
+ > make
|
|
||||||
+ > sudo make install
|
|
||||||
+
|
|
||||||
+Package the image
|
|
||||||
+=================
|
|
||||||
+
|
|
||||||
+Package the image for Rockchip miniloader
|
|
||||||
+------------------------------------------
|
|
||||||
+ > cd ../rkbin
|
|
||||||
+ > ./tools/loaderimage --pack --uboot u-boot/u-boot-dtb.bin uboot.img 0x200000
|
|
||||||
+
|
|
||||||
+ > ../u-boot/tools/mkimage -n rk3399 -T rksd -d rk3399_ddr_933MHz_v1.08.bin idbloader.img
|
|
||||||
+ > cat ./rk33/rk3399_miniloader_v1.06.bin >> idbloader.img
|
|
||||||
+
|
|
||||||
+ Get uboot.img and idbloader.img in this step.
|
|
||||||
+
|
|
||||||
+Flash the image to eMMC
|
|
||||||
+=======================
|
|
||||||
+
|
|
||||||
+Flash the image with Rockchip miniloader
|
|
||||||
+----------------------------------------
|
|
||||||
+Power on(or reset with RESET KEY) with MASKROM KEY preesed, and then:
|
|
||||||
+ > rkdeveloptool db ./rk33/rk3399_loader_v1.08.106.bin
|
|
||||||
+ > rkdeveloptool wl 0x40 idbloader.img
|
|
||||||
+ > rkdeveloptool wl 0x4000 uboot.img
|
|
||||||
+ > rkdeveloptool wl 0x6000 ./img/rk3399/trust.img
|
|
||||||
+ > rkdeveloptool rd
|
|
||||||
+
|
|
||||||
+You should be able to get U-Boot log in console/UART2(baurdrate 1500000)
|
|
||||||
diff --git a/board/vamrs/rock960_rk3399/rock960-rk3399.c b/board/vamrs/rock960_rk3399/rock960-rk3399.c
|
|
||||||
new file mode 100644
|
|
||||||
index 00000000000..d3775b22191
|
|
||||||
--- /dev/null
|
|
||||||
+++ b/board/vamrs/rock960_rk3399/rock960-rk3399.c
|
|
||||||
@@ -0,0 +1,50 @@
|
|
||||||
+// SPDX-License-Identifier: GPL-2.0+
|
|
||||||
+/*
|
|
||||||
+ * Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
|
|
||||||
+ */
|
|
||||||
+
|
|
||||||
+#include <common.h>
|
|
||||||
+#include <dm.h>
|
|
||||||
+#include <dm/pinctrl.h>
|
|
||||||
+#include <dm/uclass-internal.h>
|
|
||||||
+#include <asm/arch/periph.h>
|
|
||||||
+#include <power/regulator.h>
|
|
||||||
+#include <spl.h>
|
|
||||||
+
|
|
||||||
+int board_init(void)
|
|
||||||
+{
|
|
||||||
+ int ret;
|
|
||||||
+
|
|
||||||
+ ret = regulators_enable_boot_on(false);
|
|
||||||
+ if (ret)
|
|
||||||
+ debug("%s: Cannot enable boot on regulator\n", __func__);
|
|
||||||
+
|
|
||||||
+ return 0;
|
|
||||||
+}
|
|
||||||
+
|
|
||||||
+void spl_board_init(void)
|
|
||||||
+{
|
|
||||||
+ struct udevice *pinctrl;
|
|
||||||
+ int ret;
|
|
||||||
+
|
|
||||||
+ ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
|
|
||||||
+ if (ret) {
|
|
||||||
+ debug("%s: Cannot find pinctrl device\n", __func__);
|
|
||||||
+ goto err;
|
|
||||||
+ }
|
|
||||||
+
|
|
||||||
+ /* Enable debug UART */
|
|
||||||
+ ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART_DBG);
|
|
||||||
+ if (ret) {
|
|
||||||
+ debug("%s: Failed to set up console UART\n", __func__);
|
|
||||||
+ goto err;
|
|
||||||
+ }
|
|
||||||
+
|
|
||||||
+ preloader_console_init();
|
|
||||||
+ return;
|
|
||||||
+err:
|
|
||||||
+ printf("%s: Error %d\n", __func__, ret);
|
|
||||||
+
|
|
||||||
+ /* No way to report error here */
|
|
||||||
+ hang();
|
|
||||||
+}
|
|
||||||
diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig
|
|
||||||
new file mode 100644
|
|
||||||
index 00000000000..998c7a4b707
|
|
||||||
--- /dev/null
|
|
||||||
+++ b/configs/rock960-rk3399_defconfig
|
|
||||||
@@ -0,0 +1,62 @@
|
|
||||||
+CONFIG_ARM=y
|
|
||||||
+CONFIG_ARCH_ROCKCHIP=y
|
|
||||||
+CONFIG_SYS_TEXT_BASE=0x00200000
|
|
||||||
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
|
||||||
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
|
||||||
+CONFIG_SYS_MALLOC_F_LEN=0x4000
|
|
||||||
+CONFIG_ROCKCHIP_RK3399=y
|
|
||||||
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
|
|
||||||
+CONFIG_TARGET_ROCK960_RK3399=y
|
|
||||||
+CONFIG_DEBUG_UART_BASE=0xFF1A0000
|
|
||||||
+CONFIG_DEBUG_UART_CLOCK=24000000
|
|
||||||
+CONFIG_DEBUG_UART_SHIFT=2
|
|
||||||
+CONFIG_BAUDRATE=1500000
|
|
||||||
+CONFIG_SPL_STACK_R_ADDR=0x80000
|
|
||||||
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock960"
|
|
||||||
+CONFIG_DEBUG_UART=y
|
|
||||||
+CONFIG_FIT=y
|
|
||||||
+CONFIG_SPL_LOAD_FIT=y
|
|
||||||
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
|
|
||||||
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock960.dtb"
|
|
||||||
+CONFIG_SYS_PROMPT="rock960 => "
|
|
||||||
+# CONFIG_DISPLAY_CPUINFO is not set
|
|
||||||
+CONFIG_DISPLAY_BOARDINFO_LATE=y
|
|
||||||
+CONFIG_SPL_STACK_R=y
|
|
||||||
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
|
|
||||||
+CONFIG_SPL_ATF=y
|
|
||||||
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
|
|
||||||
+CONFIG_CMD_BOOTZ=y
|
|
||||||
+CONFIG_CMD_GPT=y
|
|
||||||
+CONFIG_CMD_MMC=y
|
|
||||||
+CONFIG_CMD_SF=y
|
|
||||||
+# CONFIG_CMD_SETEXPR is not set
|
|
||||||
+CONFIG_CMD_TIME=y
|
|
||||||
+CONFIG_SPL_OF_CONTROL=y
|
|
||||||
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
|
|
||||||
+CONFIG_SPL_OF_PLATDATA=y
|
|
||||||
+CONFIG_ENV_IS_IN_MMC=y
|
|
||||||
+CONFIG_REGMAP=y
|
|
||||||
+CONFIG_SPL_REGMAP=y
|
|
||||||
+CONFIG_SYSCON=y
|
|
||||||
+CONFIG_SPL_SYSCON=y
|
|
||||||
+CONFIG_CLK=y
|
|
||||||
+CONFIG_SPL_CLK=y
|
|
||||||
+CONFIG_ROCKCHIP_GPIO=y
|
|
||||||
+CONFIG_SYS_I2C_ROCKCHIP=y
|
|
||||||
+CONFIG_MMC_DW=y
|
|
||||||
+CONFIG_MMC_SDHCI=y
|
|
||||||
+CONFIG_MMC_SDHCI_ROCKCHIP=y
|
|
||||||
+CONFIG_PINCTRL=y
|
|
||||||
+CONFIG_SPL_PINCTRL=y
|
|
||||||
+CONFIG_PINCTRL_ROCKCHIP_RK3399=y
|
|
||||||
+CONFIG_DM_PMIC=y
|
|
||||||
+CONFIG_PMIC_RK8XX=y
|
|
||||||
+CONFIG_REGULATOR_PWM=y
|
|
||||||
+CONFIG_DM_REGULATOR_FIXED=y
|
|
||||||
+CONFIG_REGULATOR_RK8XX=y
|
|
||||||
+CONFIG_PWM_ROCKCHIP=y
|
|
||||||
+CONFIG_RAM=y
|
|
||||||
+CONFIG_SPL_RAM=y
|
|
||||||
+CONFIG_SYSRESET=y
|
|
||||||
+CONFIG_USE_TINY_PRINTF=y
|
|
||||||
+CONFIG_ERRNO_STR=y
|
|
||||||
diff --git a/include/configs/rock960_rk3399.h b/include/configs/rock960_rk3399.h
|
|
||||||
new file mode 100644
|
|
||||||
index 00000000000..746d24cbff5
|
|
||||||
--- /dev/null
|
|
||||||
+++ b/include/configs/rock960_rk3399.h
|
|
||||||
@@ -0,0 +1,15 @@
|
|
||||||
+/* SPDX-License-Identifier: GPL-2.0+ */
|
|
||||||
+/*
|
|
||||||
+ * Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
|
|
||||||
+ */
|
|
||||||
+
|
|
||||||
+#ifndef __ROCK960_RK3399_H
|
|
||||||
+#define __ROCK960_RK3399_H
|
|
||||||
+
|
|
||||||
+#include <configs/rk3399_common.h>
|
|
||||||
+
|
|
||||||
+#define CONFIG_SYS_MMC_ENV_DEV 1
|
|
||||||
+
|
|
||||||
+#define SDRAM_BANK_SIZE (2UL << 30)
|
|
||||||
+
|
|
||||||
+#endif
|
|
||||||
200
rockchip-Pinebook-Pro-Fixes.patch
Normal file
200
rockchip-Pinebook-Pro-Fixes.patch
Normal file
@ -0,0 +1,200 @@
|
|||||||
|
From e27621a7c2c0e090977c17f604093c720ca01fe4 Mon Sep 17 00:00:00 2001
|
||||||
|
From: Peter Robinson <pbrobinson@gmail.com>
|
||||||
|
Date: Mon, 8 Jun 2020 20:31:33 +0100
|
||||||
|
Subject: [PATCH 1/3] rockchip: Pinebook Pro: enable rng to provide an entropy
|
||||||
|
source
|
||||||
|
|
||||||
|
Enable the rng so UEFI can provide entropy for KASLR
|
||||||
|
|
||||||
|
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
|
||||||
|
---
|
||||||
|
arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi | 4 ++++
|
||||||
|
arch/arm/dts/rk3399-rockpro64-u-boot.dtsi | 4 ++++
|
||||||
|
configs/pinebook-pro-rk3399_defconfig | 2 ++
|
||||||
|
3 files changed, 10 insertions(+)
|
||||||
|
|
||||||
|
diff --git a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi
|
||||||
|
index 1a2e24d3ef..296321d697 100644
|
||||||
|
--- a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi
|
||||||
|
+++ b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi
|
||||||
|
@@ -24,6 +24,10 @@
|
||||||
|
u-boot,dm-pre-reloc;
|
||||||
|
};
|
||||||
|
|
||||||
|
+&rng {
|
||||||
|
+ status = "okay";
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
&sdhci {
|
||||||
|
max-frequency = <25000000>;
|
||||||
|
u-boot,dm-pre-reloc;
|
||||||
|
diff --git a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
|
||||||
|
index bac09df4a3..cb8991aa25 100644
|
||||||
|
--- a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
|
||||||
|
+++ b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
|
||||||
|
@@ -19,6 +19,10 @@
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
+&rng {
|
||||||
|
+ status = "okay";
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
&spi1 {
|
||||||
|
spi_flash: flash@0 {
|
||||||
|
u-boot,dm-pre-reloc;
|
||||||
|
diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig
|
||||||
|
index 0c129b9aeb..21eecf477c 100644
|
||||||
|
--- a/configs/pinebook-pro-rk3399_defconfig
|
||||||
|
+++ b/configs/pinebook-pro-rk3399_defconfig
|
||||||
|
@@ -54,6 +54,8 @@ CONFIG_DM_PMIC_FAN53555=y
|
||||||
|
CONFIG_PMIC_RK8XX=y
|
||||||
|
CONFIG_REGULATOR_PWM=y
|
||||||
|
CONFIG_REGULATOR_RK8XX=y
|
||||||
|
+CONFIG_DM_RNG=y
|
||||||
|
+CONFIG_RNG_ROCKCHIP=y
|
||||||
|
CONFIG_PWM_ROCKCHIP=y
|
||||||
|
CONFIG_RAM_RK3399_LPDDR4=y
|
||||||
|
CONFIG_DM_RESET=y
|
||||||
|
--
|
||||||
|
2.26.2
|
||||||
|
|
||||||
|
From 99a3c9ba5a8ab7a94aa700649e031f53d498e857 Mon Sep 17 00:00:00 2001
|
||||||
|
From: Peter Robinson <pbrobinson@gmail.com>
|
||||||
|
Date: Mon, 8 Jun 2020 22:23:05 +0100
|
||||||
|
Subject: [PATCH 2/3] rockchip: Pinebook Pro: Fix USB and the USB attached
|
||||||
|
keyboard
|
||||||
|
|
||||||
|
The built in keyboard on the Pinebook Pro is attached via USB so
|
||||||
|
fix this up to ensure USB works as expected.
|
||||||
|
|
||||||
|
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
|
||||||
|
---
|
||||||
|
configs/pinebook-pro-rk3399_defconfig | 5 +++++
|
||||||
|
include/configs/pinebook-pro-rk3399.h | 3 +++
|
||||||
|
2 files changed, 8 insertions(+)
|
||||||
|
|
||||||
|
diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig
|
||||||
|
index 21eecf477c..733463556a 100644
|
||||||
|
--- a/configs/pinebook-pro-rk3399_defconfig
|
||||||
|
+++ b/configs/pinebook-pro-rk3399_defconfig
|
||||||
|
@@ -61,6 +61,8 @@ CONFIG_RAM_RK3399_LPDDR4=y
|
||||||
|
CONFIG_DM_RESET=y
|
||||||
|
CONFIG_BAUDRATE=1500000
|
||||||
|
CONFIG_DEBUG_UART_SHIFT=2
|
||||||
|
+CONFIG_USE_PREBOOT=y
|
||||||
|
+CONFIG_PREBOOT="usb start"
|
||||||
|
CONFIG_ROCKCHIP_SPI=y
|
||||||
|
CONFIG_SYSRESET=y
|
||||||
|
CONFIG_USB=y
|
||||||
|
@@ -68,8 +70,11 @@ CONFIG_USB_XHCI_HCD=y
|
||||||
|
CONFIG_USB_XHCI_DWC3=y
|
||||||
|
CONFIG_USB_EHCI_HCD=y
|
||||||
|
CONFIG_USB_EHCI_GENERIC=y
|
||||||
|
+CONFIG_USB_OHCI_HCD=y
|
||||||
|
+CONFIG_USB_OHCI_GENERIC=y
|
||||||
|
CONFIG_USB_DWC3=y
|
||||||
|
CONFIG_ROCKCHIP_USB2_PHY=y
|
||||||
|
+CONFIG_DM_KEYBOARD=y
|
||||||
|
CONFIG_USB_KEYBOARD=y
|
||||||
|
CONFIG_USB_HOST_ETHER=y
|
||||||
|
CONFIG_USB_ETHER_ASIX=y
|
||||||
|
diff --git a/include/configs/pinebook-pro-rk3399.h b/include/configs/pinebook-pro-rk3399.h
|
||||||
|
index 4bc8802d11..d910830582 100644
|
||||||
|
--- a/include/configs/pinebook-pro-rk3399.h
|
||||||
|
+++ b/include/configs/pinebook-pro-rk3399.h
|
||||||
|
@@ -25,4 +25,7 @@
|
||||||
|
|
||||||
|
#define SDRAM_BANK_SIZE (2UL << 30)
|
||||||
|
|
||||||
|
+#define CONFIG_USB_OHCI_NEW
|
||||||
|
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
|
||||||
|
+
|
||||||
|
#endif
|
||||||
|
--
|
||||||
|
2.26.2
|
||||||
|
|
||||||
|
From 64d43a4f0a135486a9a524b107c853831e492eb6 Mon Sep 17 00:00:00 2001
|
||||||
|
From: Peter Robinson <pbrobinson@gmail.com>
|
||||||
|
Date: Mon, 8 Jun 2020 23:41:50 +0100
|
||||||
|
Subject: [PATCH 3/3] rockchip: Pinebook Pro: Fix SPI flash and store env on it
|
||||||
|
|
||||||
|
Some minor fixes for SPI flash on the Pinebook Pro and also
|
||||||
|
default to saving environment to the SPI flash as it's
|
||||||
|
guaranteed to be on board.
|
||||||
|
|
||||||
|
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
|
||||||
|
---
|
||||||
|
arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi | 6 +++++-
|
||||||
|
configs/pinebook-pro-rk3399_defconfig | 3 +++
|
||||||
|
include/configs/pinebook-pro-rk3399.h | 9 ---------
|
||||||
|
3 files changed, 8 insertions(+), 10 deletions(-)
|
||||||
|
|
||||||
|
diff --git a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi
|
||||||
|
index 296321d697..ded7db0aef 100644
|
||||||
|
--- a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi
|
||||||
|
+++ b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi
|
||||||
|
@@ -12,7 +12,11 @@
|
||||||
|
};
|
||||||
|
|
||||||
|
chosen {
|
||||||
|
- u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
|
||||||
|
+ u-boot,spl-boot-order = "same-as-spl", &sdhci, &spiflash, &sdmmc;
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
+ config {
|
||||||
|
+ u-boot,spl-payload-offset = <0x60000>; /* @ 384KB */
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig
|
||||||
|
index 733463556a..18b2d74253 100644
|
||||||
|
--- a/configs/pinebook-pro-rk3399_defconfig
|
||||||
|
+++ b/configs/pinebook-pro-rk3399_defconfig
|
||||||
|
@@ -1,6 +1,7 @@
|
||||||
|
CONFIG_ARM=y
|
||||||
|
CONFIG_ARCH_ROCKCHIP=y
|
||||||
|
CONFIG_SYS_TEXT_BASE=0x00200000
|
||||||
|
+CONFIG_ENV_SIZE=0x8000
|
||||||
|
CONFIG_ROCKCHIP_RK3399=y
|
||||||
|
CONFIG_TARGET_PINEBOOK_PRO_RK3399=y
|
||||||
|
CONFIG_NR_DRAM_BANKS=1
|
||||||
|
@@ -17,6 +18,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y
|
||||||
|
CONFIG_SPL_STACK_R=y
|
||||||
|
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
|
||||||
|
CONFIG_SPL_MTD_SUPPORT=y
|
||||||
|
+CONFIG_SPL_SPI_LOAD=y
|
||||||
|
CONFIG_TPL=y
|
||||||
|
CONFIG_CMD_BOOTZ=y
|
||||||
|
CONFIG_CMD_GPIO=y
|
||||||
|
@@ -32,6 +34,7 @@ CONFIG_CMD_REGULATOR=y
|
||||||
|
CONFIG_SPL_OF_CONTROL=y
|
||||||
|
CONFIG_DEFAULT_DEVICE_TREE="rk3399-pinebook-pro"
|
||||||
|
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
|
||||||
|
+CONFIG_ENV_IS_IN_SPI_FLASH=y
|
||||||
|
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||||
|
CONFIG_ROCKCHIP_GPIO=y
|
||||||
|
CONFIG_SYS_I2C_ROCKCHIP=y
|
||||||
|
diff --git a/include/configs/pinebook-pro-rk3399.h b/include/configs/pinebook-pro-rk3399.h
|
||||||
|
index d910830582..d478b19917 100644
|
||||||
|
--- a/include/configs/pinebook-pro-rk3399.h
|
||||||
|
+++ b/include/configs/pinebook-pro-rk3399.h
|
||||||
|
@@ -14,15 +14,6 @@
|
||||||
|
|
||||||
|
#include <configs/rk3399_common.h>
|
||||||
|
|
||||||
|
-#if defined(CONFIG_ENV_IS_IN_MMC)
|
||||||
|
-#define CONFIG_SYS_MMC_ENV_DEV 0
|
||||||
|
-#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
|
||||||
|
-#define CONFIG_ENV_SECT_SIZE (8 * 1024)
|
||||||
|
-#endif
|
||||||
|
-
|
||||||
|
-#undef CONFIG_SYS_SPI_U_BOOT_OFFS
|
||||||
|
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 1024 * 512
|
||||||
|
-
|
||||||
|
#define SDRAM_BANK_SIZE (2UL << 30)
|
||||||
|
|
||||||
|
#define CONFIG_USB_OHCI_NEW
|
||||||
|
--
|
||||||
|
2.26.2
|
||||||
|
|
||||||
@ -1,103 +0,0 @@
|
|||||||
From patchwork Thu Apr 26 06:43:06 2018
|
|
||||||
Content-Type: text/plain; charset="utf-8"
|
|
||||||
MIME-Version: 1.0
|
|
||||||
Content-Transfer-Encoding: 7bit
|
|
||||||
Subject: [U-Boot] rockchip: make_fit_atf: fix warning unit_address_vs_reg
|
|
||||||
X-Patchwork-Submitter: Kever Yang <kever.yang@rock-chips.com>
|
|
||||||
X-Patchwork-Id: 904884
|
|
||||||
Message-Id: <1524724986-28497-1-git-send-email-kever.yang@rock-chips.com>
|
|
||||||
To: u-boot@lists.denx.de
|
|
||||||
Date: Thu, 26 Apr 2018 14:43:06 +0800
|
|
||||||
From: Kever Yang <kever.yang@rock-chips.com>
|
|
||||||
List-Id: U-Boot discussion <u-boot.lists.denx.de>
|
|
||||||
|
|
||||||
Patch fix warning:
|
|
||||||
/builddir/BUILD/u-boot-2018.05-rc2/"arch/arm/mach-rockchip/make_fit_atf.py" \
|
|
||||||
arch/arm/dts/rk3399-firefly.dtb > u-boot.its
|
|
||||||
./tools/mkimage -f u-boot.its -E u-boot.itb >/dev/null && cat
|
|
||||||
/dev/null
|
|
||||||
u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/uboot@1
|
|
||||||
has a unit name, but no reg property
|
|
||||||
u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/atf@1 has
|
|
||||||
a unit name, but no reg property
|
|
||||||
u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/atf@2 has
|
|
||||||
a unit name, but no reg property
|
|
||||||
u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/atf@3 has
|
|
||||||
a unit name, but no reg property
|
|
||||||
u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/fdt@1 has
|
|
||||||
a unit name, but no reg property
|
|
||||||
u-boot.itb.tmp: Warning (unit_address_vs_reg): Node
|
|
||||||
/configurations/config@1 has a unit name, but no reg property
|
|
||||||
make[1]: Leaving directory
|
|
||||||
'/builddir/BUILD/u-boot-2018.05-rc2/builds/firefly-rk3399'
|
|
||||||
|
|
||||||
Reported-by: Peter Robinson <pbrobinson@gmail.com>
|
|
||||||
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
|
||||||
---
|
|
||||||
|
|
||||||
arch/arm/mach-rockchip/make_fit_atf.py | 18 +++++++++---------
|
|
||||||
1 file changed, 9 insertions(+), 9 deletions(-)
|
|
||||||
|
|
||||||
diff --git a/arch/arm/mach-rockchip/make_fit_atf.py b/arch/arm/mach-rockchip/make_fit_atf.py
|
|
||||||
index 7c6dd57..513e088 100755
|
|
||||||
--- a/arch/arm/mach-rockchip/make_fit_atf.py
|
|
||||||
+++ b/arch/arm/mach-rockchip/make_fit_atf.py
|
|
||||||
@@ -37,7 +37,7 @@ DT_HEADER="""/*
|
|
||||||
#address-cells = <1>;
|
|
||||||
|
|
||||||
images {
|
|
||||||
- uboot@1 {
|
|
||||||
+ uboot {
|
|
||||||
description = "U-Boot (64-bit)";
|
|
||||||
data = /incbin/("u-boot-nodtb.bin");
|
|
||||||
type = "standalone";
|
|
||||||
@@ -61,7 +61,7 @@ def append_atf_node(file, atf_index, phy_addr):
|
|
||||||
Append ATF DT node to input FIT dts file.
|
|
||||||
"""
|
|
||||||
data = 'bl31_0x%08x.bin' % phy_addr
|
|
||||||
- print >> file, '\t\tatf@%d {' % atf_index
|
|
||||||
+ print >> file, '\t\tatf_%d {' % atf_index
|
|
||||||
print >> file, '\t\t\tdescription = \"ARM Trusted Firmware\";'
|
|
||||||
print >> file, '\t\t\tdata = /incbin/("%s");' % data
|
|
||||||
print >> file, '\t\t\ttype = "firmware";'
|
|
||||||
@@ -81,7 +81,7 @@ def append_fdt_node(file, dtbs):
|
|
||||||
cnt = 1
|
|
||||||
for dtb in dtbs:
|
|
||||||
dtname = os.path.basename(dtb)
|
|
||||||
- print >> file, '\t\tfdt@%d {' % cnt
|
|
||||||
+ print >> file, '\t\tfdt_%d {' % cnt
|
|
||||||
print >> file, '\t\t\tdescription = "%s";' % dtname
|
|
||||||
print >> file, '\t\t\tdata = /incbin/("%s");' % dtb
|
|
||||||
print >> file, '\t\t\ttype = "flat_dt";'
|
|
||||||
@@ -91,17 +91,17 @@ def append_fdt_node(file, dtbs):
|
|
||||||
cnt = cnt + 1
|
|
||||||
|
|
||||||
def append_conf_section(file, cnt, dtname, atf_cnt):
|
|
||||||
- print >> file, '\t\tconfig@%d {' % cnt
|
|
||||||
+ print >> file, '\t\tconfig_%d {' % cnt
|
|
||||||
print >> file, '\t\t\tdescription = "%s";' % dtname
|
|
||||||
- print >> file, '\t\t\tfirmware = "atf@1";'
|
|
||||||
- print >> file, '\t\t\tloadables = "uboot@1",',
|
|
||||||
+ print >> file, '\t\t\tfirmware = "atf_1";'
|
|
||||||
+ print >> file, '\t\t\tloadables = "uboot",',
|
|
||||||
for i in range(1, atf_cnt):
|
|
||||||
- print >> file, '"atf@%d"' % (i+1),
|
|
||||||
+ print >> file, '"atf_%d"' % (i+1),
|
|
||||||
if i != (atf_cnt - 1):
|
|
||||||
print >> file, ',',
|
|
||||||
else:
|
|
||||||
print >> file, ';'
|
|
||||||
- print >> file, '\t\t\tfdt = "fdt@1";'
|
|
||||||
+ print >> file, '\t\t\tfdt = "fdt_1";'
|
|
||||||
print >> file, '\t\t};'
|
|
||||||
print >> file, ''
|
|
||||||
|
|
||||||
@@ -111,7 +111,7 @@ def append_conf_node(file, dtbs, atf_cnt):
|
|
||||||
"""
|
|
||||||
cnt = 1
|
|
||||||
print >> file, '\tconfigurations {'
|
|
||||||
- print >> file, '\t\tdefault = "config@1";'
|
|
||||||
+ print >> file, '\t\tdefault = "config_1";'
|
|
||||||
for dtb in dtbs:
|
|
||||||
dtname = os.path.basename(dtb)
|
|
||||||
append_conf_section(file, cnt, dtname, atf_cnt)
|
|
||||||
@ -1,81 +0,0 @@
|
|||||||
From patchwork Wed May 16 16:44:33 2018
|
|
||||||
Content-Type: text/plain; charset="utf-8"
|
|
||||||
MIME-Version: 1.0
|
|
||||||
Content-Transfer-Encoding: 7bit
|
|
||||||
Subject: [U-Boot] rockchip: make_fit_atf: use elf entry point
|
|
||||||
X-Patchwork-Submitter: Mian Yousaf Kaukab <yousaf.kaukab@suse.com>
|
|
||||||
X-Patchwork-Id: 914901
|
|
||||||
Message-Id: <20180516164433.30998-1-yousaf.kaukab@suse.com>
|
|
||||||
To: u-boot@lists.denx.de
|
|
||||||
Cc: Mian Yousaf Kaukab <yousaf.kaukab@suse.com>
|
|
||||||
Date: Wed, 16 May 2018 18:44:33 +0200
|
|
||||||
From: Mian Yousaf Kaukab <yousaf.kaukab@suse.com>
|
|
||||||
List-Id: U-Boot discussion <u-boot.lists.denx.de>
|
|
||||||
|
|
||||||
make_fit_atf.py uses physical address of first segment as the
|
|
||||||
entry point to bl31. It is incorrect and causes following abort
|
|
||||||
when bl31_entry() is called:
|
|
||||||
|
|
||||||
U-Boot SPL board initTrying to boot from MMC1
|
|
||||||
"Synchronous Abort" handler, esr 0x02000000
|
|
||||||
elr: 0000000000000000 lr : 00000000ff8c7e8c
|
|
||||||
x 0: 00000000ff8e0000 x 1: 0000000000000000
|
|
||||||
x 2: 0000000000000000 x 3: 00000000ff8e0180
|
|
||||||
x 4: 0000000000000000 x 5: 0000000000000000
|
|
||||||
x 6: 0000000000000030 x 7: 00000000ff8e0188
|
|
||||||
x 8: 00000000000001e0 x 9: 0000000000000000
|
|
||||||
x10: 000000000007fcdc x11: 00000000002881b8
|
|
||||||
x12: 00000000000001a2 x13: 0000000000000198
|
|
||||||
x14: 000000000007fdcc x15: 00000000002881b8
|
|
||||||
x16: 00000000003c0724 x17: 00000000003c0718
|
|
||||||
x18: 000000000007fe80 x19: 00000000ff8e0000
|
|
||||||
x20: 0000000000200000 x21: 00000000ff8e0000
|
|
||||||
x22: 0000000000000000 x23: 000000000007fe30
|
|
||||||
x24: 00000000ff8d1c3c x25: 00000000ff8d5000
|
|
||||||
x26: 00000000deadbeef x27: 00000000000004a0
|
|
||||||
x28: 000000000000009c x29: 000000000007fd90
|
|
||||||
|
|
||||||
Fix it by using the entry point from the elf header.
|
|
||||||
|
|
||||||
Signed-off-by: Mian Yousaf Kaukab <yousaf.kaukab@suse.com>
|
|
||||||
---
|
|
||||||
arch/arm/mach-rockchip/make_fit_atf.py | 7 ++++---
|
|
||||||
1 file changed, 4 insertions(+), 3 deletions(-)
|
|
||||||
|
|
||||||
diff --git a/arch/arm/mach-rockchip/make_fit_atf.py b/arch/arm/mach-rockchip/make_fit_atf.py
|
|
||||||
index 6b3d9201c9..b88a5e1f16 100755
|
|
||||||
--- a/arch/arm/mach-rockchip/make_fit_atf.py
|
|
||||||
+++ b/arch/arm/mach-rockchip/make_fit_atf.py
|
|
||||||
@@ -53,7 +53,7 @@ DT_END="""
|
|
||||||
};
|
|
||||||
"""
|
|
||||||
|
|
||||||
-def append_atf_node(file, atf_index, phy_addr):
|
|
||||||
+def append_atf_node(file, atf_index, phy_addr, elf_entry):
|
|
||||||
"""
|
|
||||||
Append ATF DT node to input FIT dts file.
|
|
||||||
"""
|
|
||||||
@@ -67,7 +67,7 @@ def append_atf_node(file, atf_index, phy_addr):
|
|
||||||
print >> file, '\t\t\tcompression = "none";'
|
|
||||||
print >> file, '\t\t\tload = <0x%08x>;' % phy_addr
|
|
||||||
if atf_index == 1:
|
|
||||||
- print >> file, '\t\t\tentry = <0x%08x>;' % phy_addr
|
|
||||||
+ print >> file, '\t\t\tentry = <0x%08x>;' % elf_entry
|
|
||||||
print >> file, '\t\t};'
|
|
||||||
print >> file, ''
|
|
||||||
|
|
||||||
@@ -141,12 +141,13 @@ def generate_atf_fit_dts(fit_file_name, bl31_file_name, uboot_file_name, dtbs_fi
|
|
||||||
|
|
||||||
with open(bl31_file_name) as bl31_file:
|
|
||||||
bl31 = ELFFile(bl31_file)
|
|
||||||
+ elf_entry = bl31.header['e_entry']
|
|
||||||
for i in range(bl31.num_segments()):
|
|
||||||
seg = bl31.get_segment(i)
|
|
||||||
if ('PT_LOAD' == seg.__getitem__(ELF_SEG_P_TYPE)):
|
|
||||||
paddr = seg.__getitem__(ELF_SEG_P_PADDR)
|
|
||||||
p= seg.__getitem__(ELF_SEG_P_PADDR)
|
|
||||||
- append_atf_node(fit_file, i+1, paddr)
|
|
||||||
+ append_atf_node(fit_file, i+1, paddr, elf_entry)
|
|
||||||
atf_cnt = i+1
|
|
||||||
append_fdt_node(fit_file, dtbs_file_name)
|
|
||||||
print >> fit_file, '%s' % DT_IMAGES_NODE_END
|
|
||||||
@ -1,6 +1,6 @@
|
|||||||
From 44dd1455f924aa99e6bff0b124a9be0a85dcfa89 Mon Sep 17 00:00:00 2001
|
From 7389a936fbd5ccaae7c39d38d1440e0359f9d0e5 Mon Sep 17 00:00:00 2001
|
||||||
From: Peter Robinson <pbrobinson@gmail.com>
|
From: Peter Robinson <pbrobinson@gmail.com>
|
||||||
Date: Tue, 4 Sep 2018 11:59:18 +0100
|
Date: Tue, 12 May 2020 08:14:26 +0100
|
||||||
Subject: [PATCH] rpi: Use firmware provided device tree
|
Subject: [PATCH] rpi: Use firmware provided device tree
|
||||||
|
|
||||||
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
|
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
|
||||||
@ -13,70 +13,70 @@ Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
|
|||||||
5 files changed, 5 insertions(+), 5 deletions(-)
|
5 files changed, 5 insertions(+), 5 deletions(-)
|
||||||
|
|
||||||
diff --git a/configs/rpi_0_w_defconfig b/configs/rpi_0_w_defconfig
|
diff --git a/configs/rpi_0_w_defconfig b/configs/rpi_0_w_defconfig
|
||||||
index d5bf01b76e..08f177f34a 100644
|
index 5053a38822..3c6af2b367 100644
|
||||||
--- a/configs/rpi_0_w_defconfig
|
--- a/configs/rpi_0_w_defconfig
|
||||||
+++ b/configs/rpi_0_w_defconfig
|
+++ b/configs/rpi_0_w_defconfig
|
||||||
@@ -13,7 +13,7 @@ CONFIG_SYS_PROMPT="U-Boot> "
|
@@ -17,7 +17,7 @@ CONFIG_CMD_GPIO=y
|
||||||
CONFIG_CMD_GPIO=y
|
|
||||||
CONFIG_CMD_MMC=y
|
CONFIG_CMD_MMC=y
|
||||||
CONFIG_CMD_USB=y
|
CONFIG_CMD_USB=y
|
||||||
|
CONFIG_CMD_FS_UUID=y
|
||||||
-CONFIG_OF_EMBED=y
|
-CONFIG_OF_EMBED=y
|
||||||
+CONFIG_OF_BOARD=y
|
+CONFIG_OF_BOARD=y
|
||||||
CONFIG_DEFAULT_DEVICE_TREE="bcm2835-rpi-zero-w"
|
CONFIG_DEFAULT_DEVICE_TREE="bcm2835-rpi-zero-w"
|
||||||
CONFIG_ENV_FAT_INTERFACE="mmc"
|
|
||||||
CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
|
CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
|
||||||
|
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||||
diff --git a/configs/rpi_2_defconfig b/configs/rpi_2_defconfig
|
diff --git a/configs/rpi_2_defconfig b/configs/rpi_2_defconfig
|
||||||
index a50a815759..0918c6c9ff 100644
|
index 0000a759f1..f27c5ab1f6 100644
|
||||||
--- a/configs/rpi_2_defconfig
|
--- a/configs/rpi_2_defconfig
|
||||||
+++ b/configs/rpi_2_defconfig
|
+++ b/configs/rpi_2_defconfig
|
||||||
@@ -13,7 +13,7 @@ CONFIG_SYS_PROMPT="U-Boot> "
|
@@ -17,7 +17,7 @@ CONFIG_CMD_GPIO=y
|
||||||
CONFIG_CMD_GPIO=y
|
|
||||||
CONFIG_CMD_MMC=y
|
CONFIG_CMD_MMC=y
|
||||||
CONFIG_CMD_USB=y
|
CONFIG_CMD_USB=y
|
||||||
|
CONFIG_CMD_FS_UUID=y
|
||||||
-CONFIG_OF_EMBED=y
|
-CONFIG_OF_EMBED=y
|
||||||
+CONFIG_OF_BOARD=y
|
+CONFIG_OF_BOARD=y
|
||||||
CONFIG_DEFAULT_DEVICE_TREE="bcm2836-rpi-2-b"
|
CONFIG_DEFAULT_DEVICE_TREE="bcm2836-rpi-2-b"
|
||||||
CONFIG_ENV_FAT_INTERFACE="mmc"
|
|
||||||
CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
|
CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
|
||||||
|
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||||
diff --git a/configs/rpi_3_32b_defconfig b/configs/rpi_3_32b_defconfig
|
diff --git a/configs/rpi_3_32b_defconfig b/configs/rpi_3_32b_defconfig
|
||||||
index ec395d29ed..22165bde53 100644
|
index a714f9ec49..90ce6ea22e 100644
|
||||||
--- a/configs/rpi_3_32b_defconfig
|
--- a/configs/rpi_3_32b_defconfig
|
||||||
+++ b/configs/rpi_3_32b_defconfig
|
+++ b/configs/rpi_3_32b_defconfig
|
||||||
@@ -14,7 +14,7 @@ CONFIG_SYS_PROMPT="U-Boot> "
|
@@ -18,7 +18,7 @@ CONFIG_CMD_GPIO=y
|
||||||
CONFIG_CMD_GPIO=y
|
|
||||||
CONFIG_CMD_MMC=y
|
CONFIG_CMD_MMC=y
|
||||||
CONFIG_CMD_USB=y
|
CONFIG_CMD_USB=y
|
||||||
|
CONFIG_CMD_FS_UUID=y
|
||||||
-CONFIG_OF_EMBED=y
|
-CONFIG_OF_EMBED=y
|
||||||
+CONFIG_OF_BOARD=y
|
+CONFIG_OF_BOARD=y
|
||||||
CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b"
|
CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b"
|
||||||
CONFIG_ENV_FAT_INTERFACE="mmc"
|
|
||||||
CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
|
CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
|
||||||
|
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||||
diff --git a/configs/rpi_3_defconfig b/configs/rpi_3_defconfig
|
diff --git a/configs/rpi_3_defconfig b/configs/rpi_3_defconfig
|
||||||
index ac99f2000a..0ca298cd54 100644
|
index 244d9b3a78..f72d6d35e2 100644
|
||||||
--- a/configs/rpi_3_defconfig
|
--- a/configs/rpi_3_defconfig
|
||||||
+++ b/configs/rpi_3_defconfig
|
+++ b/configs/rpi_3_defconfig
|
||||||
@@ -14,7 +14,7 @@ CONFIG_SYS_PROMPT="U-Boot> "
|
@@ -18,7 +18,7 @@ CONFIG_CMD_GPIO=y
|
||||||
CONFIG_CMD_GPIO=y
|
|
||||||
CONFIG_CMD_MMC=y
|
CONFIG_CMD_MMC=y
|
||||||
CONFIG_CMD_USB=y
|
CONFIG_CMD_USB=y
|
||||||
|
CONFIG_CMD_FS_UUID=y
|
||||||
-CONFIG_OF_EMBED=y
|
-CONFIG_OF_EMBED=y
|
||||||
+CONFIG_OF_BOARD=y
|
+CONFIG_OF_BOARD=y
|
||||||
CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b"
|
CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b"
|
||||||
CONFIG_ENV_FAT_INTERFACE="mmc"
|
|
||||||
CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
|
CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
|
||||||
|
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||||
diff --git a/configs/rpi_defconfig b/configs/rpi_defconfig
|
diff --git a/configs/rpi_defconfig b/configs/rpi_defconfig
|
||||||
index db42ffd135..0ec1365b1b 100644
|
index 64bb184c2b..645dbbec33 100644
|
||||||
--- a/configs/rpi_defconfig
|
--- a/configs/rpi_defconfig
|
||||||
+++ b/configs/rpi_defconfig
|
+++ b/configs/rpi_defconfig
|
||||||
@@ -13,7 +13,7 @@ CONFIG_SYS_PROMPT="U-Boot> "
|
@@ -17,7 +17,7 @@ CONFIG_CMD_GPIO=y
|
||||||
CONFIG_CMD_GPIO=y
|
|
||||||
CONFIG_CMD_MMC=y
|
CONFIG_CMD_MMC=y
|
||||||
CONFIG_CMD_USB=y
|
CONFIG_CMD_USB=y
|
||||||
|
CONFIG_CMD_FS_UUID=y
|
||||||
-CONFIG_OF_EMBED=y
|
-CONFIG_OF_EMBED=y
|
||||||
+CONFIG_OF_BOARD=y
|
+CONFIG_OF_BOARD=y
|
||||||
CONFIG_DEFAULT_DEVICE_TREE="bcm2835-rpi-b"
|
CONFIG_DEFAULT_DEVICE_TREE="bcm2835-rpi-b"
|
||||||
CONFIG_ENV_FAT_INTERFACE="mmc"
|
|
||||||
CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
|
CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
|
||||||
|
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||||
--
|
--
|
||||||
2.19.0.rc0
|
2.26.2
|
||||||
|
|
||||||
|
|||||||
@ -1,67 +0,0 @@
|
|||||||
From 82cc7aca5fb7c7103256229a3ead0b8075da5813 Mon Sep 17 00:00:00 2001
|
|
||||||
From: Peter Robinson <pbrobinson@gmail.com>
|
|
||||||
Date: Wed, 5 Sep 2018 17:00:25 +0100
|
|
||||||
Subject: [PATCH] sunxi: DT: A64: add Pine64-LTS support
|
|
||||||
|
|
||||||
The Pine64-LTS board is a new board version of the Pine64, though
|
|
||||||
actually it's a non-SoM version of the SoPine and its baseboard.
|
|
||||||
In contrast to the original Pine64 it features LPDDR3 DRAM, an eMMC
|
|
||||||
socket and a SPI flash chip for storing firmware (like U-Boot).
|
|
||||||
Add it as a variant to the existing SoPine defconfig, since from a
|
|
||||||
software point of view they are really not different.
|
|
||||||
|
|
||||||
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
|
||||||
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
|
|
||||||
---
|
|
||||||
arch/arm/dts/Makefile | 1 +
|
|
||||||
arch/arm/dts/sun50i-a64-pine64-lts.dts | 13 +++++++++++++
|
|
||||||
configs/sopine_baseboard_defconfig | 1 +
|
|
||||||
3 files changed, 15 insertions(+)
|
|
||||||
create mode 100644 arch/arm/dts/sun50i-a64-pine64-lts.dts
|
|
||||||
|
|
||||||
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
|
|
||||||
index ebfa227262..6cd440d6af 100644
|
|
||||||
--- a/arch/arm/dts/Makefile
|
|
||||||
+++ b/arch/arm/dts/Makefile
|
|
||||||
@@ -401,6 +401,7 @@ dtb-$(CONFIG_MACH_SUN50I) += \
|
|
||||||
sun50i-a64-nanopi-a64.dtb \
|
|
||||||
sun50i-a64-olinuxino.dtb \
|
|
||||||
sun50i-a64-orangepi-win.dtb \
|
|
||||||
+ sun50i-a64-pine64-lts.dtb \
|
|
||||||
sun50i-a64-pine64-plus.dtb \
|
|
||||||
sun50i-a64-pine64.dtb \
|
|
||||||
sun50i-a64-sopine-baseboard.dtb
|
|
||||||
diff --git a/arch/arm/dts/sun50i-a64-pine64-lts.dts b/arch/arm/dts/sun50i-a64-pine64-lts.dts
|
|
||||||
new file mode 100644
|
|
||||||
index 0000000000..72d6961dc3
|
|
||||||
--- /dev/null
|
|
||||||
+++ b/arch/arm/dts/sun50i-a64-pine64-lts.dts
|
|
||||||
@@ -0,0 +1,13 @@
|
|
||||||
+/*
|
|
||||||
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
|
||||||
+ *
|
|
||||||
+ * Copyright (c) 2018 ARM Ltd.
|
|
||||||
+ */
|
|
||||||
+
|
|
||||||
+#include "sun50i-a64-sopine-baseboard.dts"
|
|
||||||
+
|
|
||||||
+/ {
|
|
||||||
+ model = "Pine64 LTS";
|
|
||||||
+ compatible = "pine64,pine64-lts", "allwinner,sun50i-r18",
|
|
||||||
+ "allwinner,sun50i-a64";
|
|
||||||
+};
|
|
||||||
diff --git a/configs/sopine_baseboard_defconfig b/configs/sopine_baseboard_defconfig
|
|
||||||
index 9ede081c08..eead38a1e3 100644
|
|
||||||
--- a/configs/sopine_baseboard_defconfig
|
|
||||||
+++ b/configs/sopine_baseboard_defconfig
|
|
||||||
@@ -15,6 +15,7 @@ CONFIG_NR_DRAM_BANKS=1
|
|
||||||
# CONFIG_SPL_DOS_PARTITION is not set
|
|
||||||
# CONFIG_SPL_EFI_PARTITION is not set
|
|
||||||
CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-sopine-baseboard"
|
|
||||||
+CONFIG_OF_LIST="sun50i-a64-sopine-baseboard sun50i-a64-pine64-lts"
|
|
||||||
CONFIG_SUN8I_EMAC=y
|
|
||||||
CONFIG_USB_EHCI_HCD=y
|
|
||||||
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
|
|
||||||
--
|
|
||||||
2.19.0.rc0
|
|
||||||
|
|
||||||
Binary file not shown.
120
uboot-tools.spec
120
uboot-tools.spec
@ -1,6 +1,7 @@
|
|||||||
|
%global _default_patch_fuzz 2
|
||||||
Name: uboot-tools
|
Name: uboot-tools
|
||||||
Version: 2018.09
|
Version: 2020.07
|
||||||
Release: 9
|
Release: 1
|
||||||
Summary: tools for U-Boot
|
Summary: tools for U-Boot
|
||||||
License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+
|
License: GPLv2+ BSD LGPL-2.1+ LGPL-2.0+
|
||||||
URL: http://www.denx.de/wiki/U-Boot
|
URL: http://www.denx.de/wiki/U-Boot
|
||||||
@ -10,17 +11,31 @@ Source2: arm-chromebooks
|
|||||||
Source3: aarch64-boards
|
Source3: aarch64-boards
|
||||||
Source4: aarch64-chromebooks
|
Source4: aarch64-chromebooks
|
||||||
Source5: 10-devicetree.install
|
Source5: 10-devicetree.install
|
||||||
Patch0001: usb-kbd-fixes.patch
|
|
||||||
Patch0002: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch
|
Patch1: uefi-distro-load-FDT-from-any-partition-on-boot-device.patch
|
||||||
Patch0003: rockchip-make_fit_atf-fix-warning-unit_address_vs_reg.patch
|
# Needed due to issues with shim
|
||||||
Patch0004: rockchip-make_fit_atf-use-elf-entry-point.patch
|
#Patch2: uefi-use-Fedora-specific-path-name.patch
|
||||||
Patch0005: rk3399-Rock960-board-support.patch
|
|
||||||
Patch0006: dragonboard-fixes.patch
|
# Board fixes and enablement
|
||||||
Patch0007: tegra-efi_loader-simplify-ifdefs.patch
|
Patch4: usb-kbd-fixes.patch
|
||||||
Patch0008: sunxi-DT-A64-add-Pine64-LTS-support.patch
|
Patch5: dragonboard-fixes.patch
|
||||||
|
#Patch7: tegra-efi_loader-simplify-ifdefs.patch
|
||||||
|
# Tegra improvements
|
||||||
|
Patch10: arm-tegra-define-fdtfile-option-for-distro-boot.patch
|
||||||
|
Patch11: arm-add-BOOTENV_EFI_SET_FDTFILE_FALLBACK-for-tegra186-be.patch
|
||||||
|
# AllWinner improvements
|
||||||
|
Patch12: AllWinner-Pine64-bits.patch
|
||||||
|
# Rockchips improvements
|
||||||
|
Patch13: arm-rk3399-enable-rng-on-rock960-and-firefly3399.patch
|
||||||
|
Patch14: rockchip-Pinebook-Pro-Fixes.patch
|
||||||
|
# RPi4
|
||||||
|
Patch16: USB-host-support-for-Raspberry-Pi-4-board-64-bit.patch
|
||||||
|
Patch17: usb-xhci-Load-Raspberry-Pi-4-VL805-s-firmware.patch
|
||||||
|
Patch18: rpi-Enable-using-the-DT-provided-by-the-Raspberry-Pi.patch
|
||||||
|
|
||||||
|
|
||||||
BuildRequires: bc dtc gcc make flex bison git-core openssl-devel gdb
|
BuildRequires: bc dtc gcc make flex bison git-core openssl-devel gdb
|
||||||
BuildRequires: python-unversioned-command python2-devel python2-setuptools
|
BuildRequires: python-unversioned-command python3-devel python3-setuptools
|
||||||
BuildRequires: python3-libfdt python3-pyelftools SDL-devel swig
|
BuildRequires: python3-libfdt python3-pyelftools SDL-devel swig
|
||||||
# this required when /usr/bin/python link to python3
|
# this required when /usr/bin/python link to python3
|
||||||
BuildRequires: python3-devel
|
BuildRequires: python3-devel
|
||||||
@ -32,6 +47,10 @@ BuildRequires: arm-trusted-firmware-armv8
|
|||||||
%endif
|
%endif
|
||||||
|
|
||||||
Requires: dtc systemd
|
Requires: dtc systemd
|
||||||
|
%ifarch aarch64 %{arm}
|
||||||
|
Obsoletes: uboot-images-elf < 2019.07
|
||||||
|
Provides: uboot-images-elf >= 2019.07
|
||||||
|
%endif
|
||||||
|
|
||||||
%description
|
%description
|
||||||
This package includes the mkimage program, which allows generation of U-Boot
|
This package includes the mkimage program, which allows generation of U-Boot
|
||||||
@ -62,8 +81,8 @@ u-boot bootloader images for armv7 boards
|
|||||||
%package -n uboot-images-elf
|
%package -n uboot-images-elf
|
||||||
Summary: u-boot bootloader images for armv7 boards
|
Summary: u-boot bootloader images for armv7 boards
|
||||||
Requires: uboot-tools
|
Requires: uboot-tools
|
||||||
Obsoletes: uboot-images-qemu
|
Obsoletes: uboot-images-qemu < %{version}-%{release}
|
||||||
Provides: uboot-images-qemu
|
Provides: uboot-images-qemu = %{version}-%{release}
|
||||||
|
|
||||||
%description -n uboot-images-elf
|
%description -n uboot-images-elf
|
||||||
u-boot bootloader ELF images for use with qemu and other platforms
|
u-boot bootloader ELF images for use with qemu and other platforms
|
||||||
@ -72,23 +91,24 @@ u-boot bootloader ELF images for use with qemu and other platforms
|
|||||||
%package_help
|
%package_help
|
||||||
|
|
||||||
%prep
|
%prep
|
||||||
%setup -q -n u-boot-%{version}
|
#%setup -q -n u-boot-%{version} -p1
|
||||||
|
%autosetup -p1 -n u-boot-%{version}
|
||||||
|
|
||||||
git init
|
#git init
|
||||||
git config --global gc.auto 0
|
#git config --global gc.auto 0
|
||||||
git config user.email "noone@example.com"
|
#git config user.email "noone@example.com"
|
||||||
git config user.name "no one"
|
#git config user.name "no one"
|
||||||
git add .
|
#git add .
|
||||||
git commit -a -q -m "%{version} baseline"
|
#git commit -a -q -m "%{version} baseline"
|
||||||
git am %{patches} </dev/null
|
#git am %{patches} </dev/null
|
||||||
git config --unset user.email
|
#git config --unset user.email
|
||||||
git config --unset user.name
|
#git config --unset user.name
|
||||||
rm -rf .git
|
#rm -rf .git
|
||||||
|
|
||||||
cp %SOURCE1 %SOURCE2 %SOURCE3 %SOURCE4 .
|
cp %SOURCE1 %SOURCE2 %SOURCE3 %SOURCE4 .
|
||||||
|
|
||||||
# use python2 shebang explicitly
|
# use python2 shebang explicitly
|
||||||
find . -name "*.py" -exec sed -i -r 's!/usr/bin/python(\s|$)!/usr/bin/python2\1!' {} \;
|
#find . -name "*.py" -exec sed -i -r 's!/usr/bin/python(\s|$)!/usr/bin/python2\1!' {} \;
|
||||||
|
|
||||||
%build
|
%build
|
||||||
mkdir builds
|
mkdir builds
|
||||||
@ -103,30 +123,29 @@ do
|
|||||||
fi
|
fi
|
||||||
|
|
||||||
mkdir builds/$(echo $board)/
|
mkdir builds/$(echo $board)/
|
||||||
sun50i=(a64-olinuxino bananapi_m64 libretech_all_h3_cc_h5 nanopi_neo2 nanopi_neo_plus2 orangepi_pc2 orangepi_prime orangepi_win orangepi_zero_plus orangepi_zero_plus2 pine64_plus sopine_baseboard)
|
sun50i=(a64-olinuxino amarula_a64_relic bananapi_m2_plus_h5 bananapi_m64 libretech_all_h3_cc_h5 nanopi_neo2 nanopi_neo_plus2 orangepi_pc2 orangepi_prime orangepi_win orangepi_zero_plus orangepi_zero_plus2 pine64-lts pine64_plus pinebook pinephone pinetab sopine_baseboard teres_i)
|
||||||
if [[ " ${sun50i[*]} " == *" $board "* ]]; then
|
if [[ " ${sun50i[*]} " == *" $board "* ]]; then
|
||||||
echo "Board: $board using sun50i_a64"
|
echo "Board: $board using sun50i_a64"
|
||||||
cp /usr/share/arm-trusted-firmware/sun50i_a64/* builds/$(echo $board)/
|
cp /usr/share/arm-trusted-firmware/sun50i_a64/* builds/$(echo $board)/
|
||||||
fi
|
fi
|
||||||
sun50i=(orangepi_one_plus pine_h64)
|
sun50h6=(orangepi_lite2 orangepi_one_plus pine_h64)
|
||||||
if [[ " ${sun50i[*]} " == *" $board "* ]]; then
|
if [[ " ${sun50h6[*]} " == *" $board "* ]]; then
|
||||||
echo "Board: $board using sun50i_h6"
|
echo "Board: $board using sun50i_h6"
|
||||||
cp /usr/share/arm-trusted-firmware/sun50i_h6/* builds/$(echo $board)/
|
cp /usr/share/arm-trusted-firmware/sun50i_h6/* builds/$(echo $board)/
|
||||||
fi
|
fi
|
||||||
rk3399=(evb-rk3399 firefly-rk3399 rock960-rk3399)
|
rk3328=(evb-rk3328 rock64-rk3328)
|
||||||
|
if [[ " ${rk3328[*]} " == *" $board "* ]]; then
|
||||||
|
echo "Board: $board using rk3328"
|
||||||
|
cp /usr/share/arm-trusted-firmware/rk3328/* builds/$(echo $board)/
|
||||||
|
fi
|
||||||
|
rk3399=(evb-rk3399 ficus-rk3399 khadas-edge-captain-rk3399 khadas-edge-v-rk3399 khadas-edge-rk3399 nanopc-t4-rk3399 nanopi-m4-rk3399 nanopi-neo4-rk3399 orangepi-rk3399 pinebook-pro-rk3399 puma-rk3399 rock960-rk3399 rock-pi-4-rk3399 rockpro64-rk3399 roc-pc-rk3399)
|
||||||
if [[ " ${rk3399[*]} " == *" $board "* ]]; then
|
if [[ " ${rk3399[*]} " == *" $board "* ]]; then
|
||||||
echo "Board: $board using rk3399"
|
echo "Board: $board using rk3399"
|
||||||
cp /usr/share/arm-trusted-firmware/rk3399/* builds/$(echo $board)/
|
cp /usr/share/arm-trusted-firmware/rk3399/* builds/$(echo $board)/
|
||||||
fi
|
fi
|
||||||
|
# End ATF
|
||||||
make $(echo $board)_defconfig O=builds/$(echo $board)/
|
make $(echo $board)_defconfig O=builds/$(echo $board)/
|
||||||
make HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" %{?_smp_mflags} V=1 O=builds/$(echo $board)/
|
make HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" %{?_smp_mflags} V=1 O=builds/$(echo $board)/
|
||||||
rk33xx=(evb-rk3399)
|
|
||||||
if [[ " ${rk33xx[*]} " == *" $board "* ]]; then
|
|
||||||
echo "Board: $board using rk33xx"
|
|
||||||
make HOSTCC="gcc $RPM_OPT_FLAGS" CROSS_COMPILE="" u-boot.itb V=1 O=builds/$(echo $board)/
|
|
||||||
builds/$(echo $board)/tools/mkimage -n rk3399 -T rksd -d builds/$(echo $board)/spl/u-boot-spl.bin builds/$(echo $board)/spl_sd.img
|
|
||||||
builds/$(echo $board)/tools/mkimage -n rk3399 -T rkspi -d builds/$(echo $board)/spl/u-boot-spl.bin builds/$(echo $board)/spl_spi.img
|
|
||||||
fi
|
|
||||||
done
|
done
|
||||||
%endif
|
%endif
|
||||||
|
|
||||||
@ -182,6 +201,8 @@ do
|
|||||||
done
|
done
|
||||||
%endif
|
%endif
|
||||||
|
|
||||||
|
#/////////////////////////////////////////
|
||||||
|
%if 0
|
||||||
%ifarch aarch64
|
%ifarch aarch64
|
||||||
for board in $(cat %{_arch}-boards)
|
for board in $(cat %{_arch}-boards)
|
||||||
do
|
do
|
||||||
@ -221,7 +242,10 @@ mkdir -p %{buildroot}%{_datadir}/uboot/elf/$(echo $board)/
|
|||||||
done
|
done
|
||||||
%endif
|
%endif
|
||||||
|
|
||||||
for tool in bmp_logo dumpimage easylogo/easylogo env/fw_printenv fit_check_sign fit_info gdb/gdbcont gdb/gdbsend gen_eth_addr gen_ethaddr_crc img2srec mkenvimage mkimage mksunxiboot ncb proftool sunxi-spl-image-builder ubsha1 xway-swap-bytes
|
%endif
|
||||||
|
#/////////////////////////////////////////
|
||||||
|
|
||||||
|
for tool in bmp_logo dumpimage env/fw_printenv fit_check_sign fit_info gdb/gdbcont gdb/gdbsend gen_eth_addr gen_ethaddr_crc img2srec mkenvimage mkimage mksunxiboot ncb proftool sunxi-spl-image-builder ubsha1 xway-swap-bytes
|
||||||
do
|
do
|
||||||
install -p -m 0755 builds/tools/$tool %{buildroot}%{_bindir}
|
install -p -m 0755 builds/tools/$tool %{buildroot}%{_bindir}
|
||||||
done
|
done
|
||||||
@ -236,7 +260,7 @@ mkdir -p %{buildroot}/lib/kernel/install.d/
|
|||||||
install -p -m 0755 %{SOURCE5} %{buildroot}/lib/kernel/install.d/
|
install -p -m 0755 %{SOURCE5} %{buildroot}/lib/kernel/install.d/
|
||||||
|
|
||||||
mkdir -p builds/docs
|
mkdir -p builds/docs
|
||||||
cp -p board/amlogic/odroid-c2/README builds/docs/README.odroid-c2
|
#cp -p board/amlogic/odroid-c2/README builds/docs/README.odroid-c2
|
||||||
cp -p board/hisilicon/hikey/README builds/docs/README.hikey
|
cp -p board/hisilicon/hikey/README builds/docs/README.hikey
|
||||||
cp -p board/hisilicon/hikey/README builds/docs/README.hikey
|
cp -p board/hisilicon/hikey/README builds/docs/README.hikey
|
||||||
cp -p board/Marvell/db-88f6820-gp/README builds/docs/README.mvebu-db-88f6820
|
cp -p board/Marvell/db-88f6820-gp/README builds/docs/README.mvebu-db-88f6820
|
||||||
@ -264,30 +288,33 @@ cp -p board/warp7/README builds/docs/README.warp7
|
|||||||
%files -n uboot-images-armv8
|
%files -n uboot-images-armv8
|
||||||
%defattr(-,root,root)
|
%defattr(-,root,root)
|
||||||
%{_datadir}/uboot/*
|
%{_datadir}/uboot/*
|
||||||
%exclude %{_datadir}/uboot/elf
|
#%exclude %{_datadir}/uboot/elf
|
||||||
%endif
|
%endif
|
||||||
|
|
||||||
%ifarch %{arm}
|
%ifarch %{arm}
|
||||||
%files -n uboot-images-armv7
|
%files -n uboot-images-armv7
|
||||||
%defattr(-,root,root)
|
%defattr(-,root,root)
|
||||||
%{_datadir}/uboot/*
|
%{_datadir}/uboot/*
|
||||||
%exclude %{_datadir}/uboot/elf
|
#%exclude %{_datadir}/uboot/elf
|
||||||
%endif
|
%endif
|
||||||
|
|
||||||
%ifarch %{arm} aarch64
|
%ifarch %{arm} aarch64
|
||||||
%files -n uboot-images-elf
|
%files -n uboot-images-elf
|
||||||
%defattr(-,root,root)
|
%defattr(-,root,root)
|
||||||
%{_datadir}/uboot/elf/*
|
#%{_datadir}/uboot/elf/*
|
||||||
%endif
|
%endif
|
||||||
|
|
||||||
%files help
|
%files help
|
||||||
%defattr(-,root,root)
|
%doc README doc/README.kwbimage doc/README.distro doc/README.gpt
|
||||||
%doc doc/README.imximage doc/README.kwbimage doc/README.distro
|
%doc doc/README.odroid doc/README.rockchip doc/uefi doc/uImage.FIT
|
||||||
%doc doc/README.gpt doc/README.odroid doc/README.rockchip doc/README.uefi
|
%doc doc/README.chromium builds/docs/* doc/arch/arm64.rst
|
||||||
%doc doc/uImage.FIT doc/README.arm64 doc/README.chromium builds/docs/*
|
%doc doc/board/amlogic/ doc/board/rockchip/
|
||||||
%{_mandir}/man1/mkimage.1.gz
|
%{_mandir}/man1/mkimage.1*
|
||||||
|
|
||||||
%changelog
|
%changelog
|
||||||
|
* Fri Jul 31 2020 chengguipeng<chengguipeng1@huawei.com> 2020.07-1
|
||||||
|
- Upgrade to 2020.07-1
|
||||||
|
|
||||||
* Fri Jun 19 2020 zhujunhao <zhujunhao8@huawei.com> - 2018.09-9
|
* Fri Jun 19 2020 zhujunhao <zhujunhao8@huawei.com> - 2018.09-9
|
||||||
- drop python2 requires
|
- drop python2 requires
|
||||||
|
|
||||||
@ -320,4 +347,3 @@ cp -p board/warp7/README builds/docs/README.warp7
|
|||||||
|
|
||||||
* Sat Oct 12 2019 openEuler Buildteam <buildteam@openeuler.org> - 2018.09-3
|
* Sat Oct 12 2019 openEuler Buildteam <buildteam@openeuler.org> - 2018.09-3
|
||||||
- Package init
|
- Package init
|
||||||
|
|
||||||
|
|||||||
83
uefi-distro-load-FDT-from-any-partition-on-boot-device.patch
Normal file
83
uefi-distro-load-FDT-from-any-partition-on-boot-device.patch
Normal file
@ -0,0 +1,83 @@
|
|||||||
|
From 67c05a07288ef24b3ac9d013f35a0868d26a34c7 Mon Sep 17 00:00:00 2001
|
||||||
|
From: Peter Robinson <pbrobinson@gmail.com>
|
||||||
|
Date: Tue, 18 Jun 2019 11:51:21 +0100
|
||||||
|
Subject: [PATCH 1/2] distro: load FDT from any partition on boot device
|
||||||
|
|
||||||
|
In the EFI_LOADER boot path, we were only checking the FAT partition
|
||||||
|
containing the EFI payload for dtb files. But this is somewhat of a
|
||||||
|
fiction. In reality there will be one small (V)FAT partition containing
|
||||||
|
grub (or whatever the payload may be), and a second boot partition
|
||||||
|
containing kernel/initrd/fdt (typically ext4). It is this second
|
||||||
|
partition where we should be looking for a FDT to load.
|
||||||
|
|
||||||
|
So instead scan all the partitions of the disk containing the EFI
|
||||||
|
payload. This matches where grub looks for kernel/initrd (barring
|
||||||
|
custom grub.cfg, in which case the user can use grub's 'devicetree'
|
||||||
|
command to load the correct FDT).
|
||||||
|
|
||||||
|
The other option is somehow passing the ${fdtfile} to grub so that it
|
||||||
|
can load the FDT based on selected kernel version location (which grub
|
||||||
|
knows) and SoC/board specific ${fdtfile} (which grub does not know).
|
||||||
|
|
||||||
|
Signed-off-by: Rob Clark <robdclark@gmail.com>
|
||||||
|
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
|
||||||
|
---
|
||||||
|
include/config_distro_bootcmd.h | 34 ++++++++++++++++++++++-----------
|
||||||
|
1 file changed, 23 insertions(+), 11 deletions(-)
|
||||||
|
|
||||||
|
diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h
|
||||||
|
index 4993303f4d..f4b3b62fca 100644
|
||||||
|
--- a/include/config_distro_bootcmd.h
|
||||||
|
+++ b/include/config_distro_bootcmd.h
|
||||||
|
@@ -138,25 +138,37 @@
|
||||||
|
"fi\0" \
|
||||||
|
\
|
||||||
|
"load_efi_dtb=" \
|
||||||
|
- "load ${devtype} ${devnum}:${distro_bootpart} " \
|
||||||
|
- "${fdt_addr_r} ${prefix}${efi_fdtfile}\0" \
|
||||||
|
+ "load ${devtype} ${devnum}:${dtb_devp} " \
|
||||||
|
+ "${fdt_addr_r} ${prefix}${efi_fdtfile} && " \
|
||||||
|
+ "run boot_efi_binary\0" \
|
||||||
|
\
|
||||||
|
"efi_dtb_prefixes=/ /dtb/ /dtb/current/\0" \
|
||||||
|
- "scan_dev_for_efi=" \
|
||||||
|
+ "scan_dev_for_dtb=" \
|
||||||
|
"setenv efi_fdtfile ${fdtfile}; " \
|
||||||
|
BOOTENV_EFI_SET_FDTFILE_FALLBACK \
|
||||||
|
- "for prefix in ${efi_dtb_prefixes}; do " \
|
||||||
|
- "if test -e ${devtype} " \
|
||||||
|
- "${devnum}:${distro_bootpart} " \
|
||||||
|
- "${prefix}${efi_fdtfile}; then " \
|
||||||
|
- "run load_efi_dtb; " \
|
||||||
|
- "fi;" \
|
||||||
|
- "done;" \
|
||||||
|
+ "part list ${devtype} ${devnum} dtb_devplist; " \
|
||||||
|
+ "env exists dtb_devplist || setenv dtb_devplist " \
|
||||||
|
+ "${distro_bootpart}; " \
|
||||||
|
+ "for dtb_devp in ${dtb_devplist}; do " \
|
||||||
|
+ "for prefix in ${efi_dtb_prefixes}; do " \
|
||||||
|
+ "if test -e ${devtype} " \
|
||||||
|
+ "${devnum}:${dtb_devp} " \
|
||||||
|
+ "${prefix}${efi_fdtfile};"\
|
||||||
|
+ " then " \
|
||||||
|
+ "echo Found DTB ${devtype} " \
|
||||||
|
+ "${devnum}:${dtb_devp} " \
|
||||||
|
+ "${prefix}${efi_fdtfile};"\
|
||||||
|
+ "run load_efi_dtb; " \
|
||||||
|
+ "fi;" \
|
||||||
|
+ "done; " \
|
||||||
|
+ "done; " \
|
||||||
|
+ "run boot_efi_binary\0" \
|
||||||
|
+ "scan_dev_for_efi=" \
|
||||||
|
"if test -e ${devtype} ${devnum}:${distro_bootpart} " \
|
||||||
|
"efi/boot/"BOOTEFI_NAME"; then " \
|
||||||
|
"echo Found EFI removable media binary " \
|
||||||
|
"efi/boot/"BOOTEFI_NAME"; " \
|
||||||
|
- "run boot_efi_binary; " \
|
||||||
|
+ "run scan_dev_for_dtb; " \
|
||||||
|
"echo EFI LOAD FAILED: continuing...; " \
|
||||||
|
"fi; " \
|
||||||
|
"setenv efi_fdtfile\0"
|
||||||
|
--
|
||||||
|
2.21.0
|
||||||
|
|
||||||
50
uefi-use-Fedora-specific-path-name.patch
Normal file
50
uefi-use-Fedora-specific-path-name.patch
Normal file
@ -0,0 +1,50 @@
|
|||||||
|
From 3cc3f7de06dcf9614554d63b159f0cd6710b96b0 Mon Sep 17 00:00:00 2001
|
||||||
|
From: Peter Robinson <pbrobinson@gmail.com>
|
||||||
|
Date: Tue, 18 Jun 2019 12:08:57 +0100
|
||||||
|
Subject: [PATCH 2/2] use Fedora specific EFI path/name
|
||||||
|
|
||||||
|
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
|
||||||
|
---
|
||||||
|
include/config_distro_bootcmd.h | 10 +++++-----
|
||||||
|
1 file changed, 5 insertions(+), 5 deletions(-)
|
||||||
|
|
||||||
|
diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h
|
||||||
|
index f4b3b62fca..2dc8be9815 100644
|
||||||
|
--- a/include/config_distro_bootcmd.h
|
||||||
|
+++ b/include/config_distro_bootcmd.h
|
||||||
|
@@ -92,9 +92,9 @@
|
||||||
|
|
||||||
|
#ifdef CONFIG_EFI_LOADER
|
||||||
|
#if defined(CONFIG_ARM64)
|
||||||
|
-#define BOOTEFI_NAME "bootaa64.efi"
|
||||||
|
+#define BOOTEFI_NAME "grubaa64.efi"
|
||||||
|
#elif defined(CONFIG_ARM)
|
||||||
|
-#define BOOTEFI_NAME "bootarm.efi"
|
||||||
|
+#define BOOTEFI_NAME "grubarm.efi"
|
||||||
|
#elif defined(CONFIG_X86_RUN_32BIT)
|
||||||
|
#define BOOTEFI_NAME "bootia32.efi"
|
||||||
|
#elif defined(CONFIG_X86_RUN_64BIT)
|
||||||
|
@@ -130,7 +130,7 @@
|
||||||
|
"bootefi bootmgr ${fdtcontroladdr};" \
|
||||||
|
"fi;" \
|
||||||
|
"load ${devtype} ${devnum}:${distro_bootpart} " \
|
||||||
|
- "${kernel_addr_r} efi/boot/"BOOTEFI_NAME"; " \
|
||||||
|
+ "${kernel_addr_r} efi/fedora/"BOOTEFI_NAME"; " \
|
||||||
|
"if fdt addr ${fdt_addr_r}; then " \
|
||||||
|
"bootefi ${kernel_addr_r} ${fdt_addr_r};" \
|
||||||
|
"else " \
|
||||||
|
@@ -165,9 +165,9 @@
|
||||||
|
"run boot_efi_binary\0" \
|
||||||
|
"scan_dev_for_efi=" \
|
||||||
|
"if test -e ${devtype} ${devnum}:${distro_bootpart} " \
|
||||||
|
- "efi/boot/"BOOTEFI_NAME"; then " \
|
||||||
|
+ "efi/fedora/"BOOTEFI_NAME"; then " \
|
||||||
|
"echo Found EFI removable media binary " \
|
||||||
|
- "efi/boot/"BOOTEFI_NAME"; " \
|
||||||
|
+ "efi/fedora/"BOOTEFI_NAME"; " \
|
||||||
|
"run scan_dev_for_dtb; " \
|
||||||
|
"echo EFI LOAD FAILED: continuing...; " \
|
||||||
|
"fi; " \
|
||||||
|
--
|
||||||
|
2.21.0
|
||||||
|
|
||||||
@ -1,19 +1,19 @@
|
|||||||
From 1a8fa60aedff8a2368ac357a51dc15357065fabe Mon Sep 17 00:00:00 2001
|
From a49845f198af088c4e5e0019edbf519344d78c97 Mon Sep 17 00:00:00 2001
|
||||||
From: Peter Robinson <pbrobinson@gmail.com>
|
From: Peter Robinson <pbrobinson@gmail.com>
|
||||||
Date: Tue, 5 Dec 2017 00:11:54 +0000
|
Date: Tue, 4 Dec 2018 15:29:14 +0000
|
||||||
Subject: [PATCH 3/5] usb kbd fixes
|
Subject: [PATCH] usb kbd fixes
|
||||||
|
|
||||||
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
|
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
|
||||||
---
|
---
|
||||||
common/usb_kbd.c | 66 +++++++++++++++++++++++++++++++++++++++++--------------
|
common/usb_kbd.c | 66 +++++++++++++++++++++++++++++++++++------------
|
||||||
include/console.h | 2 --
|
include/console.h | 2 --
|
||||||
2 files changed, 50 insertions(+), 18 deletions(-)
|
2 files changed, 50 insertions(+), 18 deletions(-)
|
||||||
|
|
||||||
diff --git a/common/usb_kbd.c b/common/usb_kbd.c
|
diff --git a/common/usb_kbd.c b/common/usb_kbd.c
|
||||||
index 8cbdba6ac2..82ad93f6ca 100644
|
index 020f0d4117f..47674ce4458 100644
|
||||||
--- a/common/usb_kbd.c
|
--- a/common/usb_kbd.c
|
||||||
+++ b/common/usb_kbd.c
|
+++ b/common/usb_kbd.c
|
||||||
@@ -516,25 +516,59 @@ static int probe_usb_keyboard(struct usb_device *dev)
|
@@ -518,25 +518,59 @@ static int probe_usb_keyboard(struct usb_device *dev)
|
||||||
return error;
|
return error;
|
||||||
|
|
||||||
stdinname = env_get("stdin");
|
stdinname = env_get("stdin");
|
||||||
@ -87,8 +87,8 @@ index 8cbdba6ac2..82ad93f6ca 100644
|
|||||||
+#endif
|
+#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifndef CONFIG_DM_USB
|
#if !CONFIG_IS_ENABLED(DM_USB)
|
||||||
@@ -640,7 +674,7 @@ static int usb_kbd_remove(struct udevice *dev)
|
@@ -642,7 +676,7 @@ static int usb_kbd_remove(struct udevice *dev)
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
err:
|
err:
|
||||||
@ -98,10 +98,10 @@ index 8cbdba6ac2..82ad93f6ca 100644
|
|||||||
}
|
}
|
||||||
|
|
||||||
diff --git a/include/console.h b/include/console.h
|
diff --git a/include/console.h b/include/console.h
|
||||||
index cea29ed6dc..7dfd36d7d1 100644
|
index e935c601f12..6382ec8e0d6 100644
|
||||||
--- a/include/console.h
|
--- a/include/console.h
|
||||||
+++ b/include/console.h
|
+++ b/include/console.h
|
||||||
@@ -57,8 +57,6 @@ int console_announce_r(void);
|
@@ -56,8 +56,6 @@ int console_announce_r(void);
|
||||||
/*
|
/*
|
||||||
* CONSOLE multiplexing.
|
* CONSOLE multiplexing.
|
||||||
*/
|
*/
|
||||||
@ -111,5 +111,5 @@ index cea29ed6dc..7dfd36d7d1 100644
|
|||||||
|
|
||||||
#endif
|
#endif
|
||||||
--
|
--
|
||||||
2.14.3
|
2.19.2
|
||||||
|
|
||||||
|
|||||||
707
usb-xhci-Load-Raspberry-Pi-4-VL805-s-firmware.patch
Normal file
707
usb-xhci-Load-Raspberry-Pi-4-VL805-s-firmware.patch
Normal file
@ -0,0 +1,707 @@
|
|||||||
|
From patchwork Mon Jun 22 15:30:48 2020
|
||||||
|
Content-Type: text/plain; charset="utf-8"
|
||||||
|
MIME-Version: 1.0
|
||||||
|
Content-Transfer-Encoding: 7bit
|
||||||
|
X-Patchwork-Submitter: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
|
||||||
|
X-Patchwork-Id: 1314562
|
||||||
|
X-Patchwork-Delegate: matthias.bgg@gmail.com
|
||||||
|
Return-Path: <u-boot-bounces@lists.denx.de>
|
||||||
|
X-Original-To: incoming@patchwork.ozlabs.org
|
||||||
|
Delivered-To: patchwork-incoming@bilbo.ozlabs.org
|
||||||
|
Authentication-Results: ozlabs.org;
|
||||||
|
spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de
|
||||||
|
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|
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|
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|
(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)
|
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|
key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest
|
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|
SHA256) (No client certificate requested)
|
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|
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|
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|
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|
Cc: m.szyprowski@samsung.com, s.nawrocki@samsung.com,
|
||||||
|
Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
|
||||||
|
Subject: [PATCH v5 1/4] arm: rpi: Add function to trigger VL805's firmware load
|
||||||
|
Date: Mon, 22 Jun 2020 17:30:48 +0200
|
||||||
|
Message-Id: <20200622153050.23193-2-nsaenzjulienne@suse.de>
|
||||||
|
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|
||||||
|
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|
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|
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|
||||||
|
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|
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|
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|
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|
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|
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|
||||||
|
Sender: "U-Boot" <u-boot-bounces@lists.denx.de>
|
||||||
|
X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de
|
||||||
|
X-Virus-Status: Clean
|
||||||
|
|
||||||
|
On the Raspberry Pi 4, after a PCI reset, VL805's (a xHCI chip) firmware
|
||||||
|
may either be loaded directly from an EEPROM or, if not present, by the
|
||||||
|
SoC's VideCore (the SoC's co-processor). Introduce the function that
|
||||||
|
informs VideCore that VL805 may need its firmware loaded.
|
||||||
|
|
||||||
|
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
|
||||||
|
---
|
||||||
|
Changes since v1:
|
||||||
|
- Rename function so it's not mistaken with regular firmware loading
|
||||||
|
|
||||||
|
arch/arm/mach-bcm283x/include/mach/mbox.h | 13 +++++++
|
||||||
|
arch/arm/mach-bcm283x/include/mach/msg.h | 7 ++++
|
||||||
|
arch/arm/mach-bcm283x/msg.c | 46 +++++++++++++++++++++++
|
||||||
|
3 files changed, 66 insertions(+)
|
||||||
|
|
||||||
|
diff --git a/arch/arm/mach-bcm283x/include/mach/mbox.h b/arch/arm/mach-bcm283x/include/mach/mbox.h
|
||||||
|
index 60e226ce1d..2ae2d3d97c 100644
|
||||||
|
--- a/arch/arm/mach-bcm283x/include/mach/mbox.h
|
||||||
|
+++ b/arch/arm/mach-bcm283x/include/mach/mbox.h
|
||||||
|
@@ -491,6 +491,19 @@ struct bcm2835_mbox_tag_set_palette {
|
||||||
|
} body;
|
||||||
|
};
|
||||||
|
|
||||||
|
+#define BCM2835_MBOX_TAG_NOTIFY_XHCI_RESET 0x00030058
|
||||||
|
+
|
||||||
|
+struct bcm2835_mbox_tag_pci_dev_addr {
|
||||||
|
+ struct bcm2835_mbox_tag_hdr tag_hdr;
|
||||||
|
+ union {
|
||||||
|
+ struct {
|
||||||
|
+ u32 dev_addr;
|
||||||
|
+ } req;
|
||||||
|
+ struct {
|
||||||
|
+ } resp;
|
||||||
|
+ } body;
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
/*
|
||||||
|
* Pass a raw u32 message to the VC, and receive a raw u32 back.
|
||||||
|
*
|
||||||
|
diff --git a/arch/arm/mach-bcm283x/include/mach/msg.h b/arch/arm/mach-bcm283x/include/mach/msg.h
|
||||||
|
index 4afb08631b..e45c1bf010 100644
|
||||||
|
--- a/arch/arm/mach-bcm283x/include/mach/msg.h
|
||||||
|
+++ b/arch/arm/mach-bcm283x/include/mach/msg.h
|
||||||
|
@@ -48,4 +48,11 @@ int bcm2835_set_video_params(int *widthp, int *heightp, int depth_bpp,
|
||||||
|
int pixel_order, int alpha_mode, ulong *fb_basep,
|
||||||
|
ulong *fb_sizep, int *pitchp);
|
||||||
|
|
||||||
|
+/**
|
||||||
|
+ * bcm2711_load_vl805_firmware() - get vl805's firmware loaded
|
||||||
|
+ *
|
||||||
|
+ * @return 0 if OK, -EIO on error
|
||||||
|
+ */
|
||||||
|
+int bcm2711_notify_vl805_reset(void);
|
||||||
|
+
|
||||||
|
#endif
|
||||||
|
diff --git a/arch/arm/mach-bcm283x/msg.c b/arch/arm/mach-bcm283x/msg.c
|
||||||
|
index 94b75283f8..347aece3cd 100644
|
||||||
|
--- a/arch/arm/mach-bcm283x/msg.c
|
||||||
|
+++ b/arch/arm/mach-bcm283x/msg.c
|
||||||
|
@@ -7,6 +7,7 @@
|
||||||
|
#include <memalign.h>
|
||||||
|
#include <phys2bus.h>
|
||||||
|
#include <asm/arch/mbox.h>
|
||||||
|
+#include <linux/delay.h>
|
||||||
|
|
||||||
|
struct msg_set_power_state {
|
||||||
|
struct bcm2835_mbox_hdr hdr;
|
||||||
|
@@ -40,6 +41,12 @@ struct msg_setup {
|
||||||
|
u32 end_tag;
|
||||||
|
};
|
||||||
|
|
||||||
|
+struct msg_notify_vl805_reset {
|
||||||
|
+ struct bcm2835_mbox_hdr hdr;
|
||||||
|
+ struct bcm2835_mbox_tag_pci_dev_addr dev_addr;
|
||||||
|
+ u32 end_tag;
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
int bcm2835_power_on_module(u32 module)
|
||||||
|
{
|
||||||
|
ALLOC_CACHE_ALIGN_BUFFER(struct msg_set_power_state, msg_pwr, 1);
|
||||||
|
@@ -151,3 +158,42 @@ int bcm2835_set_video_params(int *widthp, int *heightp, int depth_bpp,
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
+
|
||||||
|
+/*
|
||||||
|
+ * On the Raspberry Pi 4, after a PCI reset, VL805's (the xHCI chip) firmware
|
||||||
|
+ * may either be loaded directly from an EEPROM or, if not present, by the
|
||||||
|
+ * SoC's VideoCore. This informs VideoCore that VL805 needs its firmware
|
||||||
|
+ * loaded.
|
||||||
|
+ */
|
||||||
|
+int bcm2711_notify_vl805_reset(void)
|
||||||
|
+{
|
||||||
|
+ ALLOC_CACHE_ALIGN_BUFFER(struct msg_notify_vl805_reset,
|
||||||
|
+ msg_notify_vl805_reset, 1);
|
||||||
|
+ int ret;
|
||||||
|
+
|
||||||
|
+ BCM2835_MBOX_INIT_HDR(msg_notify_vl805_reset);
|
||||||
|
+ BCM2835_MBOX_INIT_TAG(&msg_notify_vl805_reset->dev_addr,
|
||||||
|
+ NOTIFY_XHCI_RESET);
|
||||||
|
+
|
||||||
|
+ /*
|
||||||
|
+ * The pci device address is expected like this:
|
||||||
|
+ *
|
||||||
|
+ * PCI_BUS << 20 | PCI_SLOT << 15 | PCI_FUNC << 12
|
||||||
|
+ *
|
||||||
|
+ * But since RPi4's PCIe setup is hardwired, we know the address in
|
||||||
|
+ * advance.
|
||||||
|
+ */
|
||||||
|
+ msg_notify_vl805_reset->dev_addr.body.req.dev_addr = 0x100000;
|
||||||
|
+
|
||||||
|
+ ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN,
|
||||||
|
+ &msg_notify_vl805_reset->hdr);
|
||||||
|
+ if (ret) {
|
||||||
|
+ printf("bcm2711: Faild to load vl805's firmware, %d\n", ret);
|
||||||
|
+ return -EIO;
|
||||||
|
+ }
|
||||||
|
+
|
||||||
|
+ udelay(200);
|
||||||
|
+
|
||||||
|
+ return 0;
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
|
||||||
|
From patchwork Mon Jun 22 15:30:49 2020
|
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|
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|
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Content-Transfer-Encoding: 7bit
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|
X-Patchwork-Submitter: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
|
||||||
|
X-Patchwork-Id: 1314565
|
||||||
|
X-Patchwork-Delegate: matthias.bgg@gmail.com
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|
Mon, 22 Jun 2020 15:31:22 +0000 (UTC)
|
||||||
|
From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
|
||||||
|
To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com,
|
||||||
|
sjg@chromium.org, marex@denx.de
|
||||||
|
Cc: m.szyprowski@samsung.com, s.nawrocki@samsung.com,
|
||||||
|
Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
|
||||||
|
Subject: [PATCH v5 2/4] reset: Add Raspberry Pi 4 firmware reset controller
|
||||||
|
Date: Mon, 22 Jun 2020 17:30:49 +0200
|
||||||
|
Message-Id: <20200622153050.23193-3-nsaenzjulienne@suse.de>
|
||||||
|
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|
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|
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|
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|
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|
X-Virus-Status: Clean
|
||||||
|
|
||||||
|
Raspberry Pi 4's co-processor controls some of the board's HW
|
||||||
|
initialization process, but it's up to Linux to trigger it when
|
||||||
|
relevant. Introduce a reset controller capable of interfacing with
|
||||||
|
RPi4's co-processor that models these firmware initialization routines as
|
||||||
|
reset lines.
|
||||||
|
|
||||||
|
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
|
||||||
|
---
|
||||||
|
drivers/reset/Kconfig | 10 ++++
|
||||||
|
drivers/reset/Makefile | 1 +
|
||||||
|
drivers/reset/reset-raspberrypi.c | 60 +++++++++++++++++++
|
||||||
|
.../reset/raspberrypi,firmware-reset.h | 13 ++++
|
||||||
|
4 files changed, 84 insertions(+)
|
||||||
|
create mode 100644 drivers/reset/reset-raspberrypi.c
|
||||||
|
create mode 100644 include/dt-bindings/reset/raspberrypi,firmware-reset.h
|
||||||
|
|
||||||
|
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
|
||||||
|
index 88d3be1593..d02c1522e5 100644
|
||||||
|
--- a/drivers/reset/Kconfig
|
||||||
|
+++ b/drivers/reset/Kconfig
|
||||||
|
@@ -148,4 +148,14 @@ config RESET_IMX7
|
||||||
|
help
|
||||||
|
Support for reset controller on i.MX7/8 SoCs.
|
||||||
|
|
||||||
|
+config RESET_RASPBERRYPI
|
||||||
|
+ bool "Raspberry Pi 4 Firmware Reset Controller Driver"
|
||||||
|
+ depends on DM_RESET && ARCH_BCM283X
|
||||||
|
+ default USB_XHCI_PCI
|
||||||
|
+ help
|
||||||
|
+ Raspberry Pi 4's co-processor controls some of the board's HW
|
||||||
|
+ initialization process, but it's up to Linux to trigger it when
|
||||||
|
+ relevant. This driver provides a reset controller capable of
|
||||||
|
+ interfacing with RPi4's co-processor and model these firmware
|
||||||
|
+ initialization routines as reset lines.
|
||||||
|
endmenu
|
||||||
|
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
|
||||||
|
index 0a044d5d8c..be54dae725 100644
|
||||||
|
--- a/drivers/reset/Makefile
|
||||||
|
+++ b/drivers/reset/Makefile
|
||||||
|
@@ -23,3 +23,4 @@ obj-$(CONFIG_RESET_MTMIPS) += reset-mtmips.o
|
||||||
|
obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o
|
||||||
|
obj-$(CONFIG_RESET_HISILICON) += reset-hisilicon.o
|
||||||
|
obj-$(CONFIG_RESET_IMX7) += reset-imx7.o
|
||||||
|
+obj-$(CONFIG_RESET_RASPBERRYPI) += reset-raspberrypi.o
|
||||||
|
diff --git a/drivers/reset/reset-raspberrypi.c b/drivers/reset/reset-raspberrypi.c
|
||||||
|
new file mode 100644
|
||||||
|
index 0000000000..e2d284e5ac
|
||||||
|
--- /dev/null
|
||||||
|
+++ b/drivers/reset/reset-raspberrypi.c
|
||||||
|
@@ -0,0 +1,60 @@
|
||||||
|
+// SPDX-License-Identifier: GPL-2.0
|
||||||
|
+/*
|
||||||
|
+ * Raspberry Pi 4 firmware reset driver
|
||||||
|
+ *
|
||||||
|
+ * Copyright (C) 2020 Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
|
||||||
|
+ */
|
||||||
|
+#include <common.h>
|
||||||
|
+#include <dm.h>
|
||||||
|
+#include <reset-uclass.h>
|
||||||
|
+#include <asm/arch/msg.h>
|
||||||
|
+#include <dt-bindings/reset/raspberrypi,firmware-reset.h>
|
||||||
|
+
|
||||||
|
+static int raspberrypi_reset_request(struct reset_ctl *reset_ctl)
|
||||||
|
+{
|
||||||
|
+ if (reset_ctl->id >= RASPBERRYPI_FIRMWARE_RESET_NUM_IDS)
|
||||||
|
+ return -EINVAL;
|
||||||
|
+
|
||||||
|
+ return 0;
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
+static int raspberrypi_reset_free(struct reset_ctl *reset_ctl)
|
||||||
|
+{
|
||||||
|
+ return 0;
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
+static int raspberrypi_reset_assert(struct reset_ctl *reset_ctl)
|
||||||
|
+{
|
||||||
|
+ switch (reset_ctl->id) {
|
||||||
|
+ case RASPBERRYPI_FIRMWARE_RESET_ID_USB:
|
||||||
|
+ bcm2711_notify_vl805_reset();
|
||||||
|
+ return 0;
|
||||||
|
+ default:
|
||||||
|
+ return -EINVAL;
|
||||||
|
+ }
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
+static int raspberrypi_reset_deassert(struct reset_ctl *reset_ctl)
|
||||||
|
+{
|
||||||
|
+ return 0;
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
+struct reset_ops raspberrypi_reset_ops = {
|
||||||
|
+ .request = raspberrypi_reset_request,
|
||||||
|
+ .rfree = raspberrypi_reset_free,
|
||||||
|
+ .rst_assert = raspberrypi_reset_assert,
|
||||||
|
+ .rst_deassert = raspberrypi_reset_deassert,
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
+static const struct udevice_id raspberrypi_reset_ids[] = {
|
||||||
|
+ { .compatible = "raspberrypi,firmware-reset" },
|
||||||
|
+ { }
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
+U_BOOT_DRIVER(raspberrypi_reset) = {
|
||||||
|
+ .name = "raspberrypi-reset",
|
||||||
|
+ .id = UCLASS_RESET,
|
||||||
|
+ .of_match = raspberrypi_reset_ids,
|
||||||
|
+ .ops = &raspberrypi_reset_ops,
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
diff --git a/include/dt-bindings/reset/raspberrypi,firmware-reset.h b/include/dt-bindings/reset/raspberrypi,firmware-reset.h
|
||||||
|
new file mode 100644
|
||||||
|
index 0000000000..1a4f4c7927
|
||||||
|
--- /dev/null
|
||||||
|
+++ b/include/dt-bindings/reset/raspberrypi,firmware-reset.h
|
||||||
|
@@ -0,0 +1,13 @@
|
||||||
|
+/* SPDX-License-Identifier: GPL-2.0 */
|
||||||
|
+/*
|
||||||
|
+ * Copyright (c) 2020 Nicolas Saenz Julienne
|
||||||
|
+ * Author: Nicolas Saenz Julienne <nsaenzjulienne@suse.com>
|
||||||
|
+ */
|
||||||
|
+
|
||||||
|
+#ifndef _DT_BINDINGS_RASPBERRYPI_FIRMWARE_RESET_H
|
||||||
|
+#define _DT_BINDINGS_RASPBERRYPI_FIRMWARE_RESET_H
|
||||||
|
+
|
||||||
|
+#define RASPBERRYPI_FIRMWARE_RESET_ID_USB 0
|
||||||
|
+#define RASPBERRYPI_FIRMWARE_RESET_NUM_IDS 1
|
||||||
|
+
|
||||||
|
+#endif
|
||||||
|
|
||||||
|
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|
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|
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|
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|
X-Patchwork-Id: 1314564
|
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|
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|
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To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com,
|
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|
sjg@chromium.org, marex@denx.de
|
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|
Cc: m.szyprowski@samsung.com, s.nawrocki@samsung.com,
|
||||||
|
Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
|
||||||
|
Subject: [PATCH v5 3/4] configs: Enable support for reset controllers on RPi4
|
||||||
|
Date: Mon, 22 Jun 2020 17:30:50 +0200
|
||||||
|
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|
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|
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|
|
||||||
|
This is required in order to access the reset controller used to
|
||||||
|
initialize the board's xHCI chip.
|
||||||
|
|
||||||
|
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
|
||||||
|
---
|
||||||
|
configs/rpi_4_32b_defconfig | 1 +
|
||||||
|
configs/rpi_4_defconfig | 1 +
|
||||||
|
configs/rpi_arm64_defconfig | 1 +
|
||||||
|
3 files changed, 3 insertions(+)
|
||||||
|
|
||||||
|
diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig
|
||||||
|
index b0797373b5..00c8d963ab 100644
|
||||||
|
--- a/configs/rpi_4_32b_defconfig
|
||||||
|
+++ b/configs/rpi_4_32b_defconfig
|
||||||
|
@@ -35,6 +35,7 @@ CONFIG_DM_PCI=y
|
||||||
|
CONFIG_PCI_BRCMSTB=y
|
||||||
|
CONFIG_PINCTRL=y
|
||||||
|
# CONFIG_PINCTRL_GENERIC is not set
|
||||||
|
+CONFIG_DM_RESET=y
|
||||||
|
# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
|
||||||
|
CONFIG_USB=y
|
||||||
|
CONFIG_DM_USB=y
|
||||||
|
diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig
|
||||||
|
index 932b768164..c73eccb61c 100644
|
||||||
|
--- a/configs/rpi_4_defconfig
|
||||||
|
+++ b/configs/rpi_4_defconfig
|
||||||
|
@@ -35,6 +35,7 @@ CONFIG_DM_PCI=y
|
||||||
|
CONFIG_PCI_BRCMSTB=y
|
||||||
|
CONFIG_PINCTRL=y
|
||||||
|
# CONFIG_PINCTRL_GENERIC is not set
|
||||||
|
+CONFIG_DM_RESET=y
|
||||||
|
# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
|
||||||
|
CONFIG_USB=y
|
||||||
|
CONFIG_DM_USB=y
|
||||||
|
diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig
|
||||||
|
index 855afcf1cf..800b51e6f5 100644
|
||||||
|
--- a/configs/rpi_arm64_defconfig
|
||||||
|
+++ b/configs/rpi_arm64_defconfig
|
||||||
|
@@ -32,6 +32,7 @@ CONFIG_DM_PCI=y
|
||||||
|
CONFIG_PCI_BRCMSTB=y
|
||||||
|
CONFIG_PINCTRL=y
|
||||||
|
# CONFIG_PINCTRL_GENERIC is not set
|
||||||
|
+CONFIG_DM_RESET=y
|
||||||
|
# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
|
||||||
|
CONFIG_USB=y
|
||||||
|
CONFIG_DM_USB=y
|
||||||
|
|
||||||
|
From patchwork Mon Jun 22 15:30:51 2020
|
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|
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|
X-Patchwork-Id: 1314563
|
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|
X-Patchwork-Delegate: matthias.bgg@gmail.com
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|
||||||
|
From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
|
||||||
|
To: mbrugger@suse.com, u-boot@lists.denx.de, bmeng.cn@gmail.com,
|
||||||
|
sjg@chromium.org, marex@denx.de
|
||||||
|
Cc: m.szyprowski@samsung.com, s.nawrocki@samsung.com,
|
||||||
|
Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
|
||||||
|
Subject: [PATCH v5 4/4] usb: xhci: Add reset controller support
|
||||||
|
Date: Mon, 22 Jun 2020 17:30:51 +0200
|
||||||
|
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|
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|
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|
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|
||||||
|
|
||||||
|
Some atypical users of xhci might need to manually reset their xHCI
|
||||||
|
controller before starting the HCD setup. Check if a reset controller
|
||||||
|
device is available to the PCI bus and trigger a reset.
|
||||||
|
|
||||||
|
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
|
||||||
|
---
|
||||||
|
|
||||||
|
Changes since v3:
|
||||||
|
- Move reset support to xchi core
|
||||||
|
|
||||||
|
drivers/usb/host/xhci-mem.c | 2 ++
|
||||||
|
drivers/usb/host/xhci.c | 33 +++++++++++++++++++++++++++++++++
|
||||||
|
include/usb/xhci.h | 2 ++
|
||||||
|
3 files changed, 37 insertions(+)
|
||||||
|
|
||||||
|
diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
|
||||||
|
index f446520528..108f4bd8cf 100644
|
||||||
|
--- a/drivers/usb/host/xhci-mem.c
|
||||||
|
+++ b/drivers/usb/host/xhci-mem.c
|
||||||
|
@@ -180,6 +180,8 @@ void xhci_cleanup(struct xhci_ctrl *ctrl)
|
||||||
|
xhci_free_virt_devices(ctrl);
|
||||||
|
free(ctrl->erst.entries);
|
||||||
|
free(ctrl->dcbaa);
|
||||||
|
+ if (reset_valid(&ctrl->reset))
|
||||||
|
+ reset_free(&ctrl->reset);
|
||||||
|
memset(ctrl, '\0', sizeof(struct xhci_ctrl));
|
||||||
|
}
|
||||||
|
|
||||||
|
diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
|
||||||
|
index ebd2954571..03b41cc855 100644
|
||||||
|
--- a/drivers/usb/host/xhci.c
|
||||||
|
+++ b/drivers/usb/host/xhci.c
|
||||||
|
@@ -190,6 +190,35 @@ static int xhci_start(struct xhci_hcor *hcor)
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
+/**
|
||||||
|
+ * Resets XHCI Hardware
|
||||||
|
+ *
|
||||||
|
+ * @param ctrl pointer to host controller
|
||||||
|
+ * @return 0 if OK, or a negative error code.
|
||||||
|
+ */
|
||||||
|
+static int xhci_reset_hw(struct xhci_ctrl *ctrl)
|
||||||
|
+{
|
||||||
|
+ int ret;
|
||||||
|
+
|
||||||
|
+ ret = reset_get_by_index(ctrl->dev, 0, &ctrl->reset);
|
||||||
|
+ if (ret && ret != -ENOENT) {
|
||||||
|
+ dev_err(ctrl->dev, "failed to get reset\n");
|
||||||
|
+ return ret;
|
||||||
|
+ }
|
||||||
|
+
|
||||||
|
+ if (reset_valid(&ctrl->reset)) {
|
||||||
|
+ ret = reset_assert(&ctrl->reset);
|
||||||
|
+ if (ret)
|
||||||
|
+ return ret;
|
||||||
|
+
|
||||||
|
+ ret = reset_deassert(&ctrl->reset);
|
||||||
|
+ if (ret)
|
||||||
|
+ return ret;
|
||||||
|
+ }
|
||||||
|
+
|
||||||
|
+ return 0;
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
/**
|
||||||
|
* Resets the XHCI Controller
|
||||||
|
*
|
||||||
|
@@ -1508,6 +1537,10 @@ int xhci_register(struct udevice *dev, struct xhci_hccr *hccr,
|
||||||
|
|
||||||
|
ctrl->dev = dev;
|
||||||
|
|
||||||
|
+ ret = xhci_reset_hw(ctrl);
|
||||||
|
+ if (ret)
|
||||||
|
+ goto err;
|
||||||
|
+
|
||||||
|
/*
|
||||||
|
* XHCI needs to issue a Address device command to setup
|
||||||
|
* proper device context structures, before it can interact
|
||||||
|
diff --git a/include/usb/xhci.h b/include/usb/xhci.h
|
||||||
|
index 1170c0ac69..7d34103fd5 100644
|
||||||
|
--- a/include/usb/xhci.h
|
||||||
|
+++ b/include/usb/xhci.h
|
||||||
|
@@ -16,6 +16,7 @@
|
||||||
|
#ifndef HOST_XHCI_H_
|
||||||
|
#define HOST_XHCI_H_
|
||||||
|
|
||||||
|
+#include <reset.h>
|
||||||
|
#include <asm/types.h>
|
||||||
|
#include <asm/cache.h>
|
||||||
|
#include <asm/io.h>
|
||||||
|
@@ -1209,6 +1210,7 @@ struct xhci_ctrl {
|
||||||
|
#if CONFIG_IS_ENABLED(DM_USB)
|
||||||
|
struct udevice *dev;
|
||||||
|
#endif
|
||||||
|
+ struct reset_ctl reset;
|
||||||
|
struct xhci_hccr *hccr; /* R/O registers, not need for volatile */
|
||||||
|
struct xhci_hcor *hcor;
|
||||||
|
struct xhci_doorbell_array *dba;
|
||||||
Loading…
x
Reference in New Issue
Block a user