c98bb6b512
Signed-off-by: Jie Yang <yangjieyj.yang@huawei.com> (cherry picked from commit e9cfa81784d4a86efd4392a487c0294d440c03c0)
113 lines
4.2 KiB
Diff
113 lines
4.2 KiB
Diff
From cd3d687aeaee2d94a1b09895b14f87a3f232cb22 Mon Sep 17 00:00:00 2001
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From: zhouli57 <zhouli57@huawei.com>
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Date: Mon, 7 Mar 2022 20:51:56 +0800
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Subject: [PATCH 2/8] pci: no need to delete the unmapped region
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When we hot-plug a pci device but fail for some reason, for example,
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hot-plug to an unsupported bus, at this point, the device has finished
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registering the region, and we need to clean up the registered region.
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Because the device has not been actually used, the address in the BAR
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may not have been updated, so there may be an error in unregister_bars.
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in fact, there is no need to delete the unmapped region.
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Signed-off-by: zhouli57 <zhouli57@huawei.com>
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---
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pci/src/config.rs | 75 ++++++++++++++++++++++++++++++++++++++++++++---
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1 file changed, 71 insertions(+), 4 deletions(-)
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diff --git a/pci/src/config.rs b/pci/src/config.rs
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index 88d7f03..c2b4c88 100644
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--- a/pci/src/config.rs
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+++ b/pci/src/config.rs
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@@ -569,11 +569,12 @@ impl PciConfig {
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pub fn unregister_bars(&mut self, bus: &Arc<Mutex<PciBus>>) -> Result<()> {
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let locked_bus = bus.lock().unwrap();
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for bar in self.bars.iter_mut() {
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+ if bar.address == BAR_SPACE_UNMAPPED || bar.size == 0 {
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+ continue;
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+ }
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match bar.region_type {
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- RegionType::Io => {
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- if bar.address == BAR_SPACE_UNMAPPED || bar.size == 0 {
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- continue;
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- }
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+ RegionType::Io =>
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+ {
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#[cfg(target_arch = "x86_64")]
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if let Some(region) = bar.region.as_ref() {
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locked_bus
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@@ -1102,4 +1103,70 @@ mod tests {
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assert_eq!(size1, 0x10);
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assert_eq!(size2, 0x40);
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}
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+
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+ #[test]
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+ fn test_unregister_bars() {
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+ let read_ops = move |_data: &mut [u8], _addr: GuestAddress, _offset: u64| -> bool { true };
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+ let write_ops = move |_data: &[u8], _addr: GuestAddress, _offset: u64| -> bool { true };
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+ let region_ops = RegionOps {
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+ read: Arc::new(read_ops),
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+ write: Arc::new(write_ops),
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+ };
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+ let region = Region::init_io_region(2048, region_ops);
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+ let mut pci_config = PciConfig::new(PCI_CONFIG_SPACE_SIZE, 3);
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+
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+ // bar is unmapped
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+ #[cfg(target_arch = "x86_64")]
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+ pci_config.register_bar(0, region.clone(), RegionType::Io, false, 2048);
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+ pci_config.register_bar(1, region.clone(), RegionType::Mem32Bit, false, 2048);
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+ pci_config.register_bar(2, region.clone(), RegionType::Mem64Bit, true, 2048);
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+
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+ #[cfg(target_arch = "x86_64")]
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+ let io_region = Region::init_container_region(1 << 16);
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+ let mem_region = Region::init_container_region(u64::max_value());
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+ let bus = Arc::new(Mutex::new(PciBus::new(
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+ String::from("bus"),
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+ #[cfg(target_arch = "x86_64")]
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+ io_region.clone(),
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+ mem_region.clone(),
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+ )));
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+
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+ assert!(pci_config.unregister_bars(&bus).is_ok());
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+
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+ // bar is mapped
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+ #[cfg(target_arch = "x86_64")]
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+ pci_config.register_bar(0, region.clone(), RegionType::Io, false, 2048);
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+ pci_config.register_bar(1, region.clone(), RegionType::Mem32Bit, false, 2048);
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+ pci_config.register_bar(2, region.clone(), RegionType::Mem64Bit, true, 2048);
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+
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+ #[cfg(target_arch = "x86_64")]
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+ le_write_u32(
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+ &mut pci_config.config,
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+ BAR_0 as usize,
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+ 2048 | BAR_IO_SPACE as u32,
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+ )
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+ .unwrap();
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+ le_write_u32(&mut pci_config.config, BAR_0 as usize + REG_SIZE, 2048).unwrap();
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+ le_write_u32(
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+ &mut pci_config.config,
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+ BAR_0 as usize + 2 * REG_SIZE,
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+ 2048 | BAR_MEM_64BIT as u32 | BAR_PREFETCH as u32,
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+ )
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+ .unwrap();
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+ le_write_u16(
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+ &mut pci_config.config,
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+ COMMAND as usize,
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+ COMMAND_IO_SPACE | COMMAND_MEMORY_SPACE,
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+ )
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+ .unwrap();
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+ pci_config
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+ .update_bar_mapping(
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+ #[cfg(target_arch = "x86_64")]
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+ &io_region,
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+ &mem_region,
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+ )
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+ .unwrap();
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+
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+ assert!(pci_config.unregister_bars(&bus).is_ok());
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+ }
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}
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--
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2.20.1
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