diff -Naur a/include/spdk/barrier.h b/include/spdk/barrier.h
--- a/include/spdk/barrier.h	2024-01-26 23:17:18.000000000 +0800
+++ b/include/spdk/barrier.h	2024-12-12 21:12:33.045436865 +0800
@@ -95,6 +95,16 @@
 #define _spdk_smp_mb()	__asm volatile("dbar 0" ::: "memory")
 #define _spdk_ivdt_dcache(pdata)
 
+#elif defined(__sw_64)
+
+#define _spdk_rmb()	__asm volatile("memb" ::: "memory")
+#define _spdk_wmb()	__asm volatile("memb" ::: "memory")
+#define _spdk_mb()	__asm volatile("memb" ::: "memory")
+#define _spdk_smp_rmb()	__asm volatile("memb" ::: "memory")
+#define _spdk_smp_wmb()	__asm volatile("memb" ::: "memory")
+#define _spdk_smp_mb()	__asm volatile("memb" ::: "memory")
+#define _spdk_ivdt_dcache(pdata)
+
 #else
 
 #define _spdk_rmb()
diff -Naur a/lib/nvme/nvme_pcie_common.c b/lib/nvme/nvme_pcie_common.c
--- a/lib/nvme/nvme_pcie_common.c	2024-01-26 23:17:18.000000000 +0800
+++ b/lib/nvme/nvme_pcie_common.c	2024-12-12 21:15:59.272412493 +0800
@@ -898,7 +898,7 @@
 			__builtin_prefetch(&pqpair->tr[next_cpl->cid]);
 		}
 
-#if defined(__PPC64__) || defined(__riscv) || defined(__loongarch__)
+#if defined(__PPC64__) || defined(__riscv) || defined(__loongarch__) || defined(__sw_64)
 		/*
 		 * This memory barrier prevents reordering of:
 		 * - load after store from/to tr
diff -Naur a/mk/spdk.common.mk b/mk/spdk.common.mk
--- a/mk/spdk.common.mk	2024-01-26 23:17:18.000000000 +0800
+++ b/mk/spdk.common.mk	2024-12-12 21:47:43.964114007 +0800
@@ -71,6 +71,10 @@
 else ifneq ($(filter loongarch%,$(TARGET_MACHINE)),)
 COMMON_CFLAGS += -march=$(TARGET_ARCHITECTURE)
 COMMON_CFLAGS += -DPAGE_SIZE=$(shell getconf PAGESIZE)
+else ifneq ($(filter sw_64%,$(TARGET_MACHINE)),)
+# -march=native is not yet supported by GCC on RISC-V. Falling back to default.
+#COMMON_CFLAGS += -march=$(TARGET_ARCHITECTURE)
+#COMMON_CFLAGS += -DPAGE_SIZE=$(shell getconf PAGESIZE)
 else
 COMMON_CFLAGS += -march=$(TARGET_ARCHITECTURE)
 endif
