e56042b4e2
When HW is in resetting stage, we could not poll back all the expected work completions as the HW won't generate cqe anymore. This patch allows driver to compose the expected wc instead of the HW during resetting stage. Once the hardware finished resetting, we can poll cq from hardware again. Signed-off-by: Ran Zhou <zhouran10@h-partners.com> (cherry picked from commit 5494e44cf97e65d858c8f7376c0424a833dc8323)
95 lines
3.0 KiB
Diff
95 lines
3.0 KiB
Diff
From 64e8d59358cfdb05d7b172bb1b60f18fb7f3d844 Mon Sep 17 00:00:00 2001
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From: Chengchang Tang <tangchengchang@huawei.com>
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Date: Thu, 7 Dec 2023 09:48:02 +0800
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Subject: [PATCH 18/18] libhns: Fix owner bit when SQ wraps around in new IO
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driver inclusion
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category: bugfix
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bugzilla: https://gitee.com/openeuler/kernel/issues/I98YNG
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--------------------------------------------------------------------------
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The owner bit has been write in init_rc_wqe() or init_ud_wqe()
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with a write value. And it will be overwritten by some subsequent
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operations. When the SQ wraps around, the overwritten value will be
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an incorrect value.
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For example, driver will assign the owner bit in the second step,
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and overwrite it in the third step.
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```c
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ibv_wr_start();
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ibv_wr_rdma_write();
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if (inline)
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ibv_wr_set_inline_data_list();
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else
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ibv_wr_set_sge_list();
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ibv_wr_complete();
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```
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This patch removes the redundant owner bit assignment operations
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in new IO.
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Fixes: ("libhns: Fix the owner bit error of sq in new io")
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Signed-off-by: Chengchang Tang <tangchengchang@huawei.com>
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---
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providers/hns/hns_roce_u_hw_v2.c | 7 -------
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1 file changed, 7 deletions(-)
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diff --git a/providers/hns/hns_roce_u_hw_v2.c b/providers/hns/hns_roce_u_hw_v2.c
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index a0dce1c..9016978 100644
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--- a/providers/hns/hns_roce_u_hw_v2.c
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+++ b/providers/hns/hns_roce_u_hw_v2.c
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@@ -2353,8 +2353,6 @@ static void wr_set_sge_list_rc(struct ibv_qp_ex *ibv_qp, size_t num_sge,
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wqe->msg_len = htole32(qp->sge_info.total_len);
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hr_reg_write(wqe, RCWQE_SGE_NUM, qp->sge_info.valid_num);
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-
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- enable_wqe(qp, wqe, qp->sq.head);
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}
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static void wr_send_rc(struct ibv_qp_ex *ibv_qp)
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@@ -2546,7 +2544,6 @@ static void wr_set_inline_data_rc(struct ibv_qp_ex *ibv_qp, void *addr,
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qp->sge_info.total_len = length;
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set_inline_data_list_rc(qp, wqe, 1, &buff);
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- enable_wqe(qp, wqe, qp->sq.head);
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}
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static void wr_set_inline_data_list_rc(struct ibv_qp_ex *ibv_qp, size_t num_buf,
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@@ -2564,7 +2561,6 @@ static void wr_set_inline_data_list_rc(struct ibv_qp_ex *ibv_qp, size_t num_buf,
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qp->sge_info.total_len += buf_list[i].length;
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set_inline_data_list_rc(qp, wqe, num_buf, buf_list);
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- enable_wqe(qp, wqe, qp->sq.head);
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}
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static struct hns_roce_ud_sq_wqe *
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@@ -2701,7 +2697,6 @@ static void wr_set_sge_list_ud(struct ibv_qp_ex *ibv_qp, size_t num_sge,
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hr_reg_write(wqe, UDWQE_SGE_NUM, cnt);
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qp->sge_info.start_idx += cnt;
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- enable_wqe(qp, wqe, qp->sq.head);
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}
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static void set_inline_data_list_ud(struct hns_roce_qp *qp,
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@@ -2767,7 +2762,6 @@ static void wr_set_inline_data_ud(struct ibv_qp_ex *ibv_qp, void *addr,
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qp->sge_info.total_len = length;
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set_inline_data_list_ud(qp, wqe, 1, &buff);
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- enable_wqe(qp, wqe, qp->sq.head);
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}
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static void wr_set_inline_data_list_ud(struct ibv_qp_ex *ibv_qp, size_t num_buf,
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@@ -2785,7 +2779,6 @@ static void wr_set_inline_data_list_ud(struct ibv_qp_ex *ibv_qp, size_t num_buf,
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qp->sge_info.total_len += buf_list[i].length;
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set_inline_data_list_ud(qp, wqe, num_buf, buf_list);
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- enable_wqe(qp, wqe, qp->sq.head);
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}
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static void wr_start(struct ibv_qp_ex *ibv_qp)
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--
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2.33.0
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