dabf4d530e
1.Fix the owner bit error of sq in new io 2.Fix incorrect post-send with direct wqe of 3.Add a judgment to the congestion control algorithm Singed-off-by: Juan Zhou <zhoujuan51@h-partners.com> (cherry picked from commit 092143ba858a7aba0630fadd416faa2a4e7eaf06)
70 lines
2.2 KiB
Diff
70 lines
2.2 KiB
Diff
From a86a120c35b1112bcef6c3821c2e5e1910e615e9 Mon Sep 17 00:00:00 2001
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From: Luoyouming <luoyouming@huawei.com>
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Date: Fri, 2 Jun 2023 10:33:14 +0800
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Subject: [PATCH 2/4] libhns: Fix the owner bit error of sq in new io
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driver inclusion
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category: bugfix
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bugzilla: https://gitee.com/src-openeuler/rdma-core/issues/I7A5Y5
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---------------------------------------------------------------
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The code does not use the head position of sq to set the owner bit,
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but uses the head after adding 1 to cause an owner bit error. When
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the wqe queue has not been flipped, the hardware has flipped based
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on the owner bit judgment, resulting in failure to obtain wqe,
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unable to send, and unable to generate cqe. This patch will set the
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onwer bit ahead of time before the head value increases.
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Fixes: 36446a56eea5 ("libhns: Extended QP supports the new post send mechanism")
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Signed-off-by: Luoyouming <luoyouming@huawei.com>
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---
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providers/hns/hns_roce_u_hw_v2.c | 10 ++++++----
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1 file changed, 6 insertions(+), 4 deletions(-)
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diff --git a/providers/hns/hns_roce_u_hw_v2.c b/providers/hns/hns_roce_u_hw_v2.c
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index 616d1ea..cde4801 100644
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--- a/providers/hns/hns_roce_u_hw_v2.c
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+++ b/providers/hns/hns_roce_u_hw_v2.c
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@@ -2215,6 +2215,9 @@ init_rc_wqe(struct hns_roce_qp *qp, uint64_t wr_id, unsigned int opcode)
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qp->sq.wrid[wqe_idx] = wr_id;
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qp->cur_wqe = wqe;
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+
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+ enable_wqe(qp, wqe, qp->sq.head);
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+
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qp->sq.head++;
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return wqe;
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@@ -2236,9 +2239,6 @@ static void wr_set_sge_rc(struct ibv_qp_ex *ibv_qp, uint32_t lkey,
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wqe->msg_len = htole32(length);
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hr_reg_write(wqe, RCWQE_LEN0, length);
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hr_reg_write(wqe, RCWQE_SGE_NUM, !!length);
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- /* ignore ex sge start index */
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-
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- enable_wqe(qp, wqe, qp->sq.head);
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}
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static void set_sgl_rc(struct hns_roce_v2_wqe_data_seg *dseg,
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@@ -2541,6 +2541,9 @@ init_ud_wqe(struct hns_roce_qp *qp, uint64_t wr_id, unsigned int opcode)
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qp->sq.wrid[wqe_idx] = wr_id;
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qp->cur_wqe = wqe;
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+
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+ enable_wqe(qp, wqe, qp->sq.head);
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+
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qp->sq.head++;
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return wqe;
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@@ -2610,7 +2613,6 @@ static void wr_set_sge_ud(struct ibv_qp_ex *ibv_qp, uint32_t lkey,
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dseg->len = htole32(length);
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qp->sge_info.start_idx++;
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- enable_wqe(qp, wqe, qp->sq.head);
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}
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static void wr_set_sge_list_ud(struct ibv_qp_ex *ibv_qp, size_t num_sge,
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--
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2.25.1
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