4238b9d0b7
Add support for hns DWQE. All its dependent patches are also added. Signed-off-by: Chengchang Tang <tangchengchang@huawei.com> (cherry picked from commit 964c2273a107ddba9cbeea1425b3b9ab73ffe2ca)
121 lines
3.6 KiB
Diff
121 lines
3.6 KiB
Diff
From 08ec3c43bf9710fdf3ca664f7cd63436e67339d7 Mon Sep 17 00:00:00 2001
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From: Wenpeng Liang <liangwenpeng@huawei.com>
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Date: Tue, 11 May 2021 19:06:34 +0800
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Subject: [PATCH 2/8] libhns: Fix the ownership of the head/tail pointer of SRQ
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WQE
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The CQE of SRQ is not generated in the order of wqe, so the wqe_idx
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corresponding to the idle WQE should be placed in a FIFO, then the hardware
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will be instructed to obtain the corresponding WQE. Therefore, the WQ
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of SRQ has no concept of head pointer and tail pointer, but the queue of
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wqe_idx does.
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Signed-off-by: Wenpeng Liang <liangwenpeng@huawei.com>
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Signed-off-by: Weihang Li <liweihang@huawei.com>
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---
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providers/hns/hns_roce_u.h | 4 ++--
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providers/hns/hns_roce_u_hw_v2.c | 12 ++++++------
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providers/hns/hns_roce_u_verbs.c | 6 +++---
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3 files changed, 11 insertions(+), 11 deletions(-)
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diff --git a/providers/hns/hns_roce_u.h b/providers/hns/hns_roce_u.h
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index 8f805dd1..b3f48113 100644
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--- a/providers/hns/hns_roce_u.h
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+++ b/providers/hns/hns_roce_u.h
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@@ -205,6 +205,8 @@ struct hns_roce_idx_que {
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int entry_shift;
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unsigned long *bitmap;
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int bitmap_cnt;
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+ unsigned int head;
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+ unsigned int tail;
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};
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struct hns_roce_srq {
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@@ -217,8 +219,6 @@ struct hns_roce_srq {
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unsigned int max_gs;
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unsigned int rsv_sge;
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unsigned int wqe_shift;
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- int head;
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- int tail;
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unsigned int *db;
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unsigned short counter;
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struct hns_roce_idx_que idx_que;
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diff --git a/providers/hns/hns_roce_u_hw_v2.c b/providers/hns/hns_roce_u_hw_v2.c
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index 4988943a..f947dbd7 100644
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--- a/providers/hns/hns_roce_u_hw_v2.c
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+++ b/providers/hns/hns_roce_u_hw_v2.c
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@@ -262,7 +262,7 @@ static void hns_roce_free_srq_wqe(struct hns_roce_srq *srq, uint16_t ind)
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bitmap_num = ind / BIT_CNT_PER_LONG;
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bit_num = ind % BIT_CNT_PER_LONG;
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srq->idx_que.bitmap[bitmap_num] |= (1ULL << bit_num);
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- srq->tail++;
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+ srq->idx_que.tail++;
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pthread_spin_unlock(&srq->lock);
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}
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@@ -1564,7 +1564,7 @@ static int hns_roce_u_v2_post_srq_recv(struct ibv_srq *ib_srq,
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pthread_spin_lock(&srq->lock);
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/* current idx of srqwq */
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- ind = srq->head & (srq->wqe_cnt - 1);
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+ ind = srq->idx_que.head & (srq->wqe_cnt - 1);
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max_sge = srq->max_gs - srq->rsv_sge;
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for (nreq = 0; wr; ++nreq, wr = wr->next) {
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@@ -1574,7 +1574,7 @@ static int hns_roce_u_v2_post_srq_recv(struct ibv_srq *ib_srq,
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break;
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}
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- if (srq->head == srq->tail) {
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+ if (srq->idx_que.head == srq->idx_que.tail) {
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ret = -ENOMEM;
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*bad_wr = wr;
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break;
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@@ -1607,7 +1607,7 @@ static int hns_roce_u_v2_post_srq_recv(struct ibv_srq *ib_srq,
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}
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if (nreq) {
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- srq->head += nreq;
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+ srq->idx_que.head += nreq;
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/*
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* Make sure that descriptors are written before
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@@ -1617,8 +1617,8 @@ static int hns_roce_u_v2_post_srq_recv(struct ibv_srq *ib_srq,
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srq_db.byte_4 = htole32(HNS_ROCE_V2_SRQ_DB << DB_BYTE_4_CMD_S |
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srq->srqn);
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- srq_db.parameter =
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- htole32(srq->head & DB_PARAM_SRQ_PRODUCER_COUNTER_M);
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+ srq_db.parameter = htole32(srq->idx_que.head &
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+ DB_PARAM_SRQ_PRODUCER_COUNTER_M);
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hns_roce_write64((uint32_t *)&srq_db, ctx,
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ROCEE_VF_DB_CFG0_OFFSET);
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diff --git a/providers/hns/hns_roce_u_verbs.c b/providers/hns/hns_roce_u_verbs.c
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index 30ab072a..9b4934b9 100644
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--- a/providers/hns/hns_roce_u_verbs.c
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+++ b/providers/hns/hns_roce_u_verbs.c
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@@ -491,6 +491,9 @@ static int hns_roce_create_idx_que(struct hns_roce_srq *srq)
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for (i = 0; i < idx_que->bitmap_cnt; ++i)
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idx_que->bitmap[i] = ~(0UL);
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+ idx_que->head = 0;
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+ idx_que->tail = srq->wqe_cnt - 1;
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+
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return 0;
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}
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@@ -512,9 +515,6 @@ static int hns_roce_alloc_srq_buf(struct hns_roce_srq *srq)
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return ENOMEM;
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}
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- srq->head = 0;
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- srq->tail = srq->wqe_cnt - 1;
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-
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return 0;
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}
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--
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2.33.0
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