Some Kunpeng SoCs do not support the DWQE through NEON instructions. In this case, the IO path works normally, but the performance will deteriorate. For these SoCs that do not support NEON DWQE, they support DWQE through SVE instructions. This patch supports SVE DWQE to guarantee the performance of these SoCs. In addition, in this scenario, DWQE only supports acceleration through SVE's ldr and str instructions. Other load and store instructions also cause performance degradation. Signed-off-by: Juan Zhou <zhoujuan51@h-partners.com> (cherry picked from commit 268e25f9374021fc4c0d6dabd62e0f360193081f)
29 lines
975 B
Diff
29 lines
975 B
Diff
From 0c132b9216282269974bf5d21f877413cc222950 Mon Sep 17 00:00:00 2001
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From: Yixing Liu <liuyixing1@huawei.com>
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Date: Mon, 17 Apr 2023 09:48:09 +0800
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Subject: [PATCH 1/2] Update kernel headers
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To commit ?? ("RDMA/hns: Add SVE DIRECT WQE flag to support libhns").
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Signed-off-by: Yixing Liu <liuyixing1@huawei.com>
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Reviewed-by: Yangyang Li <liyangyang20@huawei.com>
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---
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kernel-headers/rdma/hns-abi.h | 1 +
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1 file changed, 1 insertion(+)
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diff --git a/kernel-headers/rdma/hns-abi.h b/kernel-headers/rdma/hns-abi.h
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index bd19927..cab941f 100644
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--- a/kernel-headers/rdma/hns-abi.h
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+++ b/kernel-headers/rdma/hns-abi.h
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@@ -92,6 +92,7 @@ enum hns_roce_qp_cap_flags {
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HNS_ROCE_QP_CAP_RQ_RECORD_DB = 1 << 0,
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HNS_ROCE_QP_CAP_SQ_RECORD_DB = 1 << 1,
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HNS_ROCE_QP_CAP_OWNER_DB = 1 << 2,
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+ HNS_ROCE_QP_CAP_SVE_DIRECT_WQE = 1 << 3,
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HNS_ROCE_QP_CAP_DYNAMIC_CTX_ATTACH = 1 << 4,
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HNS_ROCE_QP_CAP_DIRECT_WQE = 1 << 5,
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HNS_ROCE_QP_CAP_DYNAMIC_CTX_DETACH = 1 << 6,
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--
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2.25.1
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