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Author SHA1 Message Date
openeuler-ci-bot
6dd4ecbd7f
!244 [sync] PR-242: libxscale: update to version 2412GA 
From: @openeuler-sync-bot 
Reviewed-by: @hginjgerx 
Signed-off-by: @hginjgerx
 2025-05-14 08:08:39 +00:00
Xin Tian
cfb78c8d80 libxscale: update to version 2412GA 
new feature:
- support diamond products
- support ibv_wr apis
- support extended CQ poll apis

bugfix:
- imm data endian error

Signed-off-by: Xin Tian <tianx@yunsilicon.com>
(cherry picked from commit d12a87881cb9254bb46cfdde6131428a139f15bb)
 2025-05-09 15:10:36 +08:00
openeuler-ci-bot
fac2c8ed4f
!238 [sync] PR-237: libhns: Bugfixes and one debug improvement 
From: @openeuler-sync-bot 
Reviewed-by: @hginjgerx 
Signed-off-by: @hginjgerx
 2025-04-29 05:51:18 +00:00
Xinghai Cen
c35fab9925 libhns: Bugfixes and one debug improvement 
The last commit was found when I created a XRC SRQ in
lock-free mode but failed to destroy it because of the
refcnt check added in the previous commit.

The failure was because the PAD was acquired through
ibv_srq->pd in destroy_srq(), while ibv_srq->pd wasn't
assigned when the SRQ was created by ibv_create_srq_ex().
So let's assign ibv_srq->pd in the common ibv_icmd_create_srq() ,
so that drivers can get the correct pd no matter
which api the SRQ is created by.

Signed-off-by: Xinghai Cen <cenxinghai@h-partners.com>
(cherry picked from commit 3ac30fc125c7cff122f21ff8593294060c92429f)
 2025-04-29 09:55:30 +08:00
openeuler-ci-bot
b1efe2238a
!232 [sync] PR-231: libhns: Add support for LTTng tracing 
From: @openeuler-sync-bot 
Reviewed-by: @hginjgerx 
Signed-off-by: @hginjgerx
 2025-04-25 08:14:44 +00:00
Xinghai Cen
cfd3a00018 libhns: Add support for LTTng tracing 
Add support for LTTng tracing. For now it is used for post_send, post_recv and poll_cq.

Signed-off-by: Xinghai Cen <cenxinghai@h-partners.com>
(cherry picked from commit 76d4645e3b8a9e57b723e3f7297bda62e934d6f2)
 2025-04-25 15:53:05 +08:00
openeuler-ci-bot
11a42ec3a6
!228 Sync some patches of master 
From: @cxh269 
Reviewed-by: @hginjgerx 
Signed-off-by: @hginjgerx
 2025-04-23 09:37:45 +00:00
Xinghai Cen
bf019764ad libhns: Cleanup and Bugfixes 
Cleanup and Bugfixes:
        0053-libhns-Clean-up-data-type-issues.patch
        0054-libhns-Fix-wrong-max-inline-data-value.patch
        0055-libhns-Fix-wrong-order-of-spin-unlock-in-modify-qp.patch

Signed-off-by: Xinghai Cen <cenxinghai@h-partners.com>
 2025-04-23 15:04:31 +08:00
Xinghai Cen
c72f2000d2 libxscale: Match dev by vid and did 
Match dev by vid and did.

Signed-off-by: Xin Tian <tianx@yunsilicon.com>
 2025-04-23 15:01:36 +08:00
openeuler-ci-bot
7d36592178
!218 libhns: Fixes some bugs for libhns 
From: @cxh269 
Reviewed-by: @hginjgerx 
Signed-off-by: @hginjgerx
 2025-03-31 12:55:04 +00:00
Xinghai Cen
dff5546a58 libhns: Fixes some bugs for libhns 
driver inclusion
category: bugfix
bugzilla: https://gitee.com/src-openeuler/rdma-core/issues/IB66RT

------------------------------------------------------------------

Changes to be committed:
      modified:   0040-libhns-Fix-memory-leakage-when-DCA-is-enabled.patch
      new file:   0045-libhns-fix-incorrectly-using-fixed-pagesize.patch
      new file:   0046-libhns-fix-missing-new-IO-support-for-DCA.patch

Signed-off-by: Xinghai Cen <cenxinghai@h-partners.com>
 2025-03-31 18:14:11 +08:00
16 changed files with 4138 additions and 8 deletions
Show Stats Expand all files Collapse all files

13
0040-libhns-Fix-memory-leakage-when-DCA-is-enabled.patch
View File

@ -1,4 +1,4 @@
From a73b31041073a45b04535c4183b39195bbebe514 Mon Sep 17 00:00:00 2001
From cf0f83bda170e85fe425c02965af3c28be9368aa Mon Sep 17 00:00:00 2001
From: wenglianfa <wenglianfa@huawei.com>
Date: Thu, 25 Jul 2024 11:06:01 +0800
Subject: [PATCH] libhns: Fix memory leakage when DCA is enabled
@ -17,18 +17,21 @@ Fixes:26e79aa7eb8d ("libhns: Add support for attaching QP's WQE buffer")
Signed-off-by: wenglianfa <wenglianfa@huawei.com>
Signed-off-by: Xinghai Cen <cenxinghai@h-partners.com>
---
providers/hns/hns_roce_u_verbs.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
providers/hns/hns_roce_u_verbs.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/providers/hns/hns_roce_u_verbs.c b/providers/hns/hns_roce_u_verbs.c
index e30880c..c733b21 100644
index e30880c..bfa25ff 100644
--- a/providers/hns/hns_roce_u_verbs.c
+++ b/providers/hns/hns_roce_u_verbs.c
@@ -1357,7 +1357,8 @@ static void qp_free_wqe(struct hns_roce_qp *qp)
@@ -1357,7 +1357,11 @@ static void qp_free_wqe(struct hns_roce_qp *qp)
if (qp->rq.wqe_cnt)
free(qp->rq.wrid);
- hns_roce_free_buf(&qp->buf);
+
+ if (qp->dca_wqe.bufs)
+ free(qp->dca_wqe.bufs);
+ else
+ hns_roce_free_buf(&qp->buf);
}

110
0045-libhns-fix-incorrectly-using-fixed-pagesize.patch Normal file
View File

@ -0,0 +1,110 @@
From 7bd22fed52a1828b0d44a990b52266e9e1d92b5d Mon Sep 17 00:00:00 2001
From: Chengchang Tang <tangchengchang@huawei.com>
Date: Tue, 30 Jan 2024 21:00:46 +0800
Subject: [PATCH 45/46] libhns: fix incorrectly using fixed pagesize
driver inclusion
category: bugfix
bugzilla: https://gitee.com/src-openeuler/rdma-core/issues/IB66RT
------------------------------------------------------------------
Currently, actually used page size is fixed, causing the flexible wqe
buffer size feature to not take effect.
Fixes: 9ab7600d832b ("libhns: Add support for attaching QP's WQE buffer")
Signed-off-by: Chengchang Tang <tangchengchang@huawei.com>
Signed-off-by: Xinghai Cen <cenxinghai@h-partners.com>
---
providers/hns/hns_roce_u_verbs.c | 24 +++++++++++++-----------
1 file changed, 13 insertions(+), 11 deletions(-)
diff --git a/providers/hns/hns_roce_u_verbs.c b/providers/hns/hns_roce_u_verbs.c
index bce215e..848f836 100644
--- a/providers/hns/hns_roce_u_verbs.c
+++ b/providers/hns/hns_roce_u_verbs.c
@@ -1296,14 +1296,14 @@ static void free_recv_rinl_buf(struct hns_roce_rinl_buf *rinl_buf)
static void get_best_multi_region_pg_shift(struct hns_roce_device *hr_dev,
struct hns_roce_context *ctx,
- struct hns_roce_qp *qp)
+ struct hns_roce_qp *qp, bool dca_en)
{
uint32_t ext_sge_size;
uint32_t sq_size;
uint32_t rq_size;
uint8_t pg_shift;
- if (!(ctx->config & HNS_ROCE_UCTX_RSP_DYN_QP_PGSZ)) {
+ if (!(ctx->config & HNS_ROCE_UCTX_RSP_DYN_QP_PGSZ || dca_en)) {
qp->pageshift = HNS_HW_PAGE_SHIFT;
return;
}
@@ -1334,7 +1334,7 @@ static void get_best_multi_region_pg_shift(struct hns_roce_device *hr_dev,
static int calc_qp_buff_size(struct hns_roce_device *hr_dev,
struct hns_roce_context *ctx,
- struct hns_roce_qp *qp)
+ struct hns_roce_qp *qp, bool dca_en)
{
struct hns_roce_wq *sq = &qp->sq;
struct hns_roce_wq *rq = &qp->rq;
@@ -1342,7 +1342,7 @@ static int calc_qp_buff_size(struct hns_roce_device *hr_dev,
unsigned int size;
qp->buf_size = 0;
- get_best_multi_region_pg_shift(hr_dev, ctx, qp);
+ get_best_multi_region_pg_shift(hr_dev, ctx, qp, dca_en);
page_size = 1 << qp->pageshift;
/* SQ WQE */
@@ -1384,7 +1384,7 @@ static inline bool check_qp_support_dca(struct hns_roce_dca_ctx *dca_ctx,
if (hns_attr &&
(hns_attr->comp_mask & HNSDV_QP_INIT_ATTR_MASK_QP_CREATE_FLAGS) &&
(hns_attr->create_flags & HNSDV_QP_CREATE_ENABLE_DCA_MODE))
- return true;
+ return dca_ctx->max_size > 0;
return false;
}
@@ -1408,9 +1408,12 @@ static int qp_alloc_wqe(struct ibv_qp_init_attr_ex *attr,
struct hns_roce_qp *qp, struct hns_roce_context *ctx)
{
struct hns_roce_device *hr_dev = to_hr_dev(ctx->ibv_ctx.context.device);
+ bool dca_en = check_qp_support_dca(&ctx->dca_ctx, attr, hns_attr);
+ int ret;
- if (calc_qp_buff_size(hr_dev, ctx, qp))
- return -EINVAL;
+ ret = calc_qp_buff_size(hr_dev, ctx, qp, dca_en);
+ if (ret)
+ return ret;
qp->sq.wrid = malloc(qp->sq.wqe_cnt * sizeof(uint64_t));
if (!qp->sq.wrid)
@@ -1428,19 +1431,18 @@ static int qp_alloc_wqe(struct ibv_qp_init_attr_ex *attr,
goto err_alloc;
}
- if (check_qp_support_dca(&ctx->dca_ctx, attr, hns_attr) &&
- ctx->dca_ctx.max_size > 0) {
+ if (check_qp_support_dca(&ctx->dca_ctx, attr, hns_attr)) {
/* when DCA is enabled, use a buffer list to store page addr */
qp->buf.buf = NULL;
qp->dca_wqe.max_cnt = hr_hw_page_count(qp->buf_size);
- qp->dca_wqe.shift = HNS_HW_PAGE_SHIFT;
+ qp->dca_wqe.shift = qp->pageshift;
qp->dca_wqe.bufs = calloc(qp->dca_wqe.max_cnt, sizeof(void *));
if (!qp->dca_wqe.bufs)
goto err_alloc;
verbs_debug(&ctx->ibv_ctx, "alloc DCA buf.\n");
} else {
if (hns_roce_alloc_buf(&qp->buf, qp->buf_size,
- HNS_HW_PAGE_SIZE))
+ 1 << qp->pageshift))
goto err_alloc;
}
--
2.33.0

55
0046-libhns-fix-missing-new-IO-support-for-DCA.patch Normal file
View File

@ -0,0 +1,55 @@
From 199b2f78ff9eeeb25acc78f9da495ae58877807a Mon Sep 17 00:00:00 2001
From: Chengchang Tang <tangchengchang@huawei.com>
Date: Tue, 30 Jan 2024 21:28:44 +0800
Subject: [PATCH 46/46] libhns: fix missing new IO support for DCA
driver inclusion
category: bugfix
bugzilla: https://gitee.com/src-openeuler/rdma-core/issues/IBSL67
------------------------------------------------------------------
New IO related support has been missed for DCA.
Fixes: 9ab7600d832b ("libhns: Add support for attaching QP's WQE buffer")
Signed-off-by: Chengchang Tang <tangchengchang@huawei.com>
Signed-off-by: Xinghai Cen <cenxinghai@h-partners.com>
---
providers/hns/hns_roce_u_hw_v2.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/providers/hns/hns_roce_u_hw_v2.c b/providers/hns/hns_roce_u_hw_v2.c
index aadea7a..3137111 100644
--- a/providers/hns/hns_roce_u_hw_v2.c
+++ b/providers/hns/hns_roce_u_hw_v2.c
@@ -2191,6 +2191,8 @@ static int wc_start_poll_cq(struct ibv_cq_ex *current,
}
err = hns_roce_poll_one(ctx, &qp, cq, NULL);
+ if (qp && check_dca_detach_enable(qp))
+ dca_detach_qp_buf(ctx, qp);
start_poll_done:
if (err != V2_CQ_OK)
@@ -2210,6 +2212,8 @@ static int wc_next_poll_cq(struct ibv_cq_ex *current)
return hns_roce_poll_one_swc(cq, NULL);
err = hns_roce_poll_one(ctx, &qp, cq, NULL);
+ if (qp && check_dca_detach_enable(qp))
+ dca_detach_qp_buf(ctx, qp);
if (err != V2_CQ_OK)
return err;
@@ -2408,6 +2412,9 @@ init_rc_wqe(struct hns_roce_qp *qp, uint64_t wr_id, unsigned int opcode)
hr_reg_write_bool(wqe, RCWQE_SE, send_flags & IBV_SEND_SOLICITED);
hr_reg_clear(wqe, RCWQE_INLINE);
+ if (check_qp_dca_enable(qp))
+ fill_rc_dca_fields(qp->verbs_qp.qp.qp_num, wqe);
+
qp->sq.wrid[wqe_idx] = wr_id;
qp->cur_wqe = wqe;
--
2.33.0

85
0052-libxscale-Match-dev-by-vid-and-did.patch Normal file
View File

@ -0,0 +1,85 @@
From c51e33b6a7b21ea3cc1230838d95d5428396be3b Mon Sep 17 00:00:00 2001
From: Xin Tian <tianx@yunsilicon.com>
Date: Thu, 20 Mar 2025 15:33:54 +0800
Subject: [PATCH] libxscale: Match dev by vid and did
Match dev by vid and did.
Signed-off-by: Xin Tian <tianx@yunsilicon.com>
---
providers/xscale/xscale.c | 20 +++++++++++++++-----
providers/xscale/xscale.h | 18 ++++++++++++++++++
2 files changed, 33 insertions(+), 5 deletions(-)
diff --git a/providers/xscale/xscale.c b/providers/xscale/xscale.c
index e6792b9..e24cfd2 100644
--- a/providers/xscale/xscale.c
+++ b/providers/xscale/xscale.c
@@ -23,10 +23,6 @@
#include "wqe.h"
#include "xsc_hsi.h"
-#ifndef PCI_VENDOR_ID_MELLANOX
-#define PCI_VENDOR_ID_MELLANOX 0x15b3
-#endif
-
#ifndef CPU_OR
#define CPU_OR(x, y, z) do {} while (0)
#endif
@@ -35,9 +31,23 @@
#define CPU_EQUAL(x, y) 1
#endif
-#define HCA(v, d) VERBS_PCI_MATCH(PCI_VENDOR_ID_##v, d, NULL)
static const struct verbs_match_ent hca_table[] = {
VERBS_MODALIAS_MATCH("*xscale*", NULL),
+ VERBS_PCI_MATCH(XSC_PCI_VENDOR_ID, XSC_MC_PF_DEV_ID, NULL),
+ VERBS_PCI_MATCH(XSC_PCI_VENDOR_ID, XSC_MC_VF_DEV_ID, NULL),
+ VERBS_PCI_MATCH(XSC_PCI_VENDOR_ID, XSC_MC_PF_DEV_ID_DIAMOND, NULL),
+ VERBS_PCI_MATCH(XSC_PCI_VENDOR_ID, XSC_MC_PF_DEV_ID_DIAMOND_NEXT, NULL),
+
+ VERBS_PCI_MATCH(XSC_PCI_VENDOR_ID, XSC_MF_HOST_PF_DEV_ID, NULL),
+ VERBS_PCI_MATCH(XSC_PCI_VENDOR_ID, XSC_MF_HOST_VF_DEV_ID, NULL),
+ VERBS_PCI_MATCH(XSC_PCI_VENDOR_ID, XSC_MF_SOC_PF_DEV_ID, NULL),
+
+ VERBS_PCI_MATCH(XSC_PCI_VENDOR_ID, XSC_MS_PF_DEV_ID, NULL),
+ VERBS_PCI_MATCH(XSC_PCI_VENDOR_ID, XSC_MS_VF_DEV_ID, NULL),
+
+ VERBS_PCI_MATCH(XSC_PCI_VENDOR_ID, XSC_MV_HOST_PF_DEV_ID, NULL),
+ VERBS_PCI_MATCH(XSC_PCI_VENDOR_ID, XSC_MV_HOST_VF_DEV_ID, NULL),
+ VERBS_PCI_MATCH(XSC_PCI_VENDOR_ID, XSC_MV_SOC_PF_DEV_ID, NULL),
{}
};
diff --git a/providers/xscale/xscale.h b/providers/xscale/xscale.h
index 0aee472..c6cc9f7 100644
--- a/providers/xscale/xscale.h
+++ b/providers/xscale/xscale.h
@@ -171,6 +171,24 @@ struct xsc_spinlock {
int need_lock;
};
+#define XSC_PCI_VENDOR_ID 0x1f67
+
+#define XSC_MC_PF_DEV_ID 0x1011
+#define XSC_MC_VF_DEV_ID 0x1012
+#define XSC_MC_PF_DEV_ID_DIAMOND 0x1021
+#define XSC_MC_PF_DEV_ID_DIAMOND_NEXT 0x1023
+
+#define XSC_MF_HOST_PF_DEV_ID 0x1051
+#define XSC_MF_HOST_VF_DEV_ID 0x1052
+#define XSC_MF_SOC_PF_DEV_ID 0x1053
+
+#define XSC_MS_PF_DEV_ID 0x1111
+#define XSC_MS_VF_DEV_ID 0x1112
+
+#define XSC_MV_HOST_PF_DEV_ID 0x1151
+#define XSC_MV_HOST_VF_DEV_ID 0x1152
+#define XSC_MV_SOC_PF_DEV_ID 0x1153
+
/* PAGE_SHIFT determines the page size */
#define PAGE_SHIFT 12
--
2.25.1

152
0053-libhns-Clean-up-data-type-issues.patch Normal file
View File

@ -0,0 +1,152 @@
From 8f95635c359ca3c36f5b1b48889719b6840c07cc Mon Sep 17 00:00:00 2001
From: Junxian Huang <huangjunxian6@hisilicon.com>
Date: Thu, 13 Mar 2025 17:26:50 +0800
Subject: [PATCH 53/55] libhns: Clean up data type issues
mainline inclusion
from mainline-v56.0-65
commit fbe8827f270d0aff4a28bb645b826fa98fe00c9d
category: bugfix
bugzilla: https://gitee.com/src-openeuler/rdma-core/issues/IC1V44
CVE: NA
Reference: https://github.com/linux-rdma/rdma-core/pull/1579/commits/fbe8827f270d0aff4a...
---------------------------------------------------------------------
Clean up mixed signed/unsigned type issues. Fix a wrong format
character as well.
Fixes: cf6d9149f8f5 ("libhns: Introduce hns direct verbs")
Signed-off-by: Junxian Huang <huangjunxian6@hisilicon.com>
Signed-off-by: Xinghai Cen <cenxinghai@h-partners.com>
---
providers/hns/hns_roce_u.h | 4 ++--
providers/hns/hns_roce_u_hw_v2.c | 15 ++++++++-------
providers/hns/hns_roce_u_verbs.c | 6 +++---
3 files changed, 13 insertions(+), 12 deletions(-)
diff --git a/providers/hns/hns_roce_u.h b/providers/hns/hns_roce_u.h
index 5eedb81..e7e3f01 100644
--- a/providers/hns/hns_roce_u.h
+++ b/providers/hns/hns_roce_u.h
@@ -356,7 +356,7 @@ struct hns_roce_wq {
unsigned long *wrid;
struct hns_roce_spinlock hr_lock;
unsigned int wqe_cnt;
- int max_post;
+ unsigned int max_post;
unsigned int head;
unsigned int tail;
unsigned int max_gs;
@@ -392,7 +392,7 @@ struct hns_roce_qp {
struct verbs_qp verbs_qp;
struct hns_roce_buf buf;
struct hns_roce_dca_buf dca_wqe;
- int max_inline_data;
+ unsigned int max_inline_data;
unsigned int buf_size;
unsigned int sq_signal_bits;
struct hns_roce_wq sq;
diff --git a/providers/hns/hns_roce_u_hw_v2.c b/providers/hns/hns_roce_u_hw_v2.c
index 3137111..cea3043 100644
--- a/providers/hns/hns_roce_u_hw_v2.c
+++ b/providers/hns/hns_roce_u_hw_v2.c
@@ -173,7 +173,7 @@ static enum ibv_wc_status get_wc_status(uint8_t status)
{ HNS_ROCE_V2_CQE_XRC_VIOLATION_ERR, IBV_WC_REM_INV_RD_REQ_ERR },
};
- for (int i = 0; i < ARRAY_SIZE(map); i++) {
+ for (unsigned int i = 0; i < ARRAY_SIZE(map); i++) {
if (status == map[i].cqe_status)
return map[i].wc_status;
}
@@ -1189,7 +1189,7 @@ static int fill_ext_sge_inl_data(struct hns_roce_qp *qp,
unsigned int sge_mask = qp->ex_sge.sge_cnt - 1;
void *dst_addr, *src_addr, *tail_bound_addr;
uint32_t src_len, tail_len;
- int i;
+ uint32_t i;
if (sge_info->total_len > qp->sq.ext_sge_cnt * HNS_ROCE_SGE_SIZE)
return EINVAL;
@@ -1259,7 +1259,7 @@ static void fill_ud_inn_inl_data(const struct ibv_send_wr *wr,
static bool check_inl_data_len(struct hns_roce_qp *qp, unsigned int len)
{
- int mtu = mtu_enum_to_int(qp->path_mtu);
+ unsigned int mtu = mtu_enum_to_int(qp->path_mtu);
return (len <= qp->max_inline_data && len <= mtu);
}
@@ -1698,7 +1698,8 @@ static void fill_recv_sge_to_wqe(struct ibv_recv_wr *wr, void *wqe,
unsigned int max_sge, bool rsv)
{
struct hns_roce_v2_wqe_data_seg *dseg = wqe;
- unsigned int i, cnt;
+ unsigned int cnt;
+ int i;
for (i = 0, cnt = 0; i < wr->num_sge; i++) {
/* Skip zero-length sge */
@@ -1726,7 +1727,7 @@ static void fill_recv_inl_buf(struct hns_roce_rinl_buf *rinl_buf,
unsigned int wqe_idx, struct ibv_recv_wr *wr)
{
struct ibv_sge *sge_list;
- unsigned int i;
+ int i;
if (!rinl_buf->wqe_cnt)
return;
@@ -2053,7 +2054,7 @@ static int check_post_srq_valid(struct hns_roce_srq *srq,
static int get_wqe_idx(struct hns_roce_srq *srq, unsigned int *wqe_idx)
{
struct hns_roce_idx_que *idx_que = &srq->idx_que;
- int bit_num;
+ unsigned int bit_num;
int i;
/* bitmap[i] is set zero if all bits are allocated */
@@ -2451,7 +2452,7 @@ static void set_sgl_rc(struct hns_roce_v2_wqe_data_seg *dseg,
unsigned int mask = qp->ex_sge.sge_cnt - 1;
unsigned int msg_len = 0;
unsigned int cnt = 0;
- int i;
+ unsigned int i;
for (i = 0; i < num_sge; i++) {
if (!sge[i].length)
diff --git a/providers/hns/hns_roce_u_verbs.c b/providers/hns/hns_roce_u_verbs.c
index 848f836..f0098ed 100644
--- a/providers/hns/hns_roce_u_verbs.c
+++ b/providers/hns/hns_roce_u_verbs.c
@@ -422,7 +422,7 @@ static int verify_cq_create_attr(struct ibv_cq_init_attr_ex *attr,
{
struct hns_roce_pad *pad = to_hr_pad(attr->parent_domain);
- if (!attr->cqe || attr->cqe > context->max_cqe) {
+ if (!attr->cqe || attr->cqe > (uint32_t)context->max_cqe) {
verbs_err(&context->ibv_ctx, "unsupported cq depth %u.\n",
attr->cqe);
return EINVAL;
@@ -1080,7 +1080,7 @@ static int check_hnsdv_qp_attr(struct hns_roce_context *ctx,
return 0;
if (!check_comp_mask(hns_attr->comp_mask, HNSDV_QP_SUP_COMP_MASK)) {
- verbs_err(&ctx->ibv_ctx, "invalid hnsdv comp_mask 0x%x.\n",
+ verbs_err(&ctx->ibv_ctx, "invalid hnsdv comp_mask 0x%llx.\n",
hns_attr->comp_mask);
return EINVAL;
}
@@ -1257,7 +1257,7 @@ static int alloc_recv_rinl_buf(uint32_t max_sge,
struct hns_roce_rinl_buf *rinl_buf)
{
unsigned int cnt;
- int i;
+ unsigned int i;
cnt = rinl_buf->wqe_cnt;
rinl_buf->wqe_list = calloc(cnt, sizeof(struct hns_roce_rinl_wqe));
--
2.33.0

63
0054-libhns-Fix-wrong-max-inline-data-value.patch Normal file
View File

@ -0,0 +1,63 @@
From 10534f0ef2ca73e8e59a38e51969cae864f9fbbf Mon Sep 17 00:00:00 2001
From: wenglianfa <wenglianfa@huawei.com>
Date: Thu, 13 Mar 2025 17:26:51 +0800
Subject: [PATCH 54/55] libhns: Fix wrong max inline data value
mainline inclusion
from mainline-v56.0-65
commit 8307b7c54ed81c343ec874e2066de79260b666d2
category: bugfix
bugzilla: https://gitee.com/src-openeuler/rdma-core/issues/IC1V44
CVE: NA
Reference: https://github.com/linux-rdma/rdma-core/pull/1579/commits/8307b7c54ed81c343e...
---------------------------------------------------------------------
When cap.max_inline_data is 0, it will be modified to 1 since
roundup_pow_of_two(0) == 1, which violates users' expectations.
Here fix it.
Fixes: 2aff0d55098c ("libhns: Fix the problem of sge nums")
Signed-off-by: wenglianfa <wenglianfa@huawei.com>
Signed-off-by: Junxian Huang <huangjunxian6@hisilicon.com>
Signed-off-by: Xinghai Cen <cenxinghai@h-partners.com>
---
providers/hns/hns_roce_u_verbs.c | 14 +++++++++++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/providers/hns/hns_roce_u_verbs.c b/providers/hns/hns_roce_u_verbs.c
index f0098ed..5fe169e 100644
--- a/providers/hns/hns_roce_u_verbs.c
+++ b/providers/hns/hns_roce_u_verbs.c
@@ -1494,6 +1494,16 @@ static unsigned int get_sge_num_from_max_inl_data(bool is_ud,
return inline_sge;
}
+static uint32_t get_max_inline_data(struct hns_roce_context *ctx,
+ struct ibv_qp_cap *cap)
+{
+ if (cap->max_inline_data)
+ return min_t(uint32_t, roundup_pow_of_two(cap->max_inline_data),
+ ctx->max_inline_data);
+
+ return 0;
+}
+
static void set_ext_sge_param(struct hns_roce_context *ctx,
struct ibv_qp_init_attr_ex *attr,
struct hns_roce_qp *qp, unsigned int wr_cnt)
@@ -1510,9 +1520,7 @@ static void set_ext_sge_param(struct hns_roce_context *ctx,
attr->cap.max_send_sge);
if (ctx->config & HNS_ROCE_RSP_EXSGE_FLAGS) {
- attr->cap.max_inline_data = min_t(uint32_t, roundup_pow_of_two(
- attr->cap.max_inline_data),
- ctx->max_inline_data);
+ attr->cap.max_inline_data = get_max_inline_data(ctx, &attr->cap);
inline_ext_sge = max(ext_wqe_sge_cnt,
get_sge_num_from_max_inl_data(is_ud,
--
2.33.0

42
0055-libhns-Fix-wrong-order-of-spin-unlock-in-modify-qp.patch Normal file
View File

@ -0,0 +1,42 @@
From d1409106e1323c54fbbb0618c071efb024f58130 Mon Sep 17 00:00:00 2001
From: Junxian Huang <huangjunxian6@hisilicon.com>
Date: Thu, 13 Mar 2025 17:26:52 +0800
Subject: [PATCH 55/55] libhns: Fix wrong order of spin unlock in modify qp
mainline inclusion
from mainline-v56.0-65
commit d2b41c86c49335b3c6ab638abb1c0e31f5ba0e8f
category: bugfix
bugzilla: https://gitee.com/src-openeuler/rdma-core/issues/IC1V44
CVE: NA
Reference: https://github.com/linux-rdma/rdma-core/pull/1579/commits/d2b41c86c49335b3c6...
---------------------------------------------------------------------
The spin_unlock order should be the reverse of spin_lock order.
Fixes: 179f015e090d ("libhns: Add support for lock-free QP")
Signed-off-by: Junxian Huang <huangjunxian6@hisilicon.com>
Signed-off-by: Xinghai Cen <cenxinghai@h-partners.com>
---
providers/hns/hns_roce_u_hw_v2.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/providers/hns/hns_roce_u_hw_v2.c b/providers/hns/hns_roce_u_hw_v2.c
index cea3043..3a1249f 100644
--- a/providers/hns/hns_roce_u_hw_v2.c
+++ b/providers/hns/hns_roce_u_hw_v2.c
@@ -1910,8 +1910,8 @@ static int hns_roce_u_v2_modify_qp(struct ibv_qp *qp, struct ibv_qp_attr *attr,
if (flag) {
if (!ret)
qp->state = IBV_QPS_ERR;
- hns_roce_spin_unlock(&hr_qp->sq.hr_lock);
hns_roce_spin_unlock(&hr_qp->rq.hr_lock);
+ hns_roce_spin_unlock(&hr_qp->sq.hr_lock);
}
if (ret)
--
2.33.0

112
0056-libhns-Add-initial-support-for-HNS-LTTng-tracing.patch Normal file
View File

@ -0,0 +1,112 @@
From dfcef98e85b947dd38738436c769926f66438a7d Mon Sep 17 00:00:00 2001
From: wenglianfa <wenglianfa@huawei.com>
Date: Tue, 22 Apr 2025 16:18:44 +0800
Subject: [PATCH 56/57] libhns: Add initial support for HNS LTTng tracing
mainline inclusion
from mainline-v56.0-65
commit 5d96d96c822323a1c9b0a6b98ce58a17a8f165c1
category: feature
bugzilla: https://gitee.com/src-openeuler/rdma-core/issues/IC3E67
CVE: NA
Reference: https://github.com/linux-rdma/rdma-core/pull/1587/commits/5d96d96c822323a1c9...
---------------------------------------------------------------------
Add initial support for HNS LTTng tracing.
Signed-off-by: wenglianfa <wenglianfa@huawei.com>
Signed-off-by: Junxian Huang <huangjunxian6@hisilicon.com>
Signed-off-by: Xinghai Cen <cenxinghai@h-partners.com>
---
providers/hns/CMakeLists.txt | 10 +++++++++
providers/hns/hns_roce_u_trace.c | 9 ++++++++
providers/hns/hns_roce_u_trace.h | 35 ++++++++++++++++++++++++++++++++
3 files changed, 54 insertions(+)
create mode 100644 providers/hns/hns_roce_u_trace.c
create mode 100644 providers/hns/hns_roce_u_trace.h
diff --git a/providers/hns/CMakeLists.txt b/providers/hns/CMakeLists.txt
index 58139ae..36ebfac 100644
--- a/providers/hns/CMakeLists.txt
+++ b/providers/hns/CMakeLists.txt
@@ -1,5 +1,10 @@
+if (ENABLE_LTTNG AND LTTNGUST_FOUND)
+ set(TRACE_FILE hns_roce_u_trace.c)
+endif()
+
rdma_shared_provider(hns libhns.map
1 1.0.${PACKAGE_VERSION}
+ ${TRACE_FILE}
hns_roce_u.c
hns_roce_u_buf.c
hns_roce_u_db.c
@@ -12,3 +17,8 @@ publish_headers(infiniband
)
rdma_pkg_config("hns" "libibverbs" "${CMAKE_THREAD_LIBS_INIT}")
+
+if (ENABLE_LTTNG AND LTTNGUST_FOUND)
+ target_include_directories(hns PUBLIC ".")
+ target_link_libraries(hns LINK_PRIVATE LTTng::UST)
+endif()
diff --git a/providers/hns/hns_roce_u_trace.c b/providers/hns/hns_roce_u_trace.c
new file mode 100644
index 0000000..812f54c
--- /dev/null
+++ b/providers/hns/hns_roce_u_trace.c
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
+/*
+ * Copyright (c) 2025 Hisilicon Limited.
+ */
+
+#define LTTNG_UST_TRACEPOINT_CREATE_PROBES
+#define LTTNG_UST_TRACEPOINT_DEFINE
+
+#include "hns_roce_u_trace.h"
diff --git a/providers/hns/hns_roce_u_trace.h b/providers/hns/hns_roce_u_trace.h
new file mode 100644
index 0000000..9b9485c
--- /dev/null
+++ b/providers/hns/hns_roce_u_trace.h
@@ -0,0 +1,35 @@
+/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
+/*
+ * Copyright (c) 2025 Hisilicon Limited.
+ */
+
+#if defined(LTTNG_ENABLED)
+
+#undef LTTNG_UST_TRACEPOINT_PROVIDER
+#define LTTNG_UST_TRACEPOINT_PROVIDER rdma_core_hns
+
+#undef LTTNG_UST_TRACEPOINT_INCLUDE
+#define LTTNG_UST_TRACEPOINT_INCLUDE "hns_roce_u_trace.h"
+
+#if !defined(__HNS_TRACE_H__) || defined(LTTNG_UST_TRACEPOINT_HEADER_MULTI_READ)
+#define __HNS_TRACE_H__
+
+#include <lttng/tracepoint.h>
+#include <infiniband/verbs.h>
+
+#define rdma_tracepoint(arg...) lttng_ust_tracepoint(arg)
+
+#endif /* __HNS_TRACE_H__*/
+
+#include <lttng/tracepoint-event.h>
+
+#else
+
+#ifndef __HNS_TRACE_H__
+#define __HNS_TRACE_H__
+
+#define rdma_tracepoint(arg...)
+
+#endif /* __HNS_TRACE_H__*/
+
+#endif /* defined(LTTNG_ENABLED) */
--
2.33.0

382
0057-libhns-Add-tracepoint-for-HNS-RoCE-I-O.patch Normal file
View File

@ -0,0 +1,382 @@
From feec8deebf58cf6faaf9f70eda49b929eb674f72 Mon Sep 17 00:00:00 2001
From: wenglianfa <wenglianfa@huawei.com>
Date: Tue, 22 Apr 2025 16:18:45 +0800
Subject: [PATCH 57/57] libhns: Add tracepoint for HNS RoCE I/O
mainline inclusion
from mainline-v56.0-65
commit 19cb51c73029b593608f0c5d41a4ace8d1f1e334
category: feature
bugzilla: https://gitee.com/src-openeuler/rdma-core/issues/IC3E67
CVE: NA
Reference: https://github.com/linux-rdma/rdma-core/pull/1587/commits/19cb51c73029b59360...
---------------------------------------------------------------------
Add tracepoint for HNS RoCE I/O, including post_send, post_recv and
poll_cq.
Signed-off-by: wenglianfa <wenglianfa@huawei.com>
Signed-off-by: Junxian Huang <huangjunxian6@hisilicon.com>
Signed-off-by: Xinghai Cen <cenxinghai@h-partners.com>
---
providers/hns/hns_roce_u_hw_v2.c | 153 +++++++++++++++++++++++++++++++
providers/hns/hns_roce_u_trace.h | 98 ++++++++++++++++++++
2 files changed, 251 insertions(+)
diff --git a/providers/hns/hns_roce_u_hw_v2.c b/providers/hns/hns_roce_u_hw_v2.c
index 3a1249f..b80c574 100644
--- a/providers/hns/hns_roce_u_hw_v2.c
+++ b/providers/hns/hns_roce_u_hw_v2.c
@@ -38,6 +38,7 @@
#include "hns_roce_u.h"
#include "hns_roce_u_db.h"
#include "hns_roce_u_hw_v2.h"
+#include "hns_roce_u_trace.h"
#define HR_IBV_OPC_MAP(ib_key, hr_key) \
[IBV_WR_ ## ib_key] = HNS_ROCE_WQE_OP_ ## hr_key
@@ -764,6 +765,80 @@ static int parse_cqe_for_cq(struct hns_roce_context *ctx, struct hns_roce_cq *cq
return 0;
}
+#ifdef LTTNG_ENABLED
+static uint8_t read_wc_sl(struct hns_roce_qp *hr_qp,
+ struct hns_roce_v2_cqe *cqe,
+ struct ibv_wc *wc)
+{
+ return hr_qp->verbs_qp.qp.qp_type == IBV_QPT_UD &&
+ hr_reg_read(cqe, CQE_S_R) == CQE_FOR_RQ ?
+ wc->sl : UINT8_MAX;
+}
+
+static uint32_t read_wc_rqpn(struct hns_roce_qp *hr_qp,
+ struct hns_roce_v2_cqe *cqe,
+ struct ibv_wc *wc)
+{
+ return hr_qp->verbs_qp.qp.qp_type == IBV_QPT_UD &&
+ hr_reg_read(cqe, CQE_S_R) == CQE_FOR_RQ ?
+ wc->src_qp : UINT32_MAX;
+}
+
+static uint32_t read_wc_byte_len(struct hns_roce_v2_cqe *cqe,
+ struct ibv_wc *wc)
+{
+ if (hr_reg_read(cqe, CQE_S_R) == CQE_FOR_RQ)
+ return wc->byte_len;
+
+ switch (hr_reg_read(cqe, CQE_OPCODE)) {
+ case HNS_ROCE_SQ_OP_RDMA_READ:
+ case HNS_ROCE_SQ_OP_ATOMIC_COMP_AND_SWAP:
+ case HNS_ROCE_SQ_OP_ATOMIC_FETCH_AND_ADD:
+ case HNS_ROCE_SQ_OP_ATOMIC_MASK_COMP_AND_SWAP:
+ case HNS_ROCE_SQ_OP_ATOMIC_MASK_FETCH_AND_ADD:
+ return wc->byte_len;
+ default:
+ return UINT32_MAX;
+ }
+}
+
+static uint8_t trace_wc_read_sl(struct ibv_cq_ex *cq_ex)
+{
+ return cq_ex->read_sl ? cq_ex->read_sl(cq_ex) : UINT8_MAX;
+}
+
+static uint32_t trace_wc_read_qp_num(struct ibv_cq_ex *cq_ex)
+{
+ return cq_ex->read_qp_num ?
+ cq_ex->read_qp_num(cq_ex) : UINT32_MAX;
+}
+
+static uint32_t trace_wc_read_src_qp(struct ibv_cq_ex *cq_ex)
+{
+ return cq_ex->read_src_qp ?
+ cq_ex->read_src_qp(cq_ex) : UINT32_MAX;
+}
+
+static uint32_t trace_wc_read_byte_len(struct ibv_cq_ex *cq_ex)
+{
+ return cq_ex->read_byte_len ?
+ cq_ex->read_byte_len(cq_ex) : UINT32_MAX;
+}
+
+static uint32_t get_send_wr_rqpn(struct ibv_send_wr *wr,
+ uint8_t qp_type)
+{
+ return qp_type == IBV_QPT_UD ? wr->wr.ud.remote_qpn : UINT32_MAX;
+}
+
+static uint8_t get_send_wr_tclass(struct ibv_send_wr *wr,
+ uint8_t qp_type)
+{
+ return qp_type == IBV_QPT_UD ?
+ to_hr_ah(wr->wr.ud.ah)->av.tclass : UINT8_MAX;
+}
+#endif
+
static int hns_roce_poll_one(struct hns_roce_context *ctx,
struct hns_roce_qp **cur_qp, struct hns_roce_cq *cq,
struct ibv_wc *wc)
@@ -800,8 +875,27 @@ static int hns_roce_poll_one(struct hns_roce_context *ctx,
wc->status = wc_status;
wc->vendor_err = hr_reg_read(cqe, CQE_SUB_STATUS);
wc->qp_num = qpn;
+
+ rdma_tracepoint(rdma_core_hns, poll_cq,
+ cq->verbs_cq.cq.context->device->name,
+ wc->wr_id, wc_status, wc->opcode,
+ wc->wc_flags, wc->vendor_err,
+ read_wc_sl(*cur_qp, cqe, wc),
+ wc->qp_num, read_wc_rqpn(*cur_qp, cqe, wc),
+ read_wc_byte_len(cqe, wc));
} else {
cq->verbs_cq.cq_ex.status = wc_status;
+
+ rdma_tracepoint(rdma_core_hns, poll_cq,
+ cq->verbs_cq.cq.context->device->name,
+ cq->verbs_cq.cq_ex.wr_id, wc_status,
+ ibv_wc_read_opcode(&cq->verbs_cq.cq_ex),
+ ibv_wc_read_wc_flags(&cq->verbs_cq.cq_ex),
+ ibv_wc_read_vendor_err(&cq->verbs_cq.cq_ex),
+ trace_wc_read_sl(&cq->verbs_cq.cq_ex),
+ trace_wc_read_qp_num(&cq->verbs_cq.cq_ex),
+ trace_wc_read_src_qp(&cq->verbs_cq.cq_ex),
+ trace_wc_read_byte_len(&cq->verbs_cq.cq_ex));
}
if (status == HNS_ROCE_V2_CQE_SUCCESS ||
@@ -1635,6 +1729,14 @@ int hns_roce_u_v2_post_send(struct ibv_qp *ibvqp, struct ibv_send_wr *wr,
*bad_wr = wr;
goto out;
}
+
+ rdma_tracepoint(rdma_core_hns, post_send,
+ ibvqp->context->device->name, wr->wr_id,
+ sge_info.valid_num, ibvqp->qp_num,
+ get_send_wr_rqpn(wr, ibvqp->qp_type),
+ wr->send_flags, sge_info.total_len,
+ wr->opcode, qp->sl,
+ get_send_wr_tclass(wr, ibvqp->qp_type));
}
out:
@@ -1785,6 +1887,10 @@ static int hns_roce_u_v2_post_recv(struct ibv_qp *ibvqp, struct ibv_recv_wr *wr,
wqe_idx = (qp->rq.head + nreq) & (qp->rq.wqe_cnt - 1);
fill_rq_wqe(qp, wr, wqe_idx, max_sge);
qp->rq.wrid[wqe_idx] = wr->wr_id;
+
+ rdma_tracepoint(rdma_core_hns, post_recv,
+ ibvqp->context->device->name, wr->wr_id,
+ wr->num_sge, ibvqp->qp_num, 0);
}
out:
@@ -2153,6 +2259,10 @@ static int hns_roce_u_v2_post_srq_recv(struct ibv_srq *ib_srq,
fill_wqe_idx(srq, wqe_idx);
srq->wrid[wqe_idx] = wr->wr_id;
+
+ rdma_tracepoint(rdma_core_hns, post_recv,
+ ib_srq->context->device->name, wr->wr_id,
+ wr->num_sge, srq->srqn, 1);
}
if (nreq) {
@@ -2442,6 +2552,12 @@ static void wr_set_sge_rc(struct ibv_qp_ex *ibv_qp, uint32_t lkey,
wqe->msg_len = htole32(length);
hr_reg_write(wqe, RCWQE_LEN0, length);
hr_reg_write(wqe, RCWQE_SGE_NUM, !!length);
+
+ rdma_tracepoint(rdma_core_hns, post_send,
+ ibv_qp->qp_base.context->device->name, ibv_qp->wr_id,
+ !!length, ibv_qp->qp_base.qp_num, UINT32_MAX,
+ ibv_qp->wr_flags, length,
+ hr_reg_read(wqe, RCWQE_OPCODE), qp->sl, UINT8_MAX);
}
static void set_sgl_rc(struct hns_roce_v2_wqe_data_seg *dseg,
@@ -2506,6 +2622,12 @@ static void wr_set_sge_list_rc(struct ibv_qp_ex *ibv_qp, size_t num_sge,
wqe->msg_len = htole32(qp->sge_info.total_len);
hr_reg_write(wqe, RCWQE_SGE_NUM, qp->sge_info.valid_num);
+
+ rdma_tracepoint(rdma_core_hns, post_send,
+ ibv_qp->qp_base.context->device->name, ibv_qp->wr_id,
+ qp->sge_info.valid_num, ibv_qp->qp_base.qp_num,
+ UINT32_MAX, ibv_qp->wr_flags, qp->sge_info.total_len,
+ opcode, qp->sl, UINT8_MAX);
}
static void wr_send_rc(struct ibv_qp_ex *ibv_qp)
@@ -2680,6 +2802,14 @@ static void set_inline_data_list_rc(struct hns_roce_qp *qp,
hr_reg_write(wqe, RCWQE_SGE_NUM, qp->sge_info.valid_num);
}
+
+ rdma_tracepoint(rdma_core_hns, post_send,
+ qp->verbs_qp.qp.context->device->name,
+ qp->verbs_qp.qp_ex.wr_id,
+ hr_reg_read(wqe, RCWQE_SGE_NUM),
+ qp->verbs_qp.qp.qp_num, UINT32_MAX,
+ qp->verbs_qp.qp_ex.wr_flags, msg_len,
+ hr_reg_read(wqe, RCWQE_OPCODE), qp->sl, UINT8_MAX);
}
static void wr_set_inline_data_rc(struct ibv_qp_ex *ibv_qp, void *addr,
@@ -2812,6 +2942,13 @@ static void wr_set_sge_ud(struct ibv_qp_ex *ibv_qp, uint32_t lkey,
dseg->len = htole32(length);
qp->sge_info.start_idx++;
+
+ rdma_tracepoint(rdma_core_hns, post_send,
+ ibv_qp->qp_base.context->device->name, ibv_qp->wr_id,
+ 1, ibv_qp->qp_base.qp_num,
+ hr_reg_read(wqe, UDWQE_DQPN), ibv_qp->wr_flags,
+ length, hr_reg_read(wqe, UDWQE_OPCODE),
+ qp->sl, hr_reg_read(wqe, UDWQE_TCLASS));
}
static void wr_set_sge_list_ud(struct ibv_qp_ex *ibv_qp, size_t num_sge,
@@ -2850,6 +2987,13 @@ static void wr_set_sge_list_ud(struct ibv_qp_ex *ibv_qp, size_t num_sge,
hr_reg_write(wqe, UDWQE_SGE_NUM, cnt);
qp->sge_info.start_idx += cnt;
+
+ rdma_tracepoint(rdma_core_hns, post_send,
+ ibv_qp->qp_base.context->device->name, ibv_qp->wr_id,
+ cnt, ibv_qp->qp_base.qp_num,
+ hr_reg_read(wqe, UDWQE_DQPN), ibv_qp->wr_flags,
+ msg_len, hr_reg_read(wqe, UDWQE_OPCODE),
+ qp->sl, hr_reg_read(wqe, UDWQE_TCLASS));
}
static void set_inline_data_list_ud(struct hns_roce_qp *qp,
@@ -2898,6 +3042,15 @@ static void set_inline_data_list_ud(struct hns_roce_qp *qp,
hr_reg_write(wqe, UDWQE_SGE_NUM, qp->sge_info.valid_num);
}
+
+ rdma_tracepoint(rdma_core_hns, post_send,
+ qp->verbs_qp.qp.context->device->name,
+ qp->verbs_qp.qp_ex.wr_id,
+ hr_reg_read(wqe, UDWQE_SGE_NUM),
+ qp->verbs_qp.qp.qp_num, hr_reg_read(wqe, UDWQE_DQPN),
+ qp->verbs_qp.qp_ex.wr_flags, msg_len,
+ hr_reg_read(wqe, UDWQE_OPCODE), qp->sl,
+ hr_reg_read(wqe, UDWQE_TCLASS));
}
static void wr_set_inline_data_ud(struct ibv_qp_ex *ibv_qp, void *addr,
diff --git a/providers/hns/hns_roce_u_trace.h b/providers/hns/hns_roce_u_trace.h
index 9b9485c..4654985 100644
--- a/providers/hns/hns_roce_u_trace.h
+++ b/providers/hns/hns_roce_u_trace.h
@@ -17,6 +17,104 @@
#include <lttng/tracepoint.h>
#include <infiniband/verbs.h>
+LTTNG_UST_TRACEPOINT_EVENT(
+ /* Tracepoint provider name */
+ rdma_core_hns,
+
+ /* Tracepoint name */
+ post_send,
+
+ /* Input arguments */
+ LTTNG_UST_TP_ARGS(
+ char *, dev_name,
+ uint64_t, wr_id,
+ int32_t, num_sge,
+ uint32_t, lqpn,
+ uint32_t, rqpn,
+ uint32_t, send_flags,
+ uint32_t, msg_len,
+ uint8_t, opcode,
+ uint8_t, sl,
+ uint8_t, t_class
+ ),
+
+ /* Output event fields */
+ LTTNG_UST_TP_FIELDS(
+ lttng_ust_field_string(dev_name, dev_name)
+ lttng_ust_field_integer_hex(uint64_t, wr_id, wr_id)
+ lttng_ust_field_integer_hex(int32_t, num_sge, num_sge)
+ lttng_ust_field_integer_hex(uint32_t, lqpn, lqpn)
+ lttng_ust_field_integer_hex(uint32_t, rqpn, rqpn)
+ lttng_ust_field_integer_hex(uint32_t, send_flags, send_flags)
+ lttng_ust_field_integer_hex(uint32_t, msg_len, msg_len)
+ lttng_ust_field_integer_hex(uint8_t, opcode, opcode)
+ lttng_ust_field_integer_hex(uint8_t, sl, sl)
+ lttng_ust_field_integer_hex(uint8_t, t_class, t_class)
+ )
+)
+
+LTTNG_UST_TRACEPOINT_EVENT(
+ /* Tracepoint provider name */
+ rdma_core_hns,
+
+ /* Tracepoint name */
+ post_recv,
+
+ /* Input arguments */
+ LTTNG_UST_TP_ARGS(
+ char *, dev_name,
+ uint64_t, wr_id,
+ int32_t, num_sge,
+ uint32_t, rqn,
+ uint8_t, is_srq
+ ),
+
+ /* Output event fields */
+ LTTNG_UST_TP_FIELDS(
+ lttng_ust_field_string(dev_name, dev_name)
+ lttng_ust_field_integer_hex(uint64_t, wr_id, wr_id)
+ lttng_ust_field_integer_hex(int32_t, num_sge, num_sge)
+ lttng_ust_field_integer_hex(uint32_t, rqn, rqn)
+ lttng_ust_field_integer_hex(uint8_t, is_srq, is_srq)
+ )
+)
+
+LTTNG_UST_TRACEPOINT_EVENT(
+ /* Tracepoint provider name */
+ rdma_core_hns,
+
+ /* Tracepoint name */
+ poll_cq,
+
+ /* Input arguments */
+ LTTNG_UST_TP_ARGS(
+ char *, dev_name,
+ uint64_t, wr_id,
+ uint8_t, status,
+ uint8_t, opcode,
+ uint8_t, wc_flags,
+ uint8_t, vendor_err,
+ uint8_t, pktype,
+ uint32_t, lqpn,
+ uint32_t, rqpn,
+ uint32_t, byte_len
+ ),
+
+ /* Output event fields */
+ LTTNG_UST_TP_FIELDS(
+ lttng_ust_field_string(dev_name, dev_name)
+ lttng_ust_field_integer_hex(uint64_t, wr_id, wr_id)
+ lttng_ust_field_integer_hex(uint8_t, status, status)
+ lttng_ust_field_integer_hex(uint8_t, opcode, opcode)
+ lttng_ust_field_integer_hex(uint8_t, wc_flags, wc_flags)
+ lttng_ust_field_integer_hex(uint8_t, vendor_err, vendor_err)
+ lttng_ust_field_integer_hex(uint8_t, pktype, pktype)
+ lttng_ust_field_integer_hex(uint32_t, lqpn, lqpn)
+ lttng_ust_field_integer_hex(uint32_t, rqpn, rqpn)
+ lttng_ust_field_integer_hex(uint32_t, byte_len, byte_len)
+ )
+)
+
#define rdma_tracepoint(arg...) lttng_ust_tracepoint(arg)
#endif /* __HNS_TRACE_H__*/
--
2.33.0

59
0058-libhns-Add-debug-log-for-lock-free-mode.patch Normal file
View File

@ -0,0 +1,59 @@
From 40c7b406829bc1250d93af527d70836e02c1fbac Mon Sep 17 00:00:00 2001
From: Junxian Huang <huangjunxian6@hisilicon.com>
Date: Thu, 24 Apr 2025 20:32:12 +0800
Subject: [PATCH 58/62] libhns: Add debug log for lock-free mode
mainline inclusion
from mainline-v56.0-65
commit fb96940fcf6f96185d407d57bcaf775ccf8f1762
category: cheanup
bugzilla: https://gitee.com/src-openeuler/rdma-core/issues/IC3X57
CVE: NA
Reference:
https://github.com/linux-rdma/rdma-core/pull/1599/commits/fb96940fcf6f96185d...
---------------------------------------------------------------------
Currently there is no way to observe whether the lock-free mode is
configured from the driver's perspective. Add debug log for this.
Signed-off-by: Junxian Huang <huangjunxian6@hisilicon.com>
Signed-off-by: Xinghai Cen <cenxinghai@h-partners.com>
---
providers/hns/hns_roce_u_verbs.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/providers/hns/hns_roce_u_verbs.c b/providers/hns/hns_roce_u_verbs.c
index 5fe169e..3efc2f4 100644
--- a/providers/hns/hns_roce_u_verbs.c
+++ b/providers/hns/hns_roce_u_verbs.c
@@ -182,6 +182,7 @@ err:
struct ibv_pd *hns_roce_u_alloc_pad(struct ibv_context *context,
struct ibv_parent_domain_init_attr *attr)
{
+ struct hns_roce_pd *protection_domain;
struct hns_roce_pad *pad;
if (ibv_check_alloc_parent_domain(attr))
@@ -198,12 +199,16 @@ struct ibv_pd *hns_roce_u_alloc_pad(struct ibv_context *context,
return NULL;
}
+ protection_domain = to_hr_pd(attr->pd);
if (attr->td) {
pad->td = to_hr_td(attr->td);
atomic_fetch_add(&pad->td->refcount, 1);
+ verbs_debug(verbs_get_ctx(context),
+ "set PAD(0x%x) to lock-free mode.\n",
+ protection_domain->pdn);
}
- pad->pd.protection_domain = to_hr_pd(attr->pd);
+ pad->pd.protection_domain = protection_domain;
atomic_fetch_add(&pad->pd.protection_domain->refcount, 1);
atomic_init(&pad->pd.refcount, 1);
--
2.25.1

58
0059-libhns-Fix-ret-not-assigned-in-create-srq.patch Normal file
View File

@ -0,0 +1,58 @@
From 478e5fd1d8e1a0b04fe6638c163951a0892eab44 Mon Sep 17 00:00:00 2001
From: Junxian Huang <huangjunxian6@hisilicon.com>
Date: Wed, 23 Apr 2025 16:55:14 +0800
Subject: [PATCH 59/62] libhns: Fix ret not assigned in create srq()
mainline inclusion
from mainline-v56.0-65
commit 2034b1860c5a8b0cc3879315259462c04e53a98d
category: bugfix
bugzilla: https://gitee.com/src-openeuler/rdma-core/issues/IC3X57
CVE: NA
Reference:
https://github.com/linux-rdma/rdma-core/pull/1599/commits/2034b1860c5a8b0cc3...
---------------------------------------------------------------------
Fix the problem that ret may not be assigned in the error flow
of create_srq().
Fixes: aa7bcf7f7e44 ("libhns: Add support for lock-free SRQ")
Signed-off-by: Junxian Huang <huangjunxian6@hisilicon.com>
Signed-off-by: Xinghai Cen <cenxinghai@h-partners.com>
---
providers/hns/hns_roce_u_verbs.c | 10 +++++++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/providers/hns/hns_roce_u_verbs.c b/providers/hns/hns_roce_u_verbs.c
index 3efc2f4..e0bafe3 100644
--- a/providers/hns/hns_roce_u_verbs.c
+++ b/providers/hns/hns_roce_u_verbs.c
@@ -933,16 +933,20 @@ static struct ibv_srq *create_srq(struct ibv_context *context,
if (pad)
atomic_fetch_add(&pad->pd.refcount, 1);
- if (hns_roce_srq_spinlock_init(context, srq, init_attr))
+ ret = hns_roce_srq_spinlock_init(context, srq, init_attr);
+ if (ret)
goto err_free_srq;
set_srq_param(context, srq, init_attr);
- if (alloc_srq_buf(srq))
+ ret = alloc_srq_buf(srq);
+ if (ret)
goto err_destroy_lock;
srq->rdb = hns_roce_alloc_db(hr_ctx, HNS_ROCE_SRQ_TYPE_DB);
- if (!srq->rdb)
+ if (!srq->rdb) {
+ ret = ENOMEM;
goto err_srq_buf;
+ }
ret = exec_srq_create_cmd(context, srq, init_attr);
if (ret)
--
2.25.1

99
0060-libhns-Fix-pad-refcnt-leaking-in-error-flow-of-creat.patch Normal file
View File

@ -0,0 +1,99 @@
From e45b9c648476b1b56592a873fa71699cb7f32ffd Mon Sep 17 00:00:00 2001
From: Junxian Huang <huangjunxian6@hisilicon.com>
Date: Wed, 23 Apr 2025 16:55:15 +0800
Subject: [PATCH 60/62] libhns: Fix pad refcnt leaking in error flow of create
qp/cq/srq
mainline inclusion
from mainline-v56.0-65
commit f877d6e610e438515e1535c9ec7a3a3ef37c58e0
category: bugfix
bugzilla: https://gitee.com/src-openeuler/rdma-core/issues/IC3X57
CVE: NA
Reference:
https://github.com/linux-rdma/rdma-core/pull/1599/commits/f877d6e610e438515e...
---------------------------------------------------------------------
Decrease pad refcnt by 1 in error flow of create qp/cq/srq.
Fixes: f8b4f622b1c5 ("libhns: Add support for lock-free QP")
Fixes: 95225025e24c ("libhns: Add support for lock-free CQ")
Fixes: aa7bcf7f7e44 ("libhns: Add support for lock-free SRQ")
Signed-off-by: Junxian Huang <huangjunxian6@hisilicon.com>
Signed-off-by: Xinghai Cen <cenxinghai@h-partners.com>
---
providers/hns/hns_roce_u_verbs.c | 20 +++++++++++++-------
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/providers/hns/hns_roce_u_verbs.c b/providers/hns/hns_roce_u_verbs.c
index e0bafe3..70f516a 100644
--- a/providers/hns/hns_roce_u_verbs.c
+++ b/providers/hns/hns_roce_u_verbs.c
@@ -445,12 +445,9 @@ static int verify_cq_create_attr(struct ibv_cq_init_attr_ex *attr,
return EOPNOTSUPP;
}
- if (attr->comp_mask & IBV_CQ_INIT_ATTR_MASK_PD) {
- if (!pad) {
- verbs_err(&context->ibv_ctx, "failed to check the pad of cq.\n");
- return EINVAL;
- }
- atomic_fetch_add(&pad->pd.refcount, 1);
+ if (attr->comp_mask & IBV_CQ_INIT_ATTR_MASK_PD && !pad) {
+ verbs_err(&context->ibv_ctx, "failed to check the pad of cq.\n");
+ return EINVAL;
}
attr->cqe = max_t(uint32_t, HNS_ROCE_MIN_CQE_NUM,
@@ -556,6 +553,7 @@ static void hns_roce_uninit_cq_swc(struct hns_roce_cq *cq)
static struct ibv_cq_ex *create_cq(struct ibv_context *context,
struct ibv_cq_init_attr_ex *attr)
{
+ struct hns_roce_pad *pad = to_hr_pad(attr->parent_domain);
struct hns_roce_context *hr_ctx = to_hr_ctx(context);
struct hns_roce_cq *cq;
int ret;
@@ -570,8 +568,10 @@ static struct ibv_cq_ex *create_cq(struct ibv_context *context,
goto err;
}
- if (attr->comp_mask & IBV_CQ_INIT_ATTR_MASK_PD)
+ if (attr->comp_mask & IBV_CQ_INIT_ATTR_MASK_PD) {
cq->parent_domain = attr->parent_domain;
+ atomic_fetch_add(&pad->pd.refcount, 1);
+ }
ret = hns_roce_cq_spinlock_init(context, cq, attr);
if (ret)
@@ -611,6 +611,8 @@ err_db:
err_buf:
hns_roce_spinlock_destroy(&cq->hr_lock);
err_lock:
+ if (attr->comp_mask & IBV_CQ_INIT_ATTR_MASK_PD)
+ atomic_fetch_sub(&pad->pd.refcount, 1);
free(cq);
err:
if (ret < 0)
@@ -977,6 +979,8 @@ err_destroy_lock:
hns_roce_spinlock_destroy(&srq->hr_lock);
err_free_srq:
+ if (pad)
+ atomic_fetch_sub(&pad->pd.refcount, 1);
free(srq);
err:
@@ -1872,6 +1876,8 @@ err_cmd:
err_buf:
hns_roce_qp_spinlock_destroy(qp);
err_spinlock:
+ if (pad)
+ atomic_fetch_sub(&pad->pd.refcount, 1);
free(qp);
err:
if (ret < 0)
--
2.25.1

69
0061-libhns-Fix-freeing-pad-without-checking-refcnt.patch Normal file
View File

@ -0,0 +1,69 @@
From 59108bf3e452fa7701a3972c78d22352598891be Mon Sep 17 00:00:00 2001
From: Junxian Huang <huangjunxian6@hisilicon.com>
Date: Wed, 23 Apr 2025 16:55:16 +0800
Subject: [PATCH 61/62] libhns: Fix freeing pad without checking refcnt
mainline inclusion
from mainline-v56.0-65
commit 234d135276ea8ef83633113e224e0cd735ebeca8
category: bugfix
bugzilla: https://gitee.com/src-openeuler/rdma-core/issues/IC3X57
CVE: NA
Reference:
https://github.com/linux-rdma/rdma-core/pull/1599/commits/234d135276ea8ef836...
---------------------------------------------------------------------
Currently pad refcnt will be added when creating qp/cq/srq, but it is
not checked when freeing pad. Add a check to prevent freeing pad when
it is still used by any qp/cq/srq.
Fixes: 7b6b3dae328f ("libhns: Add support for thread domain and parent
domain")
Signed-off-by: Junxian Huang <huangjunxian6@hisilicon.com>
Signed-off-by: Xinghai Cen <cenxinghai@h-partners.com>
---
providers/hns/hns_roce_u_verbs.c | 12 +++++++-----
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/providers/hns/hns_roce_u_verbs.c b/providers/hns/hns_roce_u_verbs.c
index 70f516a..edd8e3d 100644
--- a/providers/hns/hns_roce_u_verbs.c
+++ b/providers/hns/hns_roce_u_verbs.c
@@ -218,14 +218,18 @@ struct ibv_pd *hns_roce_u_alloc_pad(struct ibv_context *context,
return &pad->pd.ibv_pd;
}
-static void hns_roce_free_pad(struct hns_roce_pad *pad)
+static int hns_roce_free_pad(struct hns_roce_pad *pad)
{
+ if (atomic_load(&pad->pd.refcount) > 1)
+ return EBUSY;
+
atomic_fetch_sub(&pad->pd.protection_domain->refcount, 1);
if (pad->td)
atomic_fetch_sub(&pad->td->refcount, 1);
free(pad);
+ return 0;
}
static int hns_roce_free_pd(struct hns_roce_pd *pd)
@@ -248,10 +252,8 @@ int hns_roce_u_dealloc_pd(struct ibv_pd *ibv_pd)
struct hns_roce_pad *pad = to_hr_pad(ibv_pd);
struct hns_roce_pd *pd = to_hr_pd(ibv_pd);
- if (pad) {
- hns_roce_free_pad(pad);
- return 0;
- }
+ if (pad)
+ return hns_roce_free_pad(pad);
return hns_roce_free_pd(pd);
}
--
2.25.1

43
0062-verbs-Assign-ibv-srq-pd-when-creating-SRQ.patch Normal file
View File

@ -0,0 +1,43 @@
From 387d76c0046b4fb6fbd8d70389b335661d099683 Mon Sep 17 00:00:00 2001
From: Junxian Huang <huangjunxian6@hisilicon.com>
Date: Wed, 23 Apr 2025 16:55:17 +0800
Subject: [PATCH 62/62] verbs: Assign ibv srq->pd when creating SRQ
mainline inclusion
from mainline-v56.0-65
commit bf1e427141fde2651bab4860e77a432bb7e26094
category: bugfix
bugzilla: https://gitee.com/src-openeuler/rdma-core/issues/IC3X57
CVE: NA
Reference:
https://github.com/linux-rdma/rdma-core/pull/1599/commits/bf1e427141fde2651b...
---------------------------------------------------------------------
Some providers need to access ibv_srq->pd during SRQ destruction, but
it may not be assigned currently when using ibv_create_srq_ex(). This
may lead to some SRQ-related resource leaks. Assign ibv_srq->pd when
creating SRQ to ensure pd can be obtained correctly.
Signed-off-by: Junxian Huang <huangjunxian6@hisilicon.com>
Signed-off-by: Xinghai Cen <cenxinghai@h-partners.com>
---
libibverbs/cmd_srq.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/libibverbs/cmd_srq.c b/libibverbs/cmd_srq.c
index dfaaa6a..259ea0d 100644
--- a/libibverbs/cmd_srq.c
+++ b/libibverbs/cmd_srq.c
@@ -63,6 +63,7 @@ static int ibv_icmd_create_srq(struct ibv_pd *pd, struct verbs_srq *vsrq,
struct verbs_xrcd *vxrcd = NULL;
enum ibv_srq_type srq_type;
+ srq->pd = pd;
srq->context = pd->context;
pthread_mutex_init(&srq->mutex, NULL);
pthread_cond_init(&srq->cond, NULL);
--
2.25.1

2742
0063-libxscale-update-to-version-2412GA.patch Normal file
View File

File diff suppressed because it is too large Load Diff

62
rdma-core.spec
View File

@ -1,6 +1,6 @@
Name: rdma-core
Version: 50.0
Release: 22
Release: 29
Summary: RDMA core userspace libraries and daemons
License: GPL-2.0-only OR BSD-2-Clause AND BSD-3-Clause
Url: https://github.com/linux-rdma/rdma-core
@ -49,6 +49,20 @@ patch41: 0041-libhns-Fix-coredump-during-QP-destruction-when-send_.patch
patch42: 0042-libhns-Add-error-logs-to-help-diagnosis.patch
patch43: 0043-libhns-Fix-missing-fields-for-SRQ-WC.patch
patch44: 0044-libxscale-Add-Yunsilicon-User-Space-RDMA-Driver.patch
patch45: 0045-libhns-fix-incorrectly-using-fixed-pagesize.patch
patch46: 0046-libhns-fix-missing-new-IO-support-for-DCA.patch
patch52: 0052-libxscale-Match-dev-by-vid-and-did.patch
patch53: 0053-libhns-Clean-up-data-type-issues.patch
patch54: 0054-libhns-Fix-wrong-max-inline-data-value.patch
patch55: 0055-libhns-Fix-wrong-order-of-spin-unlock-in-modify-qp.patch
patch56: 0056-libhns-Add-initial-support-for-HNS-LTTng-tracing.patch
patch57: 0057-libhns-Add-tracepoint-for-HNS-RoCE-I-O.patch
patch58: 0058-libhns-Add-debug-log-for-lock-free-mode.patch
patch59: 0059-libhns-Fix-ret-not-assigned-in-create-srq.patch
patch60: 0060-libhns-Fix-pad-refcnt-leaking-in-error-flow-of-creat.patch
patch61: 0061-libhns-Fix-freeing-pad-without-checking-refcnt.patch
patch62: 0062-verbs-Assign-ibv-srq-pd-when-creating-SRQ.patch
patch63: 0063-libxscale-update-to-version-2412GA.patch
BuildRequires: binutils cmake >= 2.8.11 gcc libudev-devel pkgconfig pkgconfig(libnl-3.0)
BuildRequires: pkgconfig(libnl-route-3.0) systemd systemd-devel
@ -626,6 +640,48 @@ fi
%doc %{_docdir}/%{name}-%{version}/70-persistent-ipoib.rules
%changelog
* Thu May 8 2025 Xin Tian <tianx@yunsilicon.com> - 50.0-29
- Type: feature
- ID: NA
- SUG: NA
- DESC: [libxscale] update to version 2412GA
* Fri Apr 25 2025 Xinghai Cen <cenxinghai@h-partners.com> - 50.0-28
- Type: bugfix
- ID: NA
- SUG: NA
- DESC: Bugfixes and one debug improvement
* Wed Apr 23 2025 Xinghai Cen <cenxinghai@h-partners.com> - 50.0-27
- Type: feature
- ID: NA
- SUG: NA
- DESC: libhns: Add support for LTTng tracing
* Thu Apr 17 2025 Xinghai Cen <cenxinghai@h-partners.com> - 50.0-26
- Type: bugfix
- ID: NA
- SUG: NA
- DESC: libhns: Cleanup and Bugfixes
* Thu Mar 20 2025 Xin Tian <tianx@yunsilicon.com> - 50.0-25
- Type: bugfix
- ID: NA
- SUG: NA
- DESC: [libxscale] Match dev by vid and did
* Wed Apr 4 2025 Xinghai Cen <cenxinghai@h-partners.com> - 50.0-24
- Type: requirment
- ID: NA
- SUG: NA
- DESC: No code modification, just a pile
* Mon Mar 31 2025 Xinghai Cen <cenxinghai@h-partners.com> - 50.0-23
- Type: bugfix
- ID: NA
- SUG: NA
- DESC: Fix some bugs for libhns
* Wed Feb 26 2025 Xin Tian <tianx@yunsilicon.com> - 50.0-22
- Type: requirement
- ID: NA
@ -781,13 +837,13 @@ fi
- Type: bugfix
- ID: NA
- SUG: NA
- DESC: Bugfix for lock and owner bit
- DESC: Bugfix for lock and owner bit
* Fri Dec 1 2023 Ran Zhou <zhouran10@h-partners.com> - 41.0-22
- Type: bugfix
- ID: NA
- SUG: NA
- DESC: Bugfix for wrong timing of modifying ibv_qp state to err
- DESC: Bugfix for wrong timing of modifying ibv_qp state to err
* Mon Nov 27 2023 Ran Zhou <zhouran10@h-partners.com> - 41.0-21
- Type: bugfix