!85 [sync] PR-66: 1. Fix the sge num problem of atomic op; 2. Fix sge tail_len overflow; 3. Disable local invalidate operation
From: @openeuler-sync-bot Reviewed-by: @hellotcc Signed-off-by: @hellotcc
This commit is contained in:
openeuler-ci-bot
Gitee
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74bc13a3c0
91
0044-libhns-Fix-the-sge-num-problem-of-atomic-op.patch
Normal file
91
0044-libhns-Fix-the-sge-num-problem-of-atomic-op.patch
Normal file
@ -0,0 +1,91 @@
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From b5127a009336e0e6947433148c6c7422c277bce7 Mon Sep 17 00:00:00 2001
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From: Luoyouming <luoyouming@huawei.com>
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Date: Sat, 6 May 2023 18:06:38 +0800
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Subject: [PATCH 1/3] libhns: Fix the sge num problem of atomic op
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mainline inclusion
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commit b4793235
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category: bugfix
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bugzilla: https://gitee.com/src-openeuler/rdma-core/issues/I72EWP
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CVE: NA
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----------------------------------------------------------------------
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The hns hardware logic requires wr->num_sge to be 1 when
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performing atomic operations. The code does not judge this
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condition, and the current patch adds this constraint.
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Fixes: 3507f87f7760 ("libhns: Optimize set_sge process")
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Fixes: 36446a56eea5 ("libhns: Extended QP supports the new post send mechanism")
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Signed-off-by: Luoyouming <luoyouming@huawei.com>
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Signed-off-by: Zhou Juan <nnuzj07170227@163.com>
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---
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providers/hns/hns_roce_u_hw_v2.c | 23 ++++++++++++++++++-----
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1 file changed, 18 insertions(+), 5 deletions(-)
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diff --git a/providers/hns/hns_roce_u_hw_v2.c b/providers/hns/hns_roce_u_hw_v2.c
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index a49b50d..5533cdb 100644
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--- a/providers/hns/hns_roce_u_hw_v2.c
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+++ b/providers/hns/hns_roce_u_hw_v2.c
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@@ -106,6 +106,9 @@ static int set_atomic_seg(struct hns_roce_qp *qp, struct ibv_send_wr *wr,
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void *buf[ATOMIC_BUF_NUM_MAX];
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unsigned int buf_sge_num;
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+ /* There is only one sge in atomic wr, and data_len is the data length
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+ * in the first sge
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+ */
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if (is_std_atomic(data_len)) {
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if (wr->opcode == IBV_WR_ATOMIC_CMP_AND_SWP) {
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aseg->fetchadd_swap_data = htole64(wr->wr.atomic.swap);
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@@ -923,16 +926,19 @@ static void set_rc_sge(struct hns_roce_v2_wqe_data_seg *dseg,
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uint32_t mask = qp->ex_sge.sge_cnt - 1;
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uint32_t index = sge_info->start_idx;
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struct ibv_sge *sge = wr->sg_list;
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+ int total_sge = wr->num_sge;
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+ bool flag = false;
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uint32_t len = 0;
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uint32_t cnt = 0;
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- int flag;
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int i;
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- flag = (wr->send_flags & IBV_SEND_INLINE &&
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- wr->opcode != IBV_WR_ATOMIC_FETCH_AND_ADD &&
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- wr->opcode != IBV_WR_ATOMIC_CMP_AND_SWP);
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+ if (wr->opcode == IBV_WR_ATOMIC_FETCH_AND_ADD ||
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+ wr->opcode == IBV_WR_ATOMIC_CMP_AND_SWP)
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+ total_sge = 1;
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+ else
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+ flag = !!(wr->send_flags & IBV_SEND_INLINE);
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- for (i = 0; i < wr->num_sge; i++, sge++) {
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+ for (i = 0; i < total_sge; i++, sge++) {
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if (unlikely(!sge->length))
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continue;
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@@ -2267,6 +2273,7 @@ static void wr_set_sge_list_rc(struct ibv_qp_ex *ibv_qp, size_t num_sge,
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struct hns_roce_qp *qp = to_hr_qp(&ibv_qp->qp_base);
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struct hns_roce_rc_sq_wqe *wqe = qp->cur_wqe;
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struct hns_roce_v2_wqe_data_seg *dseg;
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+ uint32_t opcode;
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if (!wqe)
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return;
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@@ -2276,9 +2283,15 @@ static void wr_set_sge_list_rc(struct ibv_qp_ex *ibv_qp, size_t num_sge,
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return;
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}
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+
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hr_reg_write(wqe, RCWQE_MSG_START_SGE_IDX,
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qp->sge_info.start_idx & (qp->ex_sge.sge_cnt - 1));
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+ opcode = hr_reg_read(wqe, RCWQE_OPCODE);
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+ if (opcode == HNS_ROCE_WQE_OP_ATOMIC_COM_AND_SWAP ||
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+ opcode == HNS_ROCE_WQE_OP_ATOMIC_FETCH_AND_ADD)
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+ num_sge = 1;
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+
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dseg = (void *)(wqe + 1);
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set_sgl_rc(dseg, qp, sg_list, num_sge);
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--
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2.25.1
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55
0045-libhns-Fix-sge-tail_len-overflow.patch
Normal file
55
0045-libhns-Fix-sge-tail_len-overflow.patch
Normal file
@ -0,0 +1,55 @@
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From 2653621c332c79ba591d76a442061bd13ad23030 Mon Sep 17 00:00:00 2001
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From: Luoyouming <luoyouming@huawei.com>
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Date: Sat, 6 May 2023 18:06:39 +0800
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Subject: [PATCH 2/3] libhns: Fix sge tail_len overflow
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mainline inclusion
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commit cd9c9ea5
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category: bugfix
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bugzilla: https://gitee.com/src-openeuler/rdma-core/issues/I72F0C
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CVE: NA
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----------------------------------------------------------------------
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In the sq inline scenario, when num_sge in post_send is not 1, sge
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array appears in the for loop without rotation and directly copy
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out of bounds.
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The fill_ext_sge_inl_data() calculates the remaining length of the
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array by subtracting the current address from the tail address. If
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the length is not sufficient, redundant data will be copied after
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rotating the array. However, in the code, sge_cnt & sge_mask always
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equals to 0, which causes the tail address of the array to be
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mistakenly taken as the first address. Additionally, tail_len will
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be either 0 or may overflow when calculating this value. After
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overflowing to a very large number, the driver makes an incorrect
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judgment and copies all the data directly. When the data length
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exceeds the remaining length, an out-of-bounds problem with the
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array will occur.
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This patch modifies tail_bound_addr(tail pointer) to the actual sge
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array tail address.
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Fixes: 2ced2bc4d1d4 ("libhns: Fix out-of-bounds write when filling inline data into extended sge space")
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Signed-off-by: Luoyouming <luoyouming@huawei.com>
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Signed-off-by: Zhou Juan <nnuzj07170227@163.com>
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---
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providers/hns/hns_roce_u_hw_v2.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/providers/hns/hns_roce_u_hw_v2.c b/providers/hns/hns_roce_u_hw_v2.c
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index 5533cdb..3d46f35 100644
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--- a/providers/hns/hns_roce_u_hw_v2.c
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+++ b/providers/hns/hns_roce_u_hw_v2.c
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@@ -1028,7 +1028,7 @@ static int fill_ext_sge_inl_data(struct hns_roce_qp *qp,
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return EINVAL;
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dst_addr = get_send_sge_ex(qp, sge_info->start_idx & sge_mask);
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- tail_bound_addr = get_send_sge_ex(qp, qp->ex_sge.sge_cnt & sge_mask);
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+ tail_bound_addr = get_send_sge_ex(qp, qp->ex_sge.sge_cnt);
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for (i = 0; i < num_buf; i++) {
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tail_len = (uintptr_t)tail_bound_addr - (uintptr_t)dst_addr;
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--
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2.25.1
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153
0046-libhns-Disable-local-invalidate-operation.patch
Normal file
153
0046-libhns-Disable-local-invalidate-operation.patch
Normal file
@ -0,0 +1,153 @@
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From b3cea3522d575fdb60b6f426e43d45cec3deb847 Mon Sep 17 00:00:00 2001
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From: Yangyang Li <liyangyang20@huawei.com>
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Date: Sat, 6 May 2023 18:06:40 +0800
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Subject: [PATCH 3/3] libhns: Disable local invalidate operation
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mainline inclusion
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commit d8eec872
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category: bugfix
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bugzilla: https://gitee.com/src-openeuler/rdma-core/issues/I72F0U
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CVE: NA
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----------------------------------------------------------------------
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Currently local invalidate operation don't work properly.
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Disable it for the time being.
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HIP08 and HIP09 hardware does not support this feature, so
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delete the associated code.
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Fixes: a9ae7e9bfb5d ("libhns: Add local invalidate MR support for hip08")
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Signed-off-by: Yangyang Li <liyangyang20@huawei.com>
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Signed-off-by: Zhou Juan <nnuzj07170227@163.com>
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---
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providers/hns/hns_roce_u_hw_v2.c | 30 +-----------------------------
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providers/hns/hns_roce_u_hw_v2.h | 2 --
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2 files changed, 1 insertion(+), 31 deletions(-)
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diff --git a/providers/hns/hns_roce_u_hw_v2.c b/providers/hns/hns_roce_u_hw_v2.c
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index 3d46f35..b929bbf 100644
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--- a/providers/hns/hns_roce_u_hw_v2.c
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+++ b/providers/hns/hns_roce_u_hw_v2.c
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@@ -50,7 +50,6 @@ static const uint32_t hns_roce_opcode[] = {
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HR_IBV_OPC_MAP(RDMA_READ, RDMA_READ),
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HR_IBV_OPC_MAP(ATOMIC_CMP_AND_SWP, ATOMIC_COM_AND_SWAP),
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HR_IBV_OPC_MAP(ATOMIC_FETCH_AND_ADD, ATOMIC_FETCH_AND_ADD),
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- HR_IBV_OPC_MAP(LOCAL_INV, LOCAL_INV),
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HR_IBV_OPC_MAP(BIND_MW, BIND_MW_TYPE),
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HR_IBV_OPC_MAP(SEND_WITH_INV, SEND_WITH_INV),
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};
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@@ -429,7 +428,6 @@ static const unsigned int wc_send_op_map[] = {
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[HNS_ROCE_SQ_OP_RDMA_READ] = IBV_WC_RDMA_READ,
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[HNS_ROCE_SQ_OP_ATOMIC_COMP_AND_SWAP] = IBV_WC_COMP_SWAP,
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[HNS_ROCE_SQ_OP_ATOMIC_FETCH_AND_ADD] = IBV_WC_FETCH_ADD,
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- [HNS_ROCE_SQ_OP_LOCAL_INV] = IBV_WC_LOCAL_INV,
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[HNS_ROCE_SQ_OP_BIND_MW] = IBV_WC_BIND_MW,
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};
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@@ -597,9 +595,6 @@ static void parse_cqe_for_req(struct hns_roce_v2_cqe *cqe, struct ibv_wc *wc,
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case HNS_ROCE_SQ_OP_RDMA_WRITE_WITH_IMM:
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wc->wc_flags = IBV_WC_WITH_IMM;
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break;
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- case HNS_ROCE_SQ_OP_LOCAL_INV:
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- wc->wc_flags = IBV_WC_WITH_INV;
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- break;
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case HNS_ROCE_SQ_OP_RDMA_READ:
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case HNS_ROCE_SQ_OP_ATOMIC_COMP_AND_SWAP:
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case HNS_ROCE_SQ_OP_ATOMIC_FETCH_AND_ADD:
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@@ -1338,9 +1333,6 @@ static int check_rc_opcode(struct hns_roce_rc_sq_wqe *wqe,
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wqe->rkey = htole32(wr->wr.atomic.rkey);
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wqe->va = htole64(wr->wr.atomic.remote_addr);
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break;
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- case IBV_WR_LOCAL_INV:
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- hr_reg_enable(wqe, RCWQE_SO);
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- /* fallthrough */
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case IBV_WR_SEND_WITH_INV:
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wqe->inv_key = htole32(wr->invalidate_rkey);
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break;
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@@ -1372,7 +1364,6 @@ static int set_rc_wqe(void *wqe, struct hns_roce_qp *qp, struct ibv_send_wr *wr,
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!!(wr->send_flags & IBV_SEND_SOLICITED));
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hr_reg_write_bool(wqe, RCWQE_INLINE,
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!!(wr->send_flags & IBV_SEND_INLINE));
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- hr_reg_clear(wqe, RCWQE_SO);
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ret = check_rc_opcode(rc_sq_wqe, wr);
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if (ret)
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@@ -2092,8 +2083,6 @@ static unsigned int get_wc_flags_for_sq(uint8_t opcode)
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case HNS_ROCE_SQ_OP_SEND_WITH_IMM:
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case HNS_ROCE_SQ_OP_RDMA_WRITE_WITH_IMM:
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return IBV_WC_WITH_IMM;
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- case HNS_ROCE_SQ_OP_LOCAL_INV:
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- return IBV_WC_WITH_INV;
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default:
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return 0;
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}
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@@ -2202,7 +2191,6 @@ init_rc_wqe(struct hns_roce_qp *qp, uint64_t wr_id, unsigned int opcode)
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hr_reg_write_bool(wqe, RCWQE_FENCE, send_flags & IBV_SEND_FENCE);
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hr_reg_write_bool(wqe, RCWQE_SE, send_flags & IBV_SEND_SOLICITED);
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hr_reg_clear(wqe, RCWQE_INLINE);
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- hr_reg_clear(wqe, RCWQE_SO);
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if (check_qp_dca_enable(qp))
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fill_rc_dca_fields(qp->verbs_qp.qp.qp_num, wqe);
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@@ -2332,20 +2320,6 @@ static void wr_send_inv_rc(struct ibv_qp_ex *ibv_qp, uint32_t invalidate_rkey)
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wqe->inv_key = htole32(invalidate_rkey);
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}
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-static void wr_local_inv_rc(struct ibv_qp_ex *ibv_qp, uint32_t invalidate_rkey)
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-{
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- struct hns_roce_qp *qp = to_hr_qp(&ibv_qp->qp_base);
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- struct hns_roce_rc_sq_wqe *wqe;
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-
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- wqe = init_rc_wqe(qp, ibv_qp->wr_id, HNS_ROCE_WQE_OP_LOCAL_INV);
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- if (!wqe)
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- return;
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-
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- hr_reg_enable(wqe, RCWQE_SO);
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- wqe->inv_key = htole32(invalidate_rkey);
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- enable_wqe(qp, wqe, qp->sq.head);
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-}
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-
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static void wr_set_xrc_srqn(struct ibv_qp_ex *ibv_qp, uint32_t remote_srqn)
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{
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struct hns_roce_qp *qp = to_hr_qp(&ibv_qp->qp_base);
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@@ -2833,8 +2807,7 @@ enum {
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IBV_QP_EX_WITH_RDMA_WRITE_WITH_IMM |
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IBV_QP_EX_WITH_RDMA_READ |
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IBV_QP_EX_WITH_ATOMIC_CMP_AND_SWP |
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- IBV_QP_EX_WITH_ATOMIC_FETCH_AND_ADD |
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- IBV_QP_EX_WITH_LOCAL_INV,
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+ IBV_QP_EX_WITH_ATOMIC_FETCH_AND_ADD,
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HNS_SUPPORTED_SEND_OPS_FLAGS_UD =
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IBV_QP_EX_WITH_SEND |
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IBV_QP_EX_WITH_SEND_WITH_IMM,
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@@ -2850,7 +2823,6 @@ static void fill_send_wr_ops_rc_xrc(struct ibv_qp_ex *qp_ex)
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qp_ex->wr_rdma_write_imm = wr_rdma_write_imm;
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qp_ex->wr_set_inline_data = wr_set_inline_data_rc;
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qp_ex->wr_set_inline_data_list = wr_set_inline_data_list_rc;
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- qp_ex->wr_local_inv = wr_local_inv_rc;
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qp_ex->wr_atomic_cmp_swp = wr_atomic_cmp_swp;
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qp_ex->wr_atomic_fetch_add = wr_atomic_fetch_add;
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qp_ex->wr_set_sge = wr_set_sge_rc;
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diff --git a/providers/hns/hns_roce_u_hw_v2.h b/providers/hns/hns_roce_u_hw_v2.h
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index a22995d..d628d76 100644
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--- a/providers/hns/hns_roce_u_hw_v2.h
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+++ b/providers/hns/hns_roce_u_hw_v2.h
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@@ -60,7 +60,6 @@ enum {
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HNS_ROCE_WQE_OP_ATOMIC_MASK_COMP_AND_SWAP = 0x8,
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HNS_ROCE_WQE_OP_ATOMIC_MASK_FETCH_AND_ADD = 0x9,
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HNS_ROCE_WQE_OP_FAST_REG_PMR = 0xa,
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- HNS_ROCE_WQE_OP_LOCAL_INV = 0xb,
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HNS_ROCE_WQE_OP_BIND_MW_TYPE = 0xc,
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HNS_ROCE_WQE_OP_MASK = 0x1f
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};
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@@ -85,7 +84,6 @@ enum {
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HNS_ROCE_SQ_OP_ATOMIC_MASK_COMP_AND_SWAP = 0x8,
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HNS_ROCE_SQ_OP_ATOMIC_MASK_FETCH_AND_ADD = 0x9,
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HNS_ROCE_SQ_OP_FAST_REG_PMR = 0xa,
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- HNS_ROCE_SQ_OP_LOCAL_INV = 0xb,
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HNS_ROCE_SQ_OP_BIND_MW = 0xc,
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};
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--
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2.25.1
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@ -1,6 +1,6 @@
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Name: rdma-core
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Version: 41.0
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Release: 10
|
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Release: 11
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Summary: RDMA core userspace libraries and daemons
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License: GPLv2 or BSD
|
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Url: https://github.com/linux-rdma/rdma-core
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@ -49,6 +49,9 @@ Patch39: 0040-Update-kernel-headers.patch
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Patch40: 0041-libhns-Support-congestion-control-algorithm-configur.patch
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Patch41: 0042-Update-kernel-headers.patch
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Patch42: 0043-libhns-Add-support-for-SVE-Direct-WQE.patch
|
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Patch43: 0044-libhns-Fix-the-sge-num-problem-of-atomic-op.patch
|
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Patch44: 0045-libhns-Fix-sge-tail_len-overflow.patch
|
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Patch45: 0046-libhns-Disable-local-invalidate-operation.patch
|
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|
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BuildRequires: binutils cmake >= 2.8.11 gcc libudev-devel pkgconfig pkgconfig(libnl-3.0)
|
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BuildRequires: pkgconfig(libnl-route-3.0) valgrind-devel systemd systemd-devel
|
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@ -296,6 +299,12 @@ fi
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%{_mandir}/*
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%changelog
|
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* Thu May 11 2023 Juan Zhou <zhoujuan51@h-partners.com> - 41.0-11
|
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- Type: bugfix
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- ID: NA
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- SUG: NA
|
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- DESC: Fix the sge number related errors and remove local invalidate operation
|
||||
|
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* Mon Apr 17 2023 Juan Zhou <zhoujuan51@h-partners.com> - 41.0-10
|
||||
- Type: bugfix
|
||||
- ID: NA
|
||||
|
||||
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