From 39e21f564099f9ffe02643f8f02119168263c5dd Mon Sep 17 00:00:00 2001 From: mahailiang Date: Tue, 12 Nov 2024 09:53:31 +0800 Subject: [PATCH] add sw64 support --- .../double-conversion/utils.h | 2 +- src/3rdparty/forkfd/forkfd_linux.c | 2 +- src/3rdparty/sha3/brg_endian.h | 1 + src/corelib/global/archdetect.cpp | 2 ++ src/corelib/global/qprocessordetection.h | 2 ++ src/corelib/io/qfilesystemwatcher_inotify.cpp | 4 +++ src/corelib/plugin/qelfparser_p.cpp | 3 ++ src/gui/image/qimage.cpp | 4 +++ src/testlib/3rdparty/cycle_p.h | 35 +++++++++++++++++++ 9 files changed, 53 insertions(+), 2 deletions(-) diff --git a/src/3rdparty/double-conversion/double-conversion/utils.h b/src/3rdparty/double-conversion/double-conversion/utils.h index 4f4dd71b..4c4fdde7 100644 --- a/src/3rdparty/double-conversion/double-conversion/utils.h +++ b/src/3rdparty/double-conversion/double-conversion/utils.h @@ -139,7 +139,7 @@ int main(int argc, char** argv) { defined(__ARMEL__) || defined(__avr32__) || defined(_M_ARM) || defined(_M_ARM64) || \ defined(__hppa__) || defined(__ia64__) || \ defined(__mips__) || \ - defined(__loongarch__) || \ + defined(__loongarch__) || defined(__sw_64__) \ defined(__nios2__) || defined(__ghs) || \ defined(__powerpc__) || defined(__ppc__) || defined(__ppc64__) || \ defined(_POWER) || defined(_ARCH_PPC) || defined(_ARCH_PPC64) || \ diff --git a/src/3rdparty/forkfd/forkfd_linux.c b/src/3rdparty/forkfd/forkfd_linux.c index cc7af6cb..cd86496b 100644 --- a/src/3rdparty/forkfd/forkfd_linux.c +++ b/src/3rdparty/forkfd/forkfd_linux.c @@ -85,7 +85,7 @@ static int sys_clone(unsigned long cloneflags, int *ptid) #elif defined(__arc__) || defined(__arm__) || defined(__aarch64__) || defined(__mips__) || \ defined(__nds32__) || defined(__hppa__) || defined(__powerpc__) || defined(__i386__) || \ defined(__x86_64__) || defined(__xtensa__) || defined(__alpha__) || defined(__riscv) || \ - defined(__loongarch__) + defined(__loongarch__) || defined(__sw_64__) /* ctid and newtls are inverted on CONFIG_CLONE_BACKWARDS architectures, * but since both values are 0, there's no harm. */ return syscall(__NR_clone, cloneflags, child_stack, ptid, ctid, newtls); diff --git a/src/3rdparty/sha3/brg_endian.h b/src/3rdparty/sha3/brg_endian.h index 9bb306e6..e3907596 100644 --- a/src/3rdparty/sha3/brg_endian.h +++ b/src/3rdparty/sha3/brg_endian.h @@ -105,6 +105,7 @@ Changes for ARM 9/9/2010 [Downstream relative to Gladman's GitHub, upstream to Q #if !defined(PLATFORM_BYTE_ORDER) #if defined( __alpha__ ) || defined( __alpha ) || defined( i386 ) || \ +#if defined( __sw_64__ ) || defined( __sw_64 ) || \ defined( __i386__ ) || defined( _M_I86 ) || defined( _M_IX86 ) || \ defined( __OS2__ ) || defined( sun386 ) || defined( __TURBOC__ ) || \ defined( vax ) || defined( vms ) || defined( VMS ) || \ diff --git a/src/corelib/global/archdetect.cpp b/src/corelib/global/archdetect.cpp index 6a1e110a..5e16e1fe 100644 --- a/src/corelib/global/archdetect.cpp +++ b/src/corelib/global/archdetect.cpp @@ -7,6 +7,8 @@ // main part: processor type #if defined(Q_PROCESSOR_ALPHA) # define ARCH_PROCESSOR "alpha" +#elif defined(Q_PROCESSOR_SW_64) +# define ARCH_PROCESSOR "sw_64" #elif defined(Q_PROCESSOR_ARM_32) # define ARCH_PROCESSOR "arm" #elif defined(Q_PROCESSOR_ARM_64) diff --git a/src/corelib/global/qprocessordetection.h b/src/corelib/global/qprocessordetection.h index f7298bbb..781476a1 100644 --- a/src/corelib/global/qprocessordetection.h +++ b/src/corelib/global/qprocessordetection.h @@ -55,6 +55,8 @@ # define Q_PROCESSOR_ALPHA // Q_BYTE_ORDER not defined, use endianness auto-detection +#elif defined(__sw_64__) || defined(_M_SW_64) +# define Q_PROCESSOR_SW_64 /* ARM family, known revisions: V5, V6, V7, V8 diff --git a/src/corelib/io/qfilesystemwatcher_inotify.cpp b/src/corelib/io/qfilesystemwatcher_inotify.cpp index 3b53b490..493bc5c8 100644 --- a/src/corelib/io/qfilesystemwatcher_inotify.cpp +++ b/src/corelib/io/qfilesystemwatcher_inotify.cpp @@ -55,6 +55,10 @@ # define __NR_inotify_add_watch 285 # define __NR_inotify_rm_watch 286 # define __NR_inotify_init1 324 +#elif defined (__sw_64__) +# define __NR_inotify_init 444 +# define __NR_inotify_add_watch 445 +# define __NR_inotify_rm_watch 446 #elif defined (__alpha__) # define __NR_inotify_init 444 # define __NR_inotify_add_watch 445 diff --git a/src/corelib/plugin/qelfparser_p.cpp b/src/corelib/plugin/qelfparser_p.cpp index ffc4a14b..7b8749eb 100644 --- a/src/corelib/plugin/qelfparser_p.cpp +++ b/src/corelib/plugin/qelfparser_p.cpp @@ -109,6 +109,8 @@ struct ElfMachineCheck // nothing #elif defined(Q_PROCESSOR_ALPHA) EM_ALPHA +#elif defined(Q_PROCESSOR_SW_64) + EM_SW_64 #elif defined(Q_PROCESSOR_ARM_32) EM_ARM #elif defined(Q_PROCESSOR_ARM_64) @@ -380,6 +382,7 @@ Q_DECL_UNUSED Q_DECL_COLD_FUNCTION static QDebug &operator<<(QDebug &d, ElfHeade // list definitely not exhaustive! case EM_NONE: d << ", no machine"; break; case EM_ALPHA: d << ", Alpha"; break; + case EM_SW_64: d << ", SW_64"; break; case EM_68K: d << ", MC68000"; break; case EM_ARM: d << ", ARM"; break; case EM_AARCH64: d << ", AArch64"; break; diff --git a/src/gui/image/qimage.cpp b/src/gui/image/qimage.cpp index 71367f6d..bc8c84df 100644 --- a/src/gui/image/qimage.cpp +++ b/src/gui/image/qimage.cpp @@ -53,6 +53,10 @@ using namespace Qt::StringLiterals; // for valid QImage's, where height() cannot be 0. Therefore disable the warning. QT_WARNING_DISABLE_MSVC(4723) +#if defined(Q_CC_DEC) && defined(__sw_64) && (__DECCXX_VER-0 >= 50190001) +#pragma message disable narrowptr +#endif + #if defined(Q_CC_DEC) && defined(__alpha) && (__DECCXX_VER-0 >= 50190001) #pragma message disable narrowptr #endif diff --git a/src/testlib/3rdparty/cycle_p.h b/src/testlib/3rdparty/cycle_p.h index 95e741a8..4d933e10 100644 --- a/src/testlib/3rdparty/cycle_p.h +++ b/src/testlib/3rdparty/cycle_p.h @@ -405,6 +405,26 @@ INLINE_ELAPSED(__inline__) #define HAVE_TICK_COUNTER #endif +/*----------------------------------------------------------------*/ +#if defined(__GNUC__) && defined(__sw_64__) && !defined(HAVE_TICK_COUNTER) +/* + * The 32-bit cycle counter on sw_64 overflows pretty quickly, + * unfortunately. A 1GHz machine overflows in 4 seconds. + */ +typedef unsigned int CycleCounterTicks; + +static __inline__ CycleCounterTicks getticks(void) +{ + unsigned long cc; + __asm__ __volatile__ ("rtc %0" : "=r"(cc)); + return (cc & 0xFFFFFFFF); +} + +INLINE_ELAPSED(__inline__) + +#define HAVE_TICK_COUNTER +#endif + /*----------------------------------------------------------------*/ #if defined(__GNUC__) && defined(__alpha__) && !defined(HAVE_TICK_COUNTER) /* @@ -441,6 +461,21 @@ INLINE_ELAPSED(__inline__) #define HAVE_TICK_COUNTER #endif +#if (defined(__DECC) || defined(__DECCXX)) && defined(__sw_64) && defined(HAVE_C_ASM_H) && !defined(HAVE_TICK_COUNTER) +# include +typedef unsigned int CycleCounterTicks; + +static __inline CycleCounterTicks getticks(void) +{ + unsigned long cc; + cc = asm("rtc %v0"); + return (cc & 0xFFFFFFFF); +} + +INLINE_ELAPSED(__inline) + +#define HAVE_TICK_COUNTER +#endif /*----------------------------------------------------------------*/ #if (defined(__DECC) || defined(__DECCXX)) && defined(__alpha) && defined(HAVE_C_ASM_H) && !defined(HAVE_TICK_COUNTER) # include -- 2.33.0