5636aff5b1
- target/i386: csv: Support inject secret for CSV3 guest only if the extension is enabled
- target/i386: csv: Support load kernel hashes for CSV3 guest only if the extension is enabled
- target/i386: csv: Request to set private memory of CSV3 guest if the extension is enabled
- target/i386: kvm: Support to get and enable extensions for Hygon CoCo guest
- qapi/qom,target/i386: csv-guest: Introduce secret-header-file=str and secret-file=str options
- bakcend: VirtCCA:resolve hugepage memory waste issue in vhost-user scenario
- parallels: fix ext_off assertion failure due to overflow
- backends/cryptodev-vhost-user: Fix local_error leaks
- hw/usb/hcd-ehci: Fix debug printf format string
- target/riscv/vector_helper.c: fix 'vmvr_v' memcpy endianess
- target/riscv/vector_helper.c: optimize loops in ldst helpers
- target/riscv/vector_helper.c: set vstart = 0 in GEN_VEXT_VSLIDEUP_VX()
- target/hexagon: don't look for static glib
- virtio-net: Fix network stall at the host side waiting for kick
- Add if condition to avoid assertion failed error in blockdev_init
- target/arm: Use float_status copy in sme_fmopa_s
- target/arm: take HSTR traps of cp15 accesses to EL2, not EL1
- target/arm: Reinstate "vfp" property on AArch32 CPUs
- target/i386/cpu: Fix notes for CPU models
- target/arm: LDAPR should honour SCTLR_ELx.nAA
- target/riscv: Avoid bad shift in riscv_cpu_do_interrupt()
- hvf: remove unused but set variable
- hw/misc/nrf51_rng: Don't use BIT_MASK() when we mean BIT()
- Avoid taking address of out-of-bounds array index
- target/arm: Fix VCMLA Dd, Dn, Dm[idx]
- target/arm: Fix UMOPA/UMOPS of 16-bit values
- target/arm: Fix SVE/SME gross MTE suppression checks
- target/arm: Fix nregs computation in do_{ld,st}_zpa
- crypto: fix error check on gcry_md_open
- Change vmstate_cpuhp_sts vmstateDescription version_id
- hw/pci: Remove unused pci_irq_pulse() method
- hw/intc: Don't clear pending bits on IRQ lowering
- target/arm: Drop user-only special case in sve_stN_r
- migration: Ensure vmstate_save() sets errp
- target/i386: fix hang when using slow path for ptw_setl
- contrib/plugins: add compat for g_memdup2
- hw/audio/hda: fix memory leak on audio setup
- crypto: perform runtime check for hash/hmac support in gcrypt
- target/arm: Fix incorrect aa64_tidcp1 feature check
- target/arm: fix exception syndrome for AArch32 bkpt insn
- target/arm: Don't get MDCR_EL2 in pmu_counter_enabled() before checking ARM_FEATURE_PMU
- linux-user: Print tid not pid with strace
- target/arm: Fix A64 scalar SQSHRN and SQRSHRN
- target/arm: Don't assert for 128-bit tile accesses when SVL is 128
- hw/timer/exynos4210_mct: fix possible int overflow
- target/arm: Avoid shifts by -1 in tszimm_shr() and tszimm_shl()
- hw/audio/virtio-snd: Always use little endian audio format
- target/riscv: Fix vcompress with rvv_ta_all_1s
- usb-hub: Fix handling port power control messages
Signed-off-by: Jiabo Feng <fengjiabo1@huawei.com>
(cherry picked from commit d4a20b24ff377fd07fcbf2b72eecaf07a3ac4cc0)
38 lines
1.7 KiB
Diff
38 lines
1.7 KiB
Diff
From a7209a19e2d730fed5f52fda44aaa24e8de8a81c Mon Sep 17 00:00:00 2001
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From: gubin <gubin_yewu@cmss.chinamobile.com>
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Date: Sat, 11 Jan 2025 10:46:10 +0800
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Subject: [PATCH] target/riscv/vector_helper.c: set vstart = 0 in
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GEN_VEXT_VSLIDEUP_VX()
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cherry-pick from d3646e31ce6d1e02e46e6eabdbc2e637c0cbece7
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The helper isn't setting env->vstart = 0 after its execution, as it is
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expected from every vector instruction that completes successfully.
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Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
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Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
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Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
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Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
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Message-ID: <20240314175704.478276-2-dbarboza@ventanamicro.com>
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Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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Signed-off-by: gubin <gubin_yewu@cmss.chinamobile.com>
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---
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target/riscv/vector_helper.c | 1 +
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1 file changed, 1 insertion(+)
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diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
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index 42ffd3a68a..e69b68ba43 100644
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--- a/target/riscv/vector_helper.c
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+++ b/target/riscv/vector_helper.c
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@@ -4770,6 +4770,7 @@ void HELPER(NAME)(void *vd, void *v0, target_ulong s1, void *vs2, \
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} \
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*((ETYPE *)vd + H(i)) = *((ETYPE *)vs2 + H(i - offset)); \
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} \
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+ env->vstart = 0; \
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/* set tail elements to 1s */ \
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vext_set_elems_1s(vd, vta, vl * esz, total_elems * esz); \
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}
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--
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2.41.0.windows.1
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