- target/i386: csv: Support inject secret for CSV3 guest only if the extension is enabled
- target/i386: csv: Support load kernel hashes for CSV3 guest only if the extension is enabled
- target/i386: csv: Request to set private memory of CSV3 guest if the extension is enabled
- target/i386: kvm: Support to get and enable extensions for Hygon CoCo guest
- qapi/qom,target/i386: csv-guest: Introduce secret-header-file=str and secret-file=str options
- bakcend: VirtCCA:resolve hugepage memory waste issue in vhost-user scenario
- parallels: fix ext_off assertion failure due to overflow
- backends/cryptodev-vhost-user: Fix local_error leaks
- hw/usb/hcd-ehci: Fix debug printf format string
- target/riscv/vector_helper.c: fix 'vmvr_v' memcpy endianess
- target/riscv/vector_helper.c: optimize loops in ldst helpers
- target/riscv/vector_helper.c: set vstart = 0 in GEN_VEXT_VSLIDEUP_VX()
- target/hexagon: don't look for static glib
- virtio-net: Fix network stall at the host side waiting for kick
- Add if condition to avoid assertion failed error in blockdev_init
- target/arm: Use float_status copy in sme_fmopa_s
- target/arm: take HSTR traps of cp15 accesses to EL2, not EL1
- target/arm: Reinstate "vfp" property on AArch32 CPUs
- target/i386/cpu: Fix notes for CPU models
- target/arm: LDAPR should honour SCTLR_ELx.nAA
- target/riscv: Avoid bad shift in riscv_cpu_do_interrupt()
- hvf: remove unused but set variable
- hw/misc/nrf51_rng: Don't use BIT_MASK() when we mean BIT()
- Avoid taking address of out-of-bounds array index
- target/arm: Fix VCMLA Dd, Dn, Dm[idx]
- target/arm: Fix UMOPA/UMOPS of 16-bit values
- target/arm: Fix SVE/SME gross MTE suppression checks
- target/arm: Fix nregs computation in do_{ld,st}_zpa
- crypto: fix error check on gcry_md_open
- Change vmstate_cpuhp_sts vmstateDescription version_id
- hw/pci: Remove unused pci_irq_pulse() method
- hw/intc: Don't clear pending bits on IRQ lowering
- target/arm: Drop user-only special case in sve_stN_r
- migration: Ensure vmstate_save() sets errp
- target/i386: fix hang when using slow path for ptw_setl
- contrib/plugins: add compat for g_memdup2
- hw/audio/hda: fix memory leak on audio setup
- crypto: perform runtime check for hash/hmac support in gcrypt
- target/arm: Fix incorrect aa64_tidcp1 feature check
- target/arm: fix exception syndrome for AArch32 bkpt insn
- target/arm: Don't get MDCR_EL2 in pmu_counter_enabled() before checking ARM_FEATURE_PMU
- linux-user: Print tid not pid with strace
- target/arm: Fix A64 scalar SQSHRN and SQRSHRN
- target/arm: Don't assert for 128-bit tile accesses when SVL is 128
- hw/timer/exynos4210_mct: fix possible int overflow
- target/arm: Avoid shifts by -1 in tszimm_shr() and tszimm_shl()
- hw/audio/virtio-snd: Always use little endian audio format
- target/riscv: Fix vcompress with rvv_ta_all_1s
- usb-hub: Fix handling port power control messages
Signed-off-by: Jiabo Feng <fengjiabo1@huawei.com>
(cherry picked from commit d4a20b24ff377fd07fcbf2b72eecaf07a3ac4cc0)
60 lines
2.5 KiB
Diff
60 lines
2.5 KiB
Diff
From ddb2cb652db80b24ba5ddf0b00dd3ba3f9224eba Mon Sep 17 00:00:00 2001
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From: Pierrick Bouvier <pierrick.bouvier@linaro.org>
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Date: Fri, 25 Oct 2024 10:58:56 -0700
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Subject: [PATCH] target/i386: fix hang when using slow path for ptw_setl
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When instrumenting memory accesses for plugin, we force memory accesses
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to use the slow path for mmu [1]. This create a situation where we end
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up calling ptw_setl_slow. This was fixed recently in [2] but the issue
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still could appear out of plugins use case.
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Since this function gets called during a cpu_exec, start_exclusive then
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hangs. This exclusive section was introduced initially for security
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reasons [3].
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I suspect this code path was never triggered, because ptw_setl_slow
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would always be called transitively from cpu_exec, resulting in a hang.
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[1] https://gitlab.com/qemu-project/qemu/-/commit/6d03226b42247b68ab2f0b3663e0f624335a4055
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[2] https://gitlab.com/qemu-project/qemu/-/commit/115ade42d50144c15b74368d32dc734ea277d853
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[2] https://gitlab.com/qemu-project/qemu/-/commit/9a96406787afcc9960fbe8791892c78311d6971f in 8.2.x series
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[3] https://gitlab.com/qemu-project/qemu/-/issues/279
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Fixes: https://gitlab.com/qemu-project/qemu/-/issues/2566
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Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
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Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
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Message-ID: <20241025175857.2554252-2-pierrick.bouvier@linaro.org>
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Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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(cherry picked from commit 7ba055b49b74c4d2f4a338c5198485bdff373fb1)
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Signed-off-by: zhujun2 <zhujun2_yewu@cmss.chinamobile.com>
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---
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target/i386/tcg/sysemu/excp_helper.c | 5 +++++
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1 file changed, 5 insertions(+)
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diff --git a/target/i386/tcg/sysemu/excp_helper.c b/target/i386/tcg/sysemu/excp_helper.c
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index 5b86f439ad..294dbc50e2 100644
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--- a/target/i386/tcg/sysemu/excp_helper.c
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+++ b/target/i386/tcg/sysemu/excp_helper.c
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@@ -107,6 +107,10 @@ static bool ptw_setl_slow(const PTETranslate *in, uint32_t old, uint32_t new)
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{
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uint32_t cmp;
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+ CPUState *cpu = env_cpu(in->env);
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+ /* We are in cpu_exec, and start_exclusive can't be called directly.*/
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+ g_assert(cpu->running);
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+ cpu_exec_end(cpu);
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/* Does x86 really perform a rmw cycle on mmio for ptw? */
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start_exclusive();
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cmp = cpu_ldl_mmuidx_ra(in->env, in->gaddr, in->ptw_idx, 0);
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@@ -114,6 +118,7 @@ static bool ptw_setl_slow(const PTETranslate *in, uint32_t old, uint32_t new)
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cpu_stl_mmuidx_ra(in->env, in->gaddr, new, in->ptw_idx, 0);
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}
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end_exclusive();
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+ cpu_exec_start(cpu);
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return cmp == old;
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}
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--
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2.41.0.windows.1
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