qemu/target-arm-Change-arm_cpu_mp_affinity-when-enabled-I.patch
Jiabo Feng 9f4fbee689 QEMU update to version 8.2.0-31:
- target/arm: Change arm_cpu_mp_affinity when enabled IPIV feature
- fw_cfg: Don't set callback_opaque NULL in fw_cfg_modify_bytes_read()

Signed-off-by: Jiabo Feng <fengjiabo1@huawei.com>
(cherry picked from commit 519065adc4ba430c349a235e25b346829814f0d9)
2025-05-14 17:13:10 +08:00

71 lines
2.2 KiB
Diff

From 33aa02dc05bed8316b1c64131e8269f404287598 Mon Sep 17 00:00:00 2001
From: Xiang Chen <chenxiang66@hisilicon.com>
Date: Tue, 15 Apr 2025 20:10:50 +0800
Subject: [PATCH] target/arm: Change arm_cpu_mp_affinity when enabled IPIV
feature
virt inclusion
category: feature
bugzilla: https://gitee.com/openeuler/qemu/issues/IC1EV7
---------------------------------------------------------------
Before IPIV feature, it gets mpidr from vcpu id, but after
the feature, we need to know whether IPIV is enabled.
Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com>
---
linux-headers/linux/kvm.h | 2 ++
target/arm/cpu.c | 22 +++++++++++++++++++---
2 files changed, 21 insertions(+), 3 deletions(-)
diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h
index b94c5fd90f..a9d407eace 100644
--- a/linux-headers/linux/kvm.h
+++ b/linux-headers/linux/kvm.h
@@ -1205,6 +1205,8 @@ struct kvm_ppc_resize_hpt {
#define KVM_CAP_SEV_ES_GHCB 500
#define KVM_CAP_HYGON_COCO_EXT 501
+
+#define KVM_CAP_ARM_IPIV_MODE 503
/* support userspace to request firmware to build CSV3 guest's memory space */
#define KVM_CAP_HYGON_COCO_EXT_CSV3_SET_PRIV_MEM (1 << 0)
/* support request to update CSV3 guest's memory region multiple times */
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 09d391bd34..b0f70de018 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -1324,9 +1324,25 @@ static void arm_cpu_dump_state(CPUState *cs, FILE *f, int flags)
uint64_t arm_cpu_mp_affinity(int idx, uint8_t clustersz)
{
- uint32_t Aff1 = idx / clustersz;
- uint32_t Aff0 = idx % clustersz;
- return (Aff1 << ARM_AFF1_SHIFT) | Aff0;
+ uint64_t Aff0 = 0, Aff1 = 0, Aff2 = 0, Aff3 = 0;
+ int mode;
+
+ if (!kvm_enabled()) {
+ Aff1 = idx / clustersz;
+ Aff0 = idx % clustersz;
+ return (Aff1 << ARM_AFF1_SHIFT) | Aff0;
+ }
+
+ mode = kvm_check_extension(kvm_state, KVM_CAP_ARM_IPIV_MODE);
+ if (mode) {
+ Aff1 = idx % 16;
+ Aff2 = idx / 16;
+ } else {
+ Aff1 = idx / clustersz;
+ Aff0 = idx % clustersz;
+ }
+ return (Aff3 << ARM_AFF3_SHIFT) | (Aff2 << ARM_AFF2_SHIFT) |
+ (Aff1 << ARM_AFF1_SHIFT) | Aff0;
}
static void arm_cpu_initfn(Object *obj)
--
2.41.0.windows.1