Chen Qun efdfacd31d target/arm: only set ID_PFR1_EL1.GIC for AArch32 guest
Some AArch64 CPU doesn't support AArch32 mode, and the values of AArch32
registers are all 0.  Hence, We'd better not to modify AArch32 registers
in AArch64 mode.

Signed-off-by: zhanghailiang <zhang.zhanghailiang@huawei.com>
Signed-off-by: Peng Liang <liangpeng10@huawei.com>
Signed-off-by: Dongxu Sun <sundongxu3@huawei.com>
2022-03-19 14:42:31 +08:00
2019-11-06 19:50:55 +08:00
2019-09-30 11:15:46 -04:00
2019-09-30 11:15:46 -04:00
2022-03-19 14:31:23 +08:00
Description
No description provided
401 MiB
Languages
Markdown 100%