dec64939c6
- arm/virt: Fix vcpu hotplug idx_from_topo_ids - Revert patches related to the vSVA - sync some bugfix patches from upstream - add generic vDPA device support Signed-off-by: yezengruan <yezengruan@huawei.com> (cherry picked from commit b99dbfd9847104300672fb4f559f1c2abba8aa33)
91 lines
4.0 KiB
Diff
91 lines
4.0 KiB
Diff
From 1ac38ad4f16bf8fe4cabf1e41036f36ad08cf14f Mon Sep 17 00:00:00 2001
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From: tangbinzy <tangbin_yewu@cmss.chinamobile.com>
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Date: Wed, 23 Nov 2022 15:07:57 +0000
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Subject: [PATCH 14/29] target/arm: Add missing FEAT_TLBIOS instructions
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mainline inclusion
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commit b7469ef92a8034b32031ba22b84fb14046f9770e
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category: bugfix
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------------------------------------------------------------
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Some of the instructions added by the FEAT_TLBIOS extension were forgotten
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when the extension was originally added to QEMU.
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Fixes: 7113d618505b ("target/arm: Add support for FEAT_TLBIOS")
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Signed-off-by: Idan Horowitz <idan.horowitz@gmail.com>
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Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
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Message-id: 20211231103928.1455657-1-idan.horowitz@gmail.com
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Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Signed-off-by: tangbinzy <tangbin_yewu@cmss.chinamobile.com>
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---
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target/arm/helper.c | 32 ++++++++++++++++++++++++++++++++
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1 file changed, 32 insertions(+)
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diff --git a/target/arm/helper.c b/target/arm/helper.c
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index 80737a8d7b..1854c65863 100644
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--- a/target/arm/helper.c
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+++ b/target/arm/helper.c
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@@ -6998,18 +6998,42 @@ static const ARMCPRegInfo tlbios_reginfo[] = {
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.opc0 = 1, .opc1 = 0, .crn = 8, .crm = 1, .opc2 = 0,
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.access = PL1_W, .type = ARM_CP_NO_RAW,
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.writefn = tlbi_aa64_vmalle1is_write },
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+ { .name = "TLBI_VAE1OS", .state = ARM_CP_STATE_AA64,
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+ .opc0 = 1, .opc1 = 0, .crn = 8, .crm = 1, .opc2 = 1,
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+ .access = PL1_W, .type = ARM_CP_NO_RAW,
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+ .writefn = tlbi_aa64_vae1is_write },
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{ .name = "TLBI_ASIDE1OS", .state = ARM_CP_STATE_AA64,
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.opc0 = 1, .opc1 = 0, .crn = 8, .crm = 1, .opc2 = 2,
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.access = PL1_W, .type = ARM_CP_NO_RAW,
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.writefn = tlbi_aa64_vmalle1is_write },
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+ { .name = "TLBI_VAAE1OS", .state = ARM_CP_STATE_AA64,
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+ .opc0 = 1, .opc1 = 0, .crn = 8, .crm = 1, .opc2 = 3,
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+ .access = PL1_W, .type = ARM_CP_NO_RAW,
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+ .writefn = tlbi_aa64_vae1is_write },
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+ { .name = "TLBI_VALE1OS", .state = ARM_CP_STATE_AA64,
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+ .opc0 = 1, .opc1 = 0, .crn = 8, .crm = 1, .opc2 = 5,
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+ .access = PL1_W, .type = ARM_CP_NO_RAW,
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+ .writefn = tlbi_aa64_vae1is_write },
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+ { .name = "TLBI_VAALE1OS", .state = ARM_CP_STATE_AA64,
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+ .opc0 = 1, .opc1 = 0, .crn = 8, .crm = 1, .opc2 = 7,
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+ .access = PL1_W, .type = ARM_CP_NO_RAW,
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+ .writefn = tlbi_aa64_vae1is_write },
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{ .name = "TLBI_ALLE2OS", .state = ARM_CP_STATE_AA64,
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.opc0 = 1, .opc1 = 4, .crn = 8, .crm = 1, .opc2 = 0,
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.access = PL2_W, .type = ARM_CP_NO_RAW,
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.writefn = tlbi_aa64_alle2is_write },
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+ { .name = "TLBI_VAE2OS", .state = ARM_CP_STATE_AA64,
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+ .opc0 = 1, .opc1 = 4, .crn = 8, .crm = 1, .opc2 = 1,
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+ .access = PL2_W, .type = ARM_CP_NO_RAW,
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+ .writefn = tlbi_aa64_vae2is_write },
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{ .name = "TLBI_ALLE1OS", .state = ARM_CP_STATE_AA64,
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.opc0 = 1, .opc1 = 4, .crn = 8, .crm = 1, .opc2 = 4,
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.access = PL2_W, .type = ARM_CP_NO_RAW,
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.writefn = tlbi_aa64_alle1is_write },
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+ { .name = "TLBI_VALE2OS", .state = ARM_CP_STATE_AA64,
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+ .opc0 = 1, .opc1 = 4, .crn = 8, .crm = 1, .opc2 = 5,
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+ .access = PL2_W, .type = ARM_CP_NO_RAW,
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+ .writefn = tlbi_aa64_vae2is_write },
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{ .name = "TLBI_VMALLS12E1OS", .state = ARM_CP_STATE_AA64,
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.opc0 = 1, .opc1 = 4, .crn = 8, .crm = 1, .opc2 = 6,
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.access = PL2_W, .type = ARM_CP_NO_RAW,
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@@ -7030,6 +7054,14 @@ static const ARMCPRegInfo tlbios_reginfo[] = {
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.opc0 = 1, .opc1 = 6, .crn = 8, .crm = 1, .opc2 = 0,
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.access = PL3_W, .type = ARM_CP_NO_RAW,
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.writefn = tlbi_aa64_alle3is_write },
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+ { .name = "TLBI_VAE3OS", .state = ARM_CP_STATE_AA64,
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+ .opc0 = 1, .opc1 = 6, .crn = 8, .crm = 1, .opc2 = 1,
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+ .access = PL3_W, .type = ARM_CP_NO_RAW,
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+ .writefn = tlbi_aa64_vae3is_write },
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+ { .name = "TLBI_VALE3OS", .state = ARM_CP_STATE_AA64,
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+ .opc0 = 1, .opc1 = 6, .crn = 8, .crm = 1, .opc2 = 5,
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+ .access = PL3_W, .type = ARM_CP_NO_RAW,
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+ .writefn = tlbi_aa64_vae3is_write },
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REGINFO_SENTINEL
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};
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--
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2.27.0
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