b391c6d2f4
if vcpu support smt, create new smt hierarchy according to Processor Properties Topology Table(PPTT) in acpi spec 6.3. Threads sharing a core must be grouped under a unique Processor hierarchy node structure for each group of threads Signed-off-by: Henglong Fan <fanhenglong@huawei.com>
105 lines
3.9 KiB
Diff
105 lines
3.9 KiB
Diff
From af8740502815be450709e88df44ad322da2b071f Mon Sep 17 00:00:00 2001
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From: Henglong Fan <fanhenglong@huawei.com>
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Date: Tue, 18 Aug 2020 21:42:33 +0800
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Subject: [PATCH] build smt processor structure to support smt topology
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if vcpu support smt, create new smt hierarchy according to
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Processor Properties Topology Table(PPTT) in acpi spec 6.3.
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Threads sharing a core must be grouped under a unique Processor
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hierarchy node structure for each group of threads
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Signed-off-by: Henglong Fan <fanhenglong@huawei.com>
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---
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hw/acpi/aml-build.c | 40 ++++++++++++++++++++++++++++++++--------
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1 file changed, 32 insertions(+), 8 deletions(-)
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diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
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index 74e95005..8a3b51c8 100644
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--- a/hw/acpi/aml-build.c
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+++ b/hw/acpi/aml-build.c
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@@ -53,7 +53,7 @@ static void build_append_array(GArray *array, GArray *val)
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}
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/*
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- * ACPI 6.2 Processor Properties Topology Table (PPTT)
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+ * ACPI 6.3 Processor Properties Topology Table (PPTT)
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*/
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#ifdef __aarch64__
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static void build_cache_head(GArray *tbl, uint32_t next_level)
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@@ -126,7 +126,7 @@ static void build_arm_socket_hierarchy(GArray *tbl,
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build_append_int_noprefix(tbl, offset, 4);
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}
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-static void build_arm_cpu_hierarchy(GArray *tbl,
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+static void build_arm_core_hierarchy(GArray *tbl,
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struct offset_status *offset, uint32_t id)
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{
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if (!offset) {
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@@ -144,18 +144,35 @@ static void build_arm_cpu_hierarchy(GArray *tbl,
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build_append_int_noprefix(tbl, offset->l2_offset, 4);
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}
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+static void build_arm_smt_hierarchy(GArray *tbl,
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+ uint32_t offset, uint32_t id)
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+{
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+ if (!offset) {
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+ return;
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+ }
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+ build_append_byte(tbl, 0); /* Type 0 - processor */
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+ build_append_byte(tbl, 20); /* Length, add private resources */
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+ build_append_int_noprefix(tbl, 0, 2); /* Reserved */
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+ build_append_int_noprefix(tbl, 14, 4); /* Valid id*/
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+ build_append_int_noprefix(tbl, offset, 4);
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+ build_append_int_noprefix(tbl, id, 4);
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+ build_append_int_noprefix(tbl, 0, 4); /* Num private resources */
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+}
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+
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void build_pptt(GArray *table_data, BIOSLinker *linker, int possible_cpus)
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{
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int pptt_start = table_data->len;
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- int uid = 0, cpus = 0, socket;
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+ int uid = 0, socket;
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+ uint32_t core_offset;
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struct offset_status offset;
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const MachineState *ms = MACHINE(qdev_get_machine());
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unsigned int smp_cores = ms->smp.cores;
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+ unsigned int smp_sockets = ms->smp.cpus / (smp_cores * ms->smp.threads);
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acpi_data_push(table_data, sizeof(AcpiTableHeader));
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- for (socket = 0; cpus < possible_cpus; socket++) {
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- int core;
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+ for (socket = 0; socket < smp_sockets; socket++) {
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+ int core,thread;
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uint32_t l3_offset = table_data->len - pptt_start;
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build_cache_hierarchy(table_data, 0, ARM_L3_CACHE);
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@@ -169,14 +186,21 @@ void build_pptt(GArray *table_data, BIOSLinker *linker, int possible_cpus)
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build_cache_hierarchy(table_data, offset.l2_offset, ARM_L1D_CACHE);
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offset.l1i_offset = table_data->len - pptt_start;
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build_cache_hierarchy(table_data, offset.l2_offset, ARM_L1I_CACHE);
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- build_arm_cpu_hierarchy(table_data, &offset, uid++);
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- cpus++;
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+ core_offset = table_data->len - pptt_start;
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+ if (ms->smp.threads <= 1) {
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+ build_arm_core_hierarchy(table_data, &offset, uid++);
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+ } else {
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+ build_arm_core_hierarchy(table_data, &offset, core);
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+ for (thread = 0; thread < ms->smp.threads; thread++) {
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+ build_arm_smt_hierarchy(table_data, core_offset, uid++);
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+ }
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+ }
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}
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}
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build_header(linker, table_data,
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(void *)(table_data->data + pptt_start), "PPTT",
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- table_data->len - pptt_start, 1, NULL, NULL);
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+ table_data->len - pptt_start, 2, NULL, NULL);
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}
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#else
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--
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2.23.0
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