7428290d4a
- fix compile error on loongarch
- hw/loongarch: fix cpu hotplug reset
- hw/loongarch/boot: Use warn_report when no kernel filename
- hw/loongarch: clean code
- hw/loongarch: Add KVM pch msi device support
- hw/loongarch: Add KVM pch pic device support
- hw/loongarch: Add KVM extioi device support
- hw/loongarch: Add KVM IPI device support
- hw/loongarch/virt: Update the ACPI table for hotplug cpu
- hw/loongarch/virt: Add basic CPU plug support
- hw/loongarch/virt: Add CPU topology support
- accel/kvm/kvm-all: Fixes the missing break in vCPU unpark logic
- gdbstub: Add helper function to unregister GDB register space
- physmem: Add helper function to destroy CPU AddressSpace
- hw/acpi: Update CPUs AML with cpu-(ctrl)dev change
- hw/acpi: Update ACPI GED framework to support vCPU Hotplug
- hw/acpi: Move CPU ctrl-dev MMIO region len macro to common header file
- accel/kvm: Extract common KVM vCPU {creation,parking} code
- target/loongarch: Add steal time support on migration
- linux-headers: loongarch: Add kvm_para.h and unistd_64.h
- target/loongarch/kvm: Implement LoongArch PMU extension
- target/loongarch: Implement lbt registers save/restore function
- target/loongarch: Add loongson binary translation feature
- sync loongarch linux-headers
- target/loongarch: Avoid bits shift exceeding width of bool type
- target/loongarch: Use explicit little-endian LD/ST API
- target/loongarch: fix -Werror=maybe-uninitialized false-positive
- target/loongarch: Support QMP dump-guest-memory
- target/loongarch/kvm: Add vCPU reset function
- target/loongarch: Add compatible support about VM reboot
- target/loongarch: Fix cpu_reset set wrong CSR_CRMD
- target/loongarch: Set CSR_PRCFG1 and CSR_PRCFG2 values
- target/loongarch: Remove avail_64 in trans_srai_w() and simplify it
- target/loongarch/kvm: Add software breakpoint support
- target/loongarch: Add loongarch vector property unconditionally
- target/loongarch/kvm: Fix VM recovery from disk failures
- target/loongarch: Put cpucfg operation before CSR register
- target/loongarch: Add TCG macro in structure CPUArchState
- hw/arm/virt-acpi-build.c: Migrate SPCR creation to common location
- hw/loongarch/virt: Add FDT table support with acpi ged pm register
- hw/loongarch/virt: Add description for virt machine type
- hw/loongarch: Add acpi SPCR table support
- hw/loongarch: virt: pass random seed to fdt
- hw/loongarch: virt: support up to 4 serial ports
- hw/loongarch: Remove default enable with VIRTIO_VGA device
- hw/loongarch: Fix length for lowram in ACPI SRAT
- hw/loongarch/virt: Remove unused assignment
- hw/loongarch: Change the tpm support by default
- hw/loongarch/boot.c: fix out-of-bound reading
- hw/loongarch/virt: Use MemTxAttrs interface for misc ops
- tests/libqos: Add loongarch virt machine node
- hw/loongarch: Remove minimum and default memory size
- hw/loongarch: Refine system dram memory region
- hw/loongarch: Refine fwcfg memory map
- hw/loongarch: Refine fadt memory table for numa memory
- hw/loongarch: Refine acpi srat table for numa memory
- hw/loongarch: Add VM mode in IOCSR feature register in kvm mode
- hw/loongarch: Refine default numa id calculation
- hw/loongarch: Rename LoongArchMachineState with LoongArchVirtMachineState
- hw/loongarch: Rename LOONGARCH_MACHINE with LOONGARCH_VIRT_MACHINE
- hw/loongarch: move memory map to boot.c
- loongarch: switch boards to "default y"
- hw/loongarch: Add cells missing from rtc node
- hw/loongarch: Add cells missing from uart node
- hw/loongarch: fdt remove unused irqchip node
- hw/loongarch: fdt adds pcie irq_map node
- hw/loongarch: fdt adds pch_msi Controller
- hw/loongarch: fdt adds pch_pic Controller
- hw/loongarch: fdt adds Extend I/O Interrupt Controller
- hw/loongarch: fdt adds cpu interrupt controller node
- hw/loongarch: Init efi_fdt table
- hw/loongarch: Init efi_initrd table
- hw/loongarch: Init efi_boot_memmap table
- hw/loongarch: Init efi_system_table
- hw/loongarch: Add init_cmdline
- hw/loongarch: Add slave cpu boot_code
- hw/loongarch: Add load initrd
- hw/loongarch: Move boot functions to boot.c
Signed-off-by: Xianglai Li <lixianglai@loongson.cn>
(cherry picked from commit 04ca9e6c8ff19630116722240ae0136cea831c5c)
78 lines
2.8 KiB
Diff
78 lines
2.8 KiB
Diff
From b63b7b0b6c9bed8e1a316f3838aab7db2e8f2037 Mon Sep 17 00:00:00 2001
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From: Song Gao <gaosong@loongson.cn>
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Date: Tue, 28 May 2024 16:38:54 +0800
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Subject: [PATCH 29/78] hw/loongarch/virt: Use MemTxAttrs interface for misc
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ops
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Use MemTxAttrs interface read_with_attrs/write_with_attrs
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for virt_iocsr_misc_ops.
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Signed-off-by: Song Gao <gaosong@loongson.cn>
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Reviewed-by: Bibo Mao <maobibo@loongson.cn>
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Message-Id: <20240528083855.1912757-3-gaosong@loongson.cn>
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Signed-off-by: Xianglai Li <lixianglai@loongson.cn>
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---
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hw/loongarch/virt.c | 18 ++++++++++--------
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1 file changed, 10 insertions(+), 8 deletions(-)
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diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
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index f7874bccf9..12816c6023 100644
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--- a/hw/loongarch/virt.c
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+++ b/hw/loongarch/virt.c
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@@ -915,8 +915,8 @@ static void virt_firmware_init(LoongArchVirtMachineState *lvms)
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}
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-static MemTxResult loongarch_qemu_write(void *opaque, hwaddr addr, uint64_t val,
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- unsigned size, MemTxAttrs attrs)
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+static MemTxResult virt_iocsr_misc_write(void *opaque, hwaddr addr, uint64_t val,
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+ unsigned size, MemTxAttrs attrs)
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{
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LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(opaque);
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uint64_t features;
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@@ -945,9 +945,9 @@ static MemTxResult loongarch_qemu_write(void *opaque, hwaddr addr, uint64_t val,
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return MEMTX_OK;
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}
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-static MemTxResult loongarch_qemu_read(void *opaque, hwaddr addr,
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- uint64_t *data,
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- unsigned size, MemTxAttrs attrs)
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+static MemTxResult virt_iocsr_misc_read(void *opaque, hwaddr addr,
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+ uint64_t *data,
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+ unsigned size, MemTxAttrs attrs)
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{
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LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(opaque);
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uint64_t ret = 0;
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@@ -962,7 +962,7 @@ static MemTxResult loongarch_qemu_read(void *opaque, hwaddr addr,
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if (kvm_enabled()) {
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ret |= BIT(IOCSRF_VM);
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}
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- return ret;
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+ break;
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case VENDOR_REG:
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ret = 0x6e6f73676e6f6f4cULL; /* "Loongson" */
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break;
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@@ -986,6 +986,8 @@ static MemTxResult loongarch_qemu_read(void *opaque, hwaddr addr,
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ret |= BIT_ULL(IOCSRM_EXTIOI_INT_ENCODE);
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}
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break;
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+ default:
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+ g_assert_not_reached();
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}
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*data = ret;
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@@ -993,8 +995,8 @@ static MemTxResult loongarch_qemu_read(void *opaque, hwaddr addr,
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}
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static const MemoryRegionOps virt_iocsr_misc_ops = {
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- .read_with_attrs = loongarch_qemu_read,
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- .write_with_attrs = loongarch_qemu_write,
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+ .read_with_attrs = virt_iocsr_misc_read,
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+ .write_with_attrs = virt_iocsr_misc_write,
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.endianness = DEVICE_LITTLE_ENDIAN,
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.valid = {
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.min_access_size = 4,
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--
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2.39.1
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