c4dab45526
- qga/win32: Use rundll for VSS installation - qga/win32: Remove change action from MSI installer - ide: Increment BB in-flight counter for TRIM BH - hw/pci-bridge/pxb: Fix missing swizzle - host-vdpa: make notifiers _init()/_uninit() symmetric - hw/virtio: vdpa: Fix leak of host-notifier memory-region - accel/tcg/cpu-exec: Fix precise single-stepping after interrupt - Allow setting up to 8 bytes with the generic loader - hw/net/virtio-net: make some VirtIONet const - accel/tcg: Optimize jump cache flush during tlb range flush - 9pfs: prevent opening special files (CVE-2023-2861) - tcg: Reduce tcg_assert_listed_vecop() scope - gitlab: Disable plugins for cross-i386-tci - vfio/pci: Fix a segfault in vfio_realize - block/iscsi: fix double-free on BUSY or similar statuses - tests/tcg: fix unused variable in linux-test - hw/net/vmxnet3: allow VMXNET3_MAX_MTU itself as a value - qga/vss-win32: fix warning for clang++-15 - vnc: avoid underflow when accessing user-provided address - block/monitor: Fix crash when executing HMP commit - virtio-gpu: add a FIXME for virtio_gpu_load() - hw/ppc/Kconfig: MAC_NEWWORLD should always select USB_OHCI_PCI - migration: report compress thread pid to libvirt Signed-off-by: Jiabo Feng <fengjiabo1@huawei.com>
50 lines
1.7 KiB
Diff
50 lines
1.7 KiB
Diff
From 28ca488c585c556ce04419f927d13d46771e1ea4 Mon Sep 17 00:00:00 2001
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From: tangbinzy <tangbin_yewu@cmss.chinamobile.com>
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Date: Tue, 18 Jul 2023 06:29:51 +0000
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Subject: [PATCH] accel/tcg: Optimize jump cache flush during tlb range flush
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mainline inclusion commit cfc2a2d69d59f02b32df3098ce17e10ab86d43c6 category:
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bugfix
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---------------------------------------------------------------
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When the length of the range is large enough, clearing the whole cache is
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faster than iterating over the (possibly extremely large) set of pages
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contained in the range.
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This mimics the pre-existing similar optimization done on the flush of the
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tlb itself.
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Signed-off-by: Idan Horowitz <idan.horowitz@gmail.com>
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Message-Id: <20220110164754.1066025-1-idan.horowitz@gmail.com>
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Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
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Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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Signed-off-by: tangbinzy <tangbin_yewu@cmss.chinamobile.com>
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---
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accel/tcg/cputlb.c | 9 +++++++++
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1 file changed, 9 insertions(+)
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diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
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index b69a953447..03526fa1ab 100644
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--- a/accel/tcg/cputlb.c
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+++ b/accel/tcg/cputlb.c
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@@ -783,6 +783,15 @@ static void tlb_flush_range_by_mmuidx_async_0(CPUState *cpu,
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}
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qemu_spin_unlock(&env_tlb(env)->c.lock);
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+ /*
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+ * If the length is larger than the jump cache size, then it will take
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+ * longer to clear each entry individually than it will to clear it all.
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+ */
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+ if (d.len >= (TARGET_PAGE_SIZE * TB_JMP_CACHE_SIZE)) {
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+ cpu_tb_jmp_cache_clear(cpu);
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+ return;
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+ }
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+
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for (target_ulong i = 0; i < d.len; i += TARGET_PAGE_SIZE) {
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tb_flush_jmp_cache(cpu, d.addr + i);
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}
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--
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2.41.0.windows.1
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