- vdpa-dev: Fix initialisation order to restore VDUSE compatibility - tcg: Allow top bit of SIMD_DATA_BITS to be set in simd_desc() - migration: fix-possible-int-overflow - target/m68k: Map FPU exceptions to FPSR register - qemu-options: Fix CXL Fixed Memory Window interleave-granularity typo - hvf: arm: Fix encodings for ID_AA64PFR1_EL1 and debug System registers - hw/intc/arm_gic: Fix handling of NS view of GICC_APR<n> - qio: Inherit follow_coroutine_ctx across TLS - target/riscv: Fix the element agnostic function problem - accel/tcg: Fix typo causing tb->page_addr[1] to not be recorded - tcg/loongarch64: Fix tcg_out_movi vs some pcrel pointers - migration: Fix file migration with fdset - ui/vnc: don't return an empty SASL mechlist to the client - target/arm: Fix FJCVTZS vs flush-to-zero - hw/ppc/e500: Prefer QOM cast - sphinx/qapidoc: Fix to generate doc for explicit, unboxed arguments - hw/ppc/e500: Remove unused "irqs" parameter - hw/ppc/e500: Add missing device tree properties to i2c controller node - hw/i386/amd_iommu: Don't leak memory in amdvi_update_iotlb() - hw/arm/mps2-tz.c: fix RX/TX interrupts order - target/i386: csv: Add support to migrate the incoming context for CSV3 guest - target/i386: csv: Add support to migrate the outgoing context for CSV3 guest - target/i386: csv: Add support to migrate the incoming page for CSV3 guest - target/i386: csv: Add support to migrate the outgoing page for CSV3 guest - linux-headers: update kernel headers to include CSV3 migration cmds - vfio: Only map shared region for CSV3 virtual machine - vga: Force full update for CSV3 guest - target/i386: csv: Load initial image to private memory for CSV3 guest - target/i386: csv: Do not register/unregister guest secure memory for CSV3 guest - target/i386: cpu: Populate CPUID 0x8000_001F when CSV3 is active - target/i386: csv: Add command to load vmcb to CSV3 guest memory - target/i386: csv: Add command to load data to CSV3 guest memory - target/i386: csv: Add command to initialize CSV3 context - target/i386: csv: Add CSV3 context - next-kbd: convert to use qemu_input_handler_register() - qemu/bswap: Undefine CPU_CONVERT() once done - exec/memop: Remove unused memop_big_endian() helper - hw/nvme: fix handling of over-committed queues - 9pfs: fix crash on 'Treaddir' request - hw/misc/psp: Pin the hugepage memory specified by mem2 during use for psp - hw/misc: support tkm use mem2 memory - hw/i386: add mem2 option for qemu - kvm: add support for guest physical bits - target/i386: add guest-phys-bits cpu property Signed-off-by: Jiabo Feng <fengjiabo1@huawei.com> (cherry picked from commit f45f35e88509a4ffa9f62332ee9601e9fe1f8d09)
53 lines
2.1 KiB
Diff
53 lines
2.1 KiB
Diff
From 378d79fa6b9410af702776ffa93865219f273380 Mon Sep 17 00:00:00 2001
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From: Anton Johansson <anjo@rev.ng>
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Date: Wed, 12 Jun 2024 15:30:31 +0200
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Subject: [PATCH] accel/tcg: Fix typo causing tb->page_addr[1] to not be
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recorded
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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For TBs crossing page boundaries, the 2nd page will never be
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recorded/removed, as the index of the 2nd page is computed from the
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address of the 1st page. This is due to a typo, fix it.
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Cc: qemu-stable@nongnu.org
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Fixes: deba78709a ("accel/tcg: Always lock pages before translation")
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Signed-off-by: Anton Johansson <anjo@rev.ng>
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Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
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Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
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Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
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Message-Id: <20240612133031.15298-1-anjo@rev.ng>
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Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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(cherry picked from commit 3b279f73fa37bec8d3ba04a15f5153d6491cffaf)
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Signed-off-by: zhujun2 <zhujun2_yewu@cmss.chinamobile.com>
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---
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accel/tcg/tb-maint.c | 4 ++--
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1 file changed, 2 insertions(+), 2 deletions(-)
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diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c
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index 3d2a896220..eb37f9e8a8 100644
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--- a/accel/tcg/tb-maint.c
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+++ b/accel/tcg/tb-maint.c
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@@ -712,7 +712,7 @@ static void tb_record(TranslationBlock *tb)
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tb_page_addr_t paddr0 = tb_page_addr0(tb);
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tb_page_addr_t paddr1 = tb_page_addr1(tb);
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tb_page_addr_t pindex0 = paddr0 >> TARGET_PAGE_BITS;
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- tb_page_addr_t pindex1 = paddr0 >> TARGET_PAGE_BITS;
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+ tb_page_addr_t pindex1 = paddr1 >> TARGET_PAGE_BITS;
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assert(paddr0 != -1);
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if (unlikely(paddr1 != -1) && pindex0 != pindex1) {
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@@ -744,7 +744,7 @@ static void tb_remove(TranslationBlock *tb)
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tb_page_addr_t paddr0 = tb_page_addr0(tb);
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tb_page_addr_t paddr1 = tb_page_addr1(tb);
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tb_page_addr_t pindex0 = paddr0 >> TARGET_PAGE_BITS;
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- tb_page_addr_t pindex1 = paddr0 >> TARGET_PAGE_BITS;
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+ tb_page_addr_t pindex1 = paddr1 >> TARGET_PAGE_BITS;
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assert(paddr0 != -1);
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if (unlikely(paddr1 != -1) && pindex0 != pindex1) {
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--
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2.41.0.windows.1
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