qemu/smmuv3-Change-arm-smmuv3-nested-name-to-arm-smmuv3-a.patch

From 2697e7418c1e0d87c82feca33800e3a093546a90 Mon Sep 17 00:00:00 2001
From: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
Date: Thu, 16 Jan 2025 15:20:18 +0000
Subject: [PATCH] smmuv3: Change arm-smmuv3-nested name to arm-smmuv3-accel

This is based on feedback received for RFC v1.

Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
---
 hw/arm/smmuv3.c          | 38 +++++++++++++++++++-------------------
 hw/arm/virt-acpi-build.c | 16 ++++++++--------
 hw/arm/virt.c            | 24 ++++++++++++------------
 hw/core/sysbus-fdt.c     |  2 +-
 include/hw/arm/smmuv3.h  |  8 ++++----
 include/hw/arm/virt.h    | 10 +++++-----
 6 files changed, 49 insertions(+), 49 deletions(-)

diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
index 6964ab000d..ecdad6bda4 100644
--- a/hw/arm/smmuv3.c
+++ b/hw/arm/smmuv3.c
@@ -2253,14 +2253,14 @@ static void smmu_realize(DeviceState *d, Error **errp)
     smmu_init_irq(s, dev);
 }
 
-static int smmuv3_nested_pci_host_bridge(Object *obj, void *opaque)
+static int smmuv3_accel_pci_host_bridge(Object *obj, void *opaque)
 {
     DeviceState *d = opaque;
-    SMMUv3NestedState *s_nested = ARM_SMMUV3_NESTED(d);
+    SMMUv3AccelState *s_accel = ARM_SMMUV3_ACCEL(d);
 
     if (object_dynamic_cast(obj, TYPE_PCI_HOST_BRIDGE)) {
         PCIBus *bus = PCI_HOST_BRIDGE(obj)->bus;
-        if (s_nested->pci_bus && !strcmp(bus->qbus.name, s_nested->pci_bus)) {
+        if (s_accel->pci_bus && !strcmp(bus->qbus.name, s_accel->pci_bus)) {
             object_property_set_link(OBJECT(d), "primary-bus", OBJECT(bus),
                                      &error_abort);
         }
@@ -2268,15 +2268,15 @@ static int smmuv3_nested_pci_host_bridge(Object *obj, void *opaque)
     return 0;
 }
 
-static void smmu_nested_realize(DeviceState *d, Error **errp)
+static void smmu_accel_realize(DeviceState *d, Error **errp)
 {
-    SMMUv3NestedState *s_nested = ARM_SMMUV3_NESTED(d);
-    SMMUv3NestedClass *c = ARM_SMMUV3_NESTED_GET_CLASS(s_nested);
+    SMMUv3AccelState *s_nested = ARM_SMMUV3_ACCEL(d);
+    SMMUv3AccelClass *c = ARM_SMMUV3_ACCEL_GET_CLASS(s_nested);
     SysBusDevice *dev = SYS_BUS_DEVICE(d);
     Error *local_err = NULL;
 
     object_child_foreach_recursive(object_get_root(),
-                                   smmuv3_nested_pci_host_bridge, d);
+                                   smmuv3_accel_pci_host_bridge, d);
     object_property_set_bool(OBJECT(dev), "nested", true, &error_abort);
 
     c->parent_realize(d, &local_err);
@@ -2365,8 +2365,8 @@ static Property smmuv3_properties[] = {
     DEFINE_PROP_END_OF_LIST()
 };
 
-static Property smmuv3_nested_properties[] = {
-    DEFINE_PROP_STRING("pci-bus", SMMUv3NestedState, pci_bus),
+static Property smmuv3_accel_properties[] = {
+    DEFINE_PROP_STRING("pci-bus", SMMUv3AccelState, pci_bus),
     DEFINE_PROP_END_OF_LIST()
 };
 
@@ -2389,15 +2389,15 @@ static void smmuv3_class_init(ObjectClass *klass, void *data)
     device_class_set_props(dc, smmuv3_properties);
 }
 
-static void smmuv3_nested_class_init(ObjectClass *klass, void *data)
+static void smmuv3_accel_class_init(ObjectClass *klass, void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(klass);
-    SMMUv3NestedClass *c = ARM_SMMUV3_NESTED_CLASS(klass);
+    SMMUv3AccelClass *c = ARM_SMMUV3_ACCEL_CLASS(klass);
 
     dc->vmsd = &vmstate_smmuv3;
-    device_class_set_parent_realize(dc, smmu_nested_realize,
+    device_class_set_parent_realize(dc, smmu_accel_realize,
                                     &c->parent_realize);
-    device_class_set_props(dc, smmuv3_nested_properties);
+    device_class_set_props(dc, smmuv3_accel_properties);
     dc->user_creatable = true;
     dc->hotpluggable = false;
 }
@@ -2440,12 +2440,12 @@ static void smmuv3_iommu_memory_region_class_init(ObjectClass *klass,
     imrc->notify_flag_changed = smmuv3_notify_flag_changed;
 }
 
-static const TypeInfo smmuv3_nested_type_info = {
-    .name          = TYPE_ARM_SMMUV3_NESTED,
+static const TypeInfo smmuv3_accel_type_info = {
+    .name          = TYPE_ARM_SMMUV3_ACCEL,
     .parent        = TYPE_ARM_SMMUV3,
-    .instance_size = sizeof(SMMUv3NestedState),
-    .class_size    = sizeof(SMMUv3NestedClass),
-    .class_init    = smmuv3_nested_class_init,
+    .instance_size = sizeof(SMMUv3AccelState),
+    .class_size    = sizeof(SMMUv3AccelClass),
+    .class_init    = smmuv3_accel_class_init,
 };
 
 static const TypeInfo smmuv3_type_info = {
@@ -2466,7 +2466,7 @@ static const TypeInfo smmuv3_iommu_memory_region_info = {
 static void smmuv3_register_types(void)
 {
     type_register(&smmuv3_type_info);
-    type_register(&smmuv3_nested_type_info);
+    type_register(&smmuv3_accel_type_info);
     type_register(&smmuv3_iommu_memory_region_info);
 }
 
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index ad0f79e03d..db635120f9 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -418,10 +418,10 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap,
     };
 
     /*
-     * Nested SMMU requires RMRs for MSI 1-1 mapping, which
+     * Accel SMMU requires RMRs for MSI 1-1 mapping, which
      * require _DSM for PreservingPCI Boot Configurations
      */
-    if (vms->iommu == VIRT_IOMMU_SMMUV3_NESTED) {
+    if (vms->iommu == VIRT_IOMMU_SMMUV3_ACCEL) {
         cfg.preserve_config = true;
     }
 
@@ -619,10 +619,10 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
     /* Table 2 The IORT */
     acpi_table_begin(&table, table_data);
 
-    if (vms->smmu_nested_count) {
-        irq = vms->irqmap[VIRT_SMMU_NESTED] + ARM_SPI_BASE;
-        base = vms->memmap[VIRT_SMMU_NESTED].base;
-        num_smmus = vms->smmu_nested_count;
+    if (vms->smmu_accel_count) {
+        irq = vms->irqmap[VIRT_SMMU_ACCEL] + ARM_SPI_BASE;
+        base = vms->memmap[VIRT_SMMU_ACCEL].base;
+        num_smmus = vms->smmu_accel_count;
     } else if (virt_has_smmuv3(vms)) {
         irq = vms->irqmap[VIRT_SMMU] + ARM_SPI_BASE;
         base = vms->memmap[VIRT_SMMU].base;
@@ -655,7 +655,7 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
             }
 
             next_range.input_base = idmap->input_base + idmap->id_count;
-            if (vms->iommu == VIRT_IOMMU_SMMUV3_NESTED) {
+            if (vms->iommu == VIRT_IOMMU_SMMUV3_ACCEL) {
                 nb_nodes++; /* RMR node per SMMU */
             }
         }
@@ -775,7 +775,7 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
         build_iort_id_mapping(table_data, 0, 0x10000, IORT_NODE_OFFSET, 0);
     }
 
-    if (vms->iommu == VIRT_IOMMU_SMMUV3_NESTED) {
+    if (vms->iommu == VIRT_IOMMU_SMMUV3_ACCEL) {
         build_iort_rmr_nodes(table_data, smmu_idmaps, smmu_offset, &id);
     }
 
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index a55f297af2..57d00acd48 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -166,7 +166,7 @@ static const MemMapEntry base_memmap[] = {
     /* In the virtCCA scenario, this space is used for MSI interrupt mapping */
     [VIRT_CVM_MSI] =            { 0x0a001000, 0x00fff000 },
     [VIRT_CPUFREQ] =            { 0x0b000000, 0x00010000 },
-    [VIRT_SMMU_NESTED] =        { 0x0b010000, 0x00ff0000},
+    [VIRT_SMMU_ACCEL] =        { 0x0b010000, 0x00ff0000},
     /* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each of that size */
     [VIRT_PLATFORM_BUS] =       { 0x0c000000, 0x02000000 },
     [VIRT_SECURE_MEM] =         { 0x0e000000, 0x01000000 },
@@ -212,7 +212,7 @@ static const int a15irqmap[] = {
     [VIRT_GIC_V2M] = 48, /* ...to 48 + NUM_GICV2M_SPIS - 1 */
     [VIRT_SMMU] = 74,    /* ...to 74 + NUM_SMMU_IRQS - 1 */
     [VIRT_PLATFORM_BUS] = 112, /* ...to 112 + PLATFORM_BUS_NUM_IRQS -1 */
-    [VIRT_SMMU_NESTED] = 200,
+    [VIRT_SMMU_ACCEL] = 200,
 };
 
 static const char *valid_cpus[] = {
@@ -3619,27 +3619,27 @@ static void virt_machine_device_plug_cb(HotplugHandler *hotplug_dev,
 
     /* For smmuv3-nested devices we need to set the mem & irq */
     if (device_is_dynamic_sysbus(mc, dev) &&
-        object_dynamic_cast(OBJECT(dev), TYPE_ARM_SMMUV3_NESTED)) {
-        hwaddr base = vms->memmap[VIRT_SMMU_NESTED].base;
-        int irq =  vms->irqmap[VIRT_SMMU_NESTED];
+        object_dynamic_cast(OBJECT(dev), TYPE_ARM_SMMUV3_ACCEL)) {
+        hwaddr base = vms->memmap[VIRT_SMMU_ACCEL].base;
+        int irq =  vms->irqmap[VIRT_SMMU_ACCEL];
 
-        if (vms->smmu_nested_count >= MAX_SMMU_NESTED) {
+        if (vms->smmu_accel_count >= MAX_SMMU_ACCEL) {
             error_setg(errp, "smmuv3-nested max count reached!");
             return;
         }
 
-        base += (vms->smmu_nested_count * SMMU_IO_LEN);
-        irq += (vms->smmu_nested_count * NUM_SMMU_IRQS);
+        base += (vms->smmu_accel_count * SMMU_IO_LEN);
+        irq += (vms->smmu_accel_count * NUM_SMMU_IRQS);
 
         sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
         for (int i = 0; i < 4; i++) {
             sysbus_connect_irq(SYS_BUS_DEVICE(dev), i,
                                qdev_get_gpio_in(vms->gic, irq + i));
         }
-        if (vms->iommu != VIRT_IOMMU_SMMUV3_NESTED) {
-            vms->iommu = VIRT_IOMMU_SMMUV3_NESTED;
+        if (vms->iommu != VIRT_IOMMU_SMMUV3_ACCEL) {
+            vms->iommu = VIRT_IOMMU_SMMUV3_ACCEL;
         }
-        vms->smmu_nested_count++;
+        vms->smmu_accel_count++;
     }
 
     if (vms->platform_bus_dev) {
@@ -3815,7 +3815,7 @@ static void virt_machine_class_init(ObjectClass *oc, void *data)
     machine_class_allow_dynamic_sysbus_dev(mc, TYPE_VFIO_AMD_XGBE);
     machine_class_allow_dynamic_sysbus_dev(mc, TYPE_RAMFB_DEVICE);
     machine_class_allow_dynamic_sysbus_dev(mc, TYPE_VFIO_PLATFORM);
-    machine_class_allow_dynamic_sysbus_dev(mc, TYPE_ARM_SMMUV3_NESTED);
+    machine_class_allow_dynamic_sysbus_dev(mc, TYPE_ARM_SMMUV3_ACCEL);
 #ifdef CONFIG_TPM
     machine_class_allow_dynamic_sysbus_dev(mc, TYPE_TPM_TIS_SYSBUS);
 #endif
diff --git a/hw/core/sysbus-fdt.c b/hw/core/sysbus-fdt.c
index 0f0d0b3e58..58f4dc614c 100644
--- a/hw/core/sysbus-fdt.c
+++ b/hw/core/sysbus-fdt.c
@@ -489,7 +489,7 @@ static const BindingEntry bindings[] = {
 #ifdef CONFIG_LINUX
     TYPE_BINDING(TYPE_VFIO_CALXEDA_XGMAC, add_calxeda_midway_xgmac_fdt_node),
     TYPE_BINDING(TYPE_VFIO_AMD_XGBE, add_amd_xgbe_fdt_node),
-    TYPE_BINDING("arm-smmuv3-nested", no_fdt_node),
+    TYPE_BINDING("arm-smmuv3-accel", no_fdt_node),
     VFIO_PLATFORM_BINDING("amd,xgbe-seattle-v1a", add_amd_xgbe_fdt_node),
 #endif
 #ifdef CONFIG_TPM
diff --git a/include/hw/arm/smmuv3.h b/include/hw/arm/smmuv3.h
index 96513fce56..79b6fcd8e7 100644
--- a/include/hw/arm/smmuv3.h
+++ b/include/hw/arm/smmuv3.h
@@ -84,16 +84,16 @@ struct SMMUv3Class {
 #define TYPE_ARM_SMMUV3   "arm-smmuv3"
 OBJECT_DECLARE_TYPE(SMMUv3State, SMMUv3Class, ARM_SMMUV3)
 
-#define TYPE_ARM_SMMUV3_NESTED   "arm-smmuv3-nested"
-OBJECT_DECLARE_TYPE(SMMUv3NestedState, SMMUv3NestedClass, ARM_SMMUV3_NESTED)
+#define TYPE_ARM_SMMUV3_ACCEL   "arm-smmuv3-accel"
+OBJECT_DECLARE_TYPE(SMMUv3AccelState, SMMUv3AccelClass, ARM_SMMUV3_ACCEL)
 
-struct SMMUv3NestedState {
+struct SMMUv3AccelState {
     SMMUv3State smmuv3_state;
 
     char *pci_bus;
 };
 
-struct SMMUv3NestedClass {
+struct SMMUv3AccelClass {
     /*< private >*/
     SMMUv3Class smmuv3_class;
     /*< public >*/
diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
index bc3c8b70da..3e2759d225 100644
--- a/include/hw/arm/virt.h
+++ b/include/hw/arm/virt.h
@@ -110,7 +110,7 @@ typedef enum {
 #define SMMU_IO_LEN 0x20000
 
 /* Max supported nested SMMUv3 */
-#define MAX_SMMU_NESTED 64
+#define MAX_SMMU_ACCEL 64
 
 enum {
     VIRT_FLASH,
@@ -124,7 +124,7 @@ enum {
     VIRT_GIC_ITS,
     VIRT_GIC_REDIST,
     VIRT_SMMU,
-    VIRT_SMMU_NESTED,
+    VIRT_SMMU_ACCEL,
     VIRT_UART,
     VIRT_CPUFREQ,
     VIRT_MMIO,
@@ -159,7 +159,7 @@ enum {
 typedef enum VirtIOMMUType {
     VIRT_IOMMU_NONE,
     VIRT_IOMMU_SMMUV3,
-    VIRT_IOMMU_SMMUV3_NESTED,
+    VIRT_IOMMU_SMMUV3_ACCEL,
     VIRT_IOMMU_VIRTIO,
 } VirtIOMMUType;
 
@@ -227,7 +227,7 @@ struct VirtMachineState {
     bool mte;
     bool dtb_randomness;
     bool pmu;
-    int smmu_nested_count;
+    int smmu_accel_count;
     OnOffAuto acpi;
     VirtGICType gic_version;
     VirtIOMMUType iommu;
@@ -298,7 +298,7 @@ static inline int virt_gicv3_redist_region_count(VirtMachineState *vms)
 static inline bool virt_has_smmuv3(const VirtMachineState *vms)
 {
     return vms->iommu == VIRT_IOMMU_SMMUV3 ||
-           vms->iommu == VIRT_IOMMU_SMMUV3_NESTED;
+           vms->iommu == VIRT_IOMMU_SMMUV3_ACCEL;
 }
 
 #endif /* QEMU_ARM_VIRT_H */
-- 
2.41.0.windows.1