2ddec1532b
- migration/xbzrle: fix out-of-bounds write with axv512 - migration/xbzrle: use ctz64 to avoid undefined result - Update bench-code for addressing CI problem - AVX512 support for xbzrle_encode_buffer - configure, meson: move AVX tests to meson - target/i386: KVM: allow fast string operations if host supports them - target/i386: add FSRM to TCG - hw/nvme: fix memory leak in nvme_dsm - aio-posix: fix race between epoll upgrade and aio_set_fd_handler() - target/i386: Add SGX aex-notify and EDECCSSA support - hw/usb/imx: Fix out of bounds access in imx_usbphy_read() - target/i386: Set maximum APIC ID to KVM prior to vCPU creation - target/i386: Fix sanity check on max APIC ID / X2APIC enablement Signed-off-by: Fei Xu <xufei30@huawei.com>
45 lines
1.5 KiB
Diff
45 lines
1.5 KiB
Diff
From 2a2b5f93c2ee2071eb32c65f925974d02c11808d Mon Sep 17 00:00:00 2001
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From: Paolo Bonzini <pbonzini@redhat.com>
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Date: Mon, 27 Feb 2023 10:57:09 +0100
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Subject: [PATCH] target/i386: add FSRM to TCG
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mainline inclusion
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from mainline-v8.0.0-rc0
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commit c0728d4e3d23356691e4182eac54c67e1ca26618
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category: feature
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feature: Intel fast REP string operations support
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bugzilla: https://gitee.com/openeuler/intel-qemu/issues/I6ZGIX
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Intel-SIG: commit c0728d4e3d23 ("target/i386: add FSRM to TCG")
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-------------------------------------
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target/i386: add FSRM to TCG
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Fast short REP MOVS can be added to TCG, since a trivial translation
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of string operation is a good option for short lengths.
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Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com>
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Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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Signed-off-by: Aichun Shi <aichun.shi@intel.com>
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---
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target/i386/cpu.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/target/i386/cpu.c b/target/i386/cpu.c
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index 61cd7abcaa..13dcd4c720 100644
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--- a/target/i386/cpu.c
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+++ b/target/i386/cpu.c
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@@ -660,7 +660,7 @@ void x86_cpu_vendor_words2str(char *dst, uint32_t vendor1,
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#define TCG_7_0_ECX_FEATURES (CPUID_7_0_ECX_PKU | \
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/* CPUID_7_0_ECX_OSPKE is dynamic */ \
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CPUID_7_0_ECX_LA57 | CPUID_7_0_ECX_PKS)
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-#define TCG_7_0_EDX_FEATURES 0
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+#define TCG_7_0_EDX_FEATURES CPUID_7_0_EDX_FSRM
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#define TCG_7_1_EAX_FEATURES (CPUID_7_1_EAX_FZRM | CPUID_7_1_EAX_FSRS | \
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CPUID_7_1_EAX_FSRC)
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#define TCG_APM_FEATURES 0
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--
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2.27.0
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