39a0a891d8
- vdpa: move memory listener to the realize stage - vdpa: implement vdpa device migration - vhost: implement post resume bh - vhost: implement migration state notifier for vdpa device - vhost: implement savevm_hanlder for vdpa device - vhost: implement vhost_vdpa_device_suspend/resume - vhost: implement vhost-vdpa suspend/resume - vhost: add vhost_dev_suspend/resume_op - vhost: introduce bytemap for vhost backend logging - vhost-vdpa: add migration log ops for VhostOps - vhost-vdpa: add VHOST_BACKEND_F_BYTEMAPLOG - vhost: fix null pointer access - ui/gtk: prevent ui lock up when dpy_gl_update called again before current draw event occurs - hw/usb: dev-mtp: Use g_mkdir() - target/ppc/cpu-models: Remove the "default" CPU alias - hw/intc/arm_gicv3: ICC_PMR_EL1 high bits should be RAZ - Fixed a QEMU hang when guest poweroff in COLO mode - migration/colo: More accurate update checkpoint time - scripts/entitlement.sh: Use backward-compatible cp flags - block/nvme: fix infinite loop in nvme_free_req_queue_cb() - hw/net: npcm7xx_emc fix missing queue_flush - Add dummy Aspeed AST2600 Display Port MCU (DPMCU) - hw/arm: ast2600: Fix address mapping of second SPI controller - vhost-user-blk: reconnect on any error during realize - vhost-user-blk: propagate error return from generic vhost - hw/riscv: boot: Reduce FDT address alignment constraints - Revert "hw/virtio/virtio-iommu-pci: Enforce the device is plugged on the root bus" - Fix STM32F2XX USART data register readout - block: use 'unsigned' for in_flight field on driver state - sphinx: change default language to 'en' - tests/qtest: Fix two format strings - trivial typos: namesapce - hw/ide/atapi.c: Correct typos (CD-CDROM -> CD-ROM) - hw/virtio/virtio-iommu-pci: Enforce the device is plugged on the root bus - hw/display/next-fb: Fix comment typo - xen/pass-through: merge emulated bits correctly mainline inclusion commit be9c61da9fc57eb7d293f380d0805ca6f46c2657 category: bugfix - tests/qtest/migration-test.c: spelling fix: bandwith - target/i386/cpu: Improve error message for property "vendor" - balloon: Fix a misleading error message - target/arm: Don't set syndrome ISS for loads and stores with writeback mainline inclusion commit 53ae2fdef1f5661cbaa2ea571c517f98e6041cb8 category: bugfix - disas/hppa: Show hexcode of instruction along with disassembly - tcg/loongarch64: Fix tcg_out_mov() Aborted - ui/qmp-cmds: Improve two error messages - qga: Improve guest-exec-status error message - hmp: Improve sync-profile error message - spapr/pci: Correct "does not support hotplugging error messages - xen/pass-through: don't create needless register group mainline inclusion commit c0e86b7624cb9d6db03e0d48cf82659e5b89a6a6 category: bugfix Signed-off-by: Jiabo Feng <fengjiabo1@huawei.com>
55 lines
2.2 KiB
Diff
55 lines
2.2 KiB
Diff
From bd71d640e5d3731a91ccd6cc4ded251d401b4b2d Mon Sep 17 00:00:00 2001
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From: boringandboring <wangjinlei_yewu@cmss.chinamobile.com>
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Date: Tue, 28 Nov 2023 09:38:09 +0800
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Subject: [PATCH] hw/intc/arm_gicv3: ICC_PMR_EL1 high bits should be RAZ
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cherry picked from 70726a15bc7e61d16f3efe5bfd9b061ca077f533
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The ICC_PMR_ELx and ICV_PMR_ELx bit masks returned from
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ic{c,v}_fullprio_mask should technically also remove any
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bit above 7 as these are marked reserved (read 0) and should
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therefore should not be written as anything other than 0.
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This was noted during a run of a proprietary test system and
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discused on the mailing list [1] and initially thought not to
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be an issue due to RES0 being technically allowed to be
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written to and read back as long as the implementation does
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not use the RES0 bits. It is very possible that the values
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are used in comparison without masking, as pointed out by
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Peter in [2], if (cs->hppi.prio >= cs->icc_pmr_el1) may well
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do the wrong thing.
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Masking these values in ic{c,v}_fullprio_mask() should fix
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this and prevent any future problems with playing with the
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values.
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[1]: https://lists.nongnu.org/archive/html/qemu-arm/2023-11/msg00607.html
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[2]: https://lists.nongnu.org/archive/html/qemu-arm/2023-11/msg00737.html
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Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
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Message-id: 20231116172818.792364-1-ben.dooks@codethink.co.uk
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Suggested-by: Peter Maydell <peter.maydell@linaro.org>
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Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
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Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Signed-off-by: boringandboring <wangjinlei_yewu@cmss.chinamobile.com>
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---
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hw/intc/arm_gicv3_cpuif.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/hw/intc/arm_gicv3_cpuif.c b/hw/intc/arm_gicv3_cpuif.c
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index 274a40a40c..eaa1381b3d 100644
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--- a/hw/intc/arm_gicv3_cpuif.c
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+++ b/hw/intc/arm_gicv3_cpuif.c
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@@ -137,7 +137,7 @@ static uint32_t icv_fullprio_mask(GICv3CPUState *cs)
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* with the group priority, whose mask depends on the value of VBPR
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* for the interrupt group.)
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*/
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- return ~0U << (8 - cs->vpribits);
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+ return (~0U << (8 - cs->vpribits)) & 0xff;
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}
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static int ich_highest_active_virt_prio(GICv3CPUState *cs)
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--
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2.27.0
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