qemu/Fix-STM32F2XX-USART-data-register-readout.patch
Jiabo Feng 39a0a891d8 QEMU update to version 6.2.0-86(master)
- vdpa: move memory listener to the realize stage
- vdpa: implement vdpa device migration
- vhost: implement post resume bh
- vhost: implement migration state notifier for vdpa device
- vhost: implement savevm_hanlder for vdpa device
- vhost: implement vhost_vdpa_device_suspend/resume
- vhost: implement vhost-vdpa suspend/resume
- vhost: add vhost_dev_suspend/resume_op
- vhost: introduce bytemap for vhost backend logging
- vhost-vdpa: add migration log ops for VhostOps
- vhost-vdpa: add VHOST_BACKEND_F_BYTEMAPLOG
- vhost: fix null pointer access
- ui/gtk: prevent ui lock up when dpy_gl_update called again before current draw event occurs
- hw/usb: dev-mtp: Use g_mkdir()
- target/ppc/cpu-models: Remove the "default" CPU alias
- hw/intc/arm_gicv3: ICC_PMR_EL1 high bits should be RAZ
- Fixed a QEMU hang when guest poweroff in COLO mode
- migration/colo: More accurate update checkpoint time
- scripts/entitlement.sh: Use backward-compatible cp flags
- block/nvme: fix infinite loop in nvme_free_req_queue_cb()
- hw/net: npcm7xx_emc fix missing queue_flush
- Add dummy Aspeed AST2600 Display Port MCU (DPMCU)
- hw/arm: ast2600: Fix address mapping of second SPI controller
- vhost-user-blk: reconnect on any error during realize
- vhost-user-blk: propagate error return from generic vhost
- hw/riscv: boot: Reduce FDT address alignment constraints
- Revert "hw/virtio/virtio-iommu-pci: Enforce the device is plugged on the root bus"
- Fix STM32F2XX USART data register readout
- block: use 'unsigned' for in_flight field on driver state
- sphinx: change default language to 'en'
- tests/qtest: Fix two format strings
- trivial typos: namesapce
- hw/ide/atapi.c: Correct typos (CD-CDROM -> CD-ROM)
- hw/virtio/virtio-iommu-pci: Enforce the device is plugged on the root bus
- hw/display/next-fb: Fix comment typo
- xen/pass-through: merge emulated bits correctly mainline inclusion commit be9c61da9fc57eb7d293f380d0805ca6f46c2657 category: bugfix
- tests/qtest/migration-test.c: spelling fix: bandwith
- target/i386/cpu: Improve error message for property "vendor"
- balloon: Fix a misleading error message
- target/arm: Don't set syndrome ISS for loads and  stores with writeback mainline inclusion commit 53ae2fdef1f5661cbaa2ea571c517f98e6041cb8 category: bugfix
- disas/hppa: Show hexcode of instruction along with disassembly
- tcg/loongarch64: Fix tcg_out_mov() Aborted
- ui/qmp-cmds: Improve two error messages
- qga: Improve guest-exec-status error message
- hmp: Improve sync-profile error message
- spapr/pci: Correct "does not support hotplugging error messages
- xen/pass-through: don't create needless register  group mainline inclusion commit c0e86b7624cb9d6db03e0d48cf82659e5b89a6a6 category: bugfix

Signed-off-by: Jiabo Feng <fengjiabo1@huawei.com>
2023-12-05 18:01:05 +08:00

44 lines
1.6 KiB
Diff

From 8733b8a26407177b867d3293283c257efeb784a0 Mon Sep 17 00:00:00 2001
From: Luo Yifan <luoyifan_yewu@cmss.chinamobile.com>
Date: Fri, 1 Dec 2023 12:51:56 +0800
Subject: [PATCH] Fix STM32F2XX USART data register readout
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
cherry picked from commit ab08c3467605365b44fab1b66bb6254db86814f6
Fix issue where the data register may be overwritten by next character
reception before being read and returned.
Signed-off-by: Olivier Hériveaux <olivier.heriveaux@ledger.fr>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20211128120723.4053-1-olivier.heriveaux@ledger.fr
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Luo Yifan <luoyifan_yewu@cmss.chinamobile.com>
---
hw/char/stm32f2xx_usart.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/char/stm32f2xx_usart.c b/hw/char/stm32f2xx_usart.c
index 8df0832424..fde67f4f03 100644
--- a/hw/char/stm32f2xx_usart.c
+++ b/hw/char/stm32f2xx_usart.c
@@ -103,10 +103,11 @@ static uint64_t stm32f2xx_usart_read(void *opaque, hwaddr addr,
return retvalue;
case USART_DR:
DB_PRINT("Value: 0x%" PRIx32 ", %c\n", s->usart_dr, (char) s->usart_dr);
+ retvalue = s->usart_dr & 0x3FF;
s->usart_sr &= ~USART_SR_RXNE;
qemu_chr_fe_accept_input(&s->chr);
qemu_set_irq(s->irq, 0);
- return s->usart_dr & 0x3FF;
+ return retvalue;
case USART_BRR:
return s->usart_brr;
case USART_CR1:
--
2.27.0