29b03965de
QEMU does not support disable/enable CPU features in AArch64 for now. This patch series add support for CPU features in AArch64. Firstly, we change the isar struct in ARMCPU to an array for convenience. Secondly, we add support to configure CPU feautres in AArch64 and make sure that the ID registers can be synchronized to KVM so that guest can read the value we configure. Thirdly, we add a mechanism to solve the dependency relationship of some CPU features. Last, we add a KVM_CAP_ARM_CPU_FEATURE to check whether KVM supports to set CPU features in AArch64. Also export CPU features to the result of qmp query-cpu-model-expansion so that libvirt can get the supported CPU features. Update the ID fields to ARMv8.6 and add some CPU features according to the new ID fields. With related KVM patch set[1], we can disable/enable CPU features in AArch64. [1] https://patchwork.kernel.org/cover/11711693/ Signed-off-by: Peng Liang <liangpeng10@huawei.com>
90 lines
2.7 KiB
Diff
90 lines
2.7 KiB
Diff
From 274d25bdb2df13a26ad6d2a8a06fcc281a22f642 Mon Sep 17 00:00:00 2001
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From: Peng Liang <liangpeng10@huawei.com>
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Date: Thu, 6 Aug 2020 16:14:58 +0800
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Subject: [PATCH 7/9] target/arm: Add CPU features to query-cpu-model-expansion
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Add CPU features to the result of query-cpu-model-expansion so that
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other applications (such as libvirt) can know the supported CPU
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features.
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Signed-off-by: zhanghailiang <zhang.zhanghailiang@huawei.com>
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Signed-off-by: Peng Liang <liangpeng10@huawei.com>
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---
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target/arm/cpu.c | 27 +++++++++++++++++++++++++++
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target/arm/cpu.h | 2 ++
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target/arm/monitor.c | 2 ++
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3 files changed, 31 insertions(+)
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diff --git a/target/arm/cpu.c b/target/arm/cpu.c
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index db46afba..dcf9f49e 100644
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--- a/target/arm/cpu.c
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+++ b/target/arm/cpu.c
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@@ -25,6 +25,8 @@
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#include "qemu/module.h"
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#include "qapi/error.h"
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#include "qapi/visitor.h"
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+#include "qapi/qmp/qdict.h"
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+#include "qom/qom-qobject.h"
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#include "cpu.h"
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#include "internals.h"
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#include "exec/exec-all.h"
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@@ -1403,6 +1405,31 @@ static const CPUFeatureDep feature_dependencies[] = {
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},
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};
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+void arm_cpu_features_to_dict(ARMCPU *cpu, QDict *features)
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+{
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+ Object *obj = OBJECT(cpu);
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+ const char *name;
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+ ObjectProperty *prop;
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+ bool is_32bit = !arm_feature(&cpu->env, ARM_FEATURE_AARCH64);
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+ int i;
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+
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+ for (i = 0; i < ARRAY_SIZE(cpu_features); ++i) {
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+ if (is_32bit != cpu_features[i].is_32bit) {
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+ continue;
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+ }
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+
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+ name = cpu_features[i].name;
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+ prop = object_property_find(obj, name, NULL);
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+ if (prop) {
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+ QObject *value;
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+
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+ assert(prop->get);
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+ value = object_property_get_qobject(obj, name, &error_abort);
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+ qdict_put_obj(features, name, value);
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+ }
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+ }
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+}
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+
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static void arm_cpu_get_bit_prop(Object *obj, Visitor *v, const char *name,
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void *opaque, Error **errp)
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{
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diff --git a/target/arm/cpu.h b/target/arm/cpu.h
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index 7bb481fb..068c3fa2 100644
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--- a/target/arm/cpu.h
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+++ b/target/arm/cpu.h
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@@ -3692,4 +3692,6 @@ static inline bool isar_feature_any_pmu_8_1(const ARMISARegisters *id)
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#define cpu_isar_feature(name, cpu) \
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({ ARMCPU *cpu_ = (cpu); isar_feature_##name(&cpu_->isar); })
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+void arm_cpu_features_to_dict(ARMCPU *cpu, QDict *features);
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+
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#endif
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diff --git a/target/arm/monitor.c b/target/arm/monitor.c
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index e2b1d117..7c2ff3c0 100644
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--- a/target/arm/monitor.c
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+++ b/target/arm/monitor.c
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@@ -219,6 +219,8 @@ CpuModelExpansionInfo *qmp_query_cpu_model_expansion(CpuModelExpansionType type,
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}
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}
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+ arm_cpu_features_to_dict(ARM_CPU(obj), qdict_out);
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+
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if (!qdict_size(qdict_out)) {
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qobject_unref(qdict_out);
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} else {
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--
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2.25.1
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