6713c545f7
This is required to disable ITLB multihit mitigations in nested hypervisors. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Jingyi Wang <wangjingyi11@huawei.com>
33 lines
1.0 KiB
Diff
33 lines
1.0 KiB
Diff
From 4372535d5f2f50b24d14ec8a3393aebec938fb61 Mon Sep 17 00:00:00 2001
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From: Paolo Bonzini <pbonzini@redhat.com>
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Date: Wed, 13 Nov 2019 15:54:35 +0100
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Subject: [PATCH] target/i386: add PSCHANGE_NO bit for the ARCH_CAPABILITIES
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MSR
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This is required to disable ITLB multihit mitigations in nested
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hypervisors.
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Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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Signed-off-by: Jingyi Wang <wangjingyi11@huawei.com>
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---
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target/i386/cpu.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/target/i386/cpu.c b/target/i386/cpu.c
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index 50d6ef9de4..29836cb2a5 100644
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--- a/target/i386/cpu.c
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+++ b/target/i386/cpu.c
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@@ -1208,7 +1208,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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.type = MSR_FEATURE_WORD,
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.feat_names = {
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"rdctl-no", "ibrs-all", "rsba", "skip-l1dfl-vmentry",
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- "ssb-no", "mds-no", NULL, NULL,
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+ "ssb-no", "mds-no", "pschange-mc-no", NULL,
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NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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--
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2.27.0
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