- disable keyring option - loongarch: Change the UEFI loading mode to loongarch - target/loongarch: Fix qtest test-hmp error when KVM-only build - target/loongarch/kvm: Enable LSX/LASX extension - target/loongarch: Set cpuid CSR register only once with kvm mode - configure: Add linux header compile support for LoongArch - hw/intc/loongarch_extioi: Add vmstate post_load support - hw/intc/loongarch_extioi: Add dynamic cpu number support - hw/loongarch/virt: Set iocsr address space per-board rather than percpu - hw/intc/loongarch_ipi: Use MemTxAttrs interface for ipi ops - target/loongarch: Add loongarch kvm into meson build - target/loongarch: Implement set vcpu intr for kvm - target/loongarch: Restrict TCG-specific code - target/loongarch: Implement kvm_arch_handle_exit - target/loongarch: Implement kvm_arch_init_vcpu - target/loongarch: Implement kvm_arch_init function - target/loongarch: Implement kvm get/set registers - target/loongarch: Supplement vcpu env initial when vcpu reset - target/loongarch: Define some kvm_arch interfaces - linux-headers: Synchronize linux headers from linux v6.7.0-rc8 - linux-headers: Update to Linux v6.7-rc5 - target/loongarch: move translate modules to tcg/ - target/loongarch/meson: move gdbstub.c to loongarch.ss - target/loongarch: Add timer information dump support - hw/loongarch/virt: Align high memory base address with super page size Signed-off-by: Jiabo Feng <fengjiabo1@huawei.com> (cherry picked from commit b2263e41ffa3428f1d9f9ff6e214c8e3a19e06e8)
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