- vdpa: move memory listener to the realize stage - vdpa: implement vdpa device migration - vhost: implement post resume bh - vhost: implement migration state notifier for vdpa device - vhost: implement savevm_hanlder for vdpa device - vhost: implement vhost_vdpa_device_suspend/resume - vhost: implement vhost-vdpa suspend/resume - vhost: add vhost_dev_suspend/resume_op - vhost: introduce bytemap for vhost backend logging - vhost-vdpa: add migration log ops for VhostOps - vhost-vdpa: add VHOST_BACKEND_F_BYTEMAPLOG - vhost: fix null pointer access - ui/gtk: prevent ui lock up when dpy_gl_update called again before current draw event occurs - hw/usb: dev-mtp: Use g_mkdir() - target/ppc/cpu-models: Remove the "default" CPU alias - hw/intc/arm_gicv3: ICC_PMR_EL1 high bits should be RAZ - Fixed a QEMU hang when guest poweroff in COLO mode - migration/colo: More accurate update checkpoint time - scripts/entitlement.sh: Use backward-compatible cp flags - block/nvme: fix infinite loop in nvme_free_req_queue_cb() - hw/net: npcm7xx_emc fix missing queue_flush - Add dummy Aspeed AST2600 Display Port MCU (DPMCU) - hw/arm: ast2600: Fix address mapping of second SPI controller - vhost-user-blk: reconnect on any error during realize - vhost-user-blk: propagate error return from generic vhost - hw/riscv: boot: Reduce FDT address alignment constraints - Revert "hw/virtio/virtio-iommu-pci: Enforce the device is plugged on the root bus" - Fix STM32F2XX USART data register readout - block: use 'unsigned' for in_flight field on driver state - sphinx: change default language to 'en' - tests/qtest: Fix two format strings - trivial typos: namesapce - hw/ide/atapi.c: Correct typos (CD-CDROM -> CD-ROM) - hw/virtio/virtio-iommu-pci: Enforce the device is plugged on the root bus - hw/display/next-fb: Fix comment typo - xen/pass-through: merge emulated bits correctly mainline inclusion commit be9c61da9fc57eb7d293f380d0805ca6f46c2657 category: bugfix - tests/qtest/migration-test.c: spelling fix: bandwith - target/i386/cpu: Improve error message for property "vendor" - balloon: Fix a misleading error message - target/arm: Don't set syndrome ISS for loads and stores with writeback mainline inclusion commit 53ae2fdef1f5661cbaa2ea571c517f98e6041cb8 category: bugfix - disas/hppa: Show hexcode of instruction along with disassembly - tcg/loongarch64: Fix tcg_out_mov() Aborted - ui/qmp-cmds: Improve two error messages - qga: Improve guest-exec-status error message - hmp: Improve sync-profile error message - spapr/pci: Correct "does not support hotplugging error messages - xen/pass-through: don't create needless register group mainline inclusion commit c0e86b7624cb9d6db03e0d48cf82659e5b89a6a6 category: bugfix Signed-off-by: Jiabo Feng <fengjiabo1@huawei.com>
44 lines
1.6 KiB
Diff
44 lines
1.6 KiB
Diff
From 8733b8a26407177b867d3293283c257efeb784a0 Mon Sep 17 00:00:00 2001
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From: Luo Yifan <luoyifan_yewu@cmss.chinamobile.com>
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Date: Fri, 1 Dec 2023 12:51:56 +0800
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Subject: [PATCH] Fix STM32F2XX USART data register readout
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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cherry picked from commit ab08c3467605365b44fab1b66bb6254db86814f6
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Fix issue where the data register may be overwritten by next character
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reception before being read and returned.
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Signed-off-by: Olivier Hériveaux <olivier.heriveaux@ledger.fr>
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Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
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Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
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Message-id: 20211128120723.4053-1-olivier.heriveaux@ledger.fr
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Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Signed-off-by: Luo Yifan <luoyifan_yewu@cmss.chinamobile.com>
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---
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hw/char/stm32f2xx_usart.c | 3 ++-
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1 file changed, 2 insertions(+), 1 deletion(-)
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diff --git a/hw/char/stm32f2xx_usart.c b/hw/char/stm32f2xx_usart.c
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index 8df0832424..fde67f4f03 100644
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--- a/hw/char/stm32f2xx_usart.c
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+++ b/hw/char/stm32f2xx_usart.c
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@@ -103,10 +103,11 @@ static uint64_t stm32f2xx_usart_read(void *opaque, hwaddr addr,
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return retvalue;
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case USART_DR:
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DB_PRINT("Value: 0x%" PRIx32 ", %c\n", s->usart_dr, (char) s->usart_dr);
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+ retvalue = s->usart_dr & 0x3FF;
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s->usart_sr &= ~USART_SR_RXNE;
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qemu_chr_fe_accept_input(&s->chr);
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qemu_set_irq(s->irq, 0);
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- return s->usart_dr & 0x3FF;
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+ return retvalue;
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case USART_BRR:
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return s->usart_brr;
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case USART_CR1:
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--
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2.27.0
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