1c823f0431
This series is an attempt to provide CPU hotplug support on ARM virt platform. This is based on ACPI GED device. We should enable ACPI support, and use vGICv3 and 64bit CPU to support CPU hotplug. Under KVM accel, the KVM vCPUs is pre-created. Besides, vGIC IRIs is pre-created too. However, QEMU vCPU objects are defer-created. Signed-off-by: Keqian Zhu <zhukeqian1@huawei.com>
124 lines
5.1 KiB
Diff
124 lines
5.1 KiB
Diff
From 92124743f4560c490780a229f53ea5881f706383 Mon Sep 17 00:00:00 2001
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From: Keqian Zhu <zhukeqian1@huawei.com>
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Date: Sun, 5 Apr 2020 15:29:16 +0800
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Subject: [PATCH] arm/virt/gic: Construct irqs connection from create_gic
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Make the irqs can be connected to for individual CPU.
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Signed-off-by: Keqian Zhu <zhukeqian1@huawei.com>
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Signed-off-by: Salil Mehta <salil.mehta@huawei.com>
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---
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hw/arm/virt.c | 90 ++++++++++++++++++++++++++++-----------------------
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1 file changed, 49 insertions(+), 41 deletions(-)
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diff --git a/hw/arm/virt.c b/hw/arm/virt.c
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index 83f4887e57..55d403bad6 100644
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--- a/hw/arm/virt.c
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+++ b/hw/arm/virt.c
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@@ -706,6 +706,54 @@ static void create_v2m(VirtMachineState *vms)
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fdt_add_v2m_gic_node(vms);
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}
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+static void connect_gic_cpu_irqs(VirtMachineState *vms, int i)
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+{
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+ DeviceState *cpudev = DEVICE(qemu_get_cpu(i));
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+ SysBusDevice *gicbusdev = SYS_BUS_DEVICE(vms->gic);
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+ int ppibase = NUM_IRQS + i * GIC_INTERNAL + GIC_NR_SGIS;
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+ int num_cpus = object_property_get_uint(OBJECT(vms->gic), "num-cpu", NULL);
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+ int gic_type = vms->gic_version;
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+ int irq;
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+ /* Mapping from the output timer irq lines from the CPU to the
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+ * GIC PPI inputs we use for the virt board.
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+ */
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+ const int timer_irq[] = {
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+ [GTIMER_PHYS] = ARCH_TIMER_NS_EL1_IRQ,
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+ [GTIMER_VIRT] = ARCH_TIMER_VIRT_IRQ,
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+ [GTIMER_HYP] = ARCH_TIMER_NS_EL2_IRQ,
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+ [GTIMER_SEC] = ARCH_TIMER_S_EL1_IRQ,
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+ };
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+
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+ for (irq = 0; irq < ARRAY_SIZE(timer_irq); irq++) {
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+ qdev_connect_gpio_out(cpudev, irq,
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+ qdev_get_gpio_in(vms->gic,
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+ ppibase + timer_irq[irq]));
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+ }
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+
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+ if (gic_type == 3) {
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+ qemu_irq irq = qdev_get_gpio_in(vms->gic,
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+ ppibase + ARCH_GIC_MAINT_IRQ);
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+ qdev_connect_gpio_out_named(cpudev, "gicv3-maintenance-interrupt",
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+ 0, irq);
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+ } else if (vms->virt) {
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+ qemu_irq irq = qdev_get_gpio_in(vms->gic,
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+ ppibase + ARCH_GIC_MAINT_IRQ);
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+ sysbus_connect_irq(gicbusdev, i + 4 * num_cpus, irq);
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+ }
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+
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+ qdev_connect_gpio_out_named(cpudev, "pmu-interrupt", 0,
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+ qdev_get_gpio_in(vms->gic, ppibase
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+ + VIRTUAL_PMU_IRQ));
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+
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+ sysbus_connect_irq(gicbusdev, i, qdev_get_gpio_in(cpudev, ARM_CPU_IRQ));
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+ sysbus_connect_irq(gicbusdev, i + num_cpus,
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+ qdev_get_gpio_in(cpudev, ARM_CPU_FIQ));
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+ sysbus_connect_irq(gicbusdev, i + 2 * num_cpus,
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+ qdev_get_gpio_in(cpudev, ARM_CPU_VIRQ));
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+ sysbus_connect_irq(gicbusdev, i + 3 * num_cpus,
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+ qdev_get_gpio_in(cpudev, ARM_CPU_VFIQ));
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+}
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+
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static void create_gic(VirtMachineState *vms)
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{
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MachineState *ms = MACHINE(vms);
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@@ -775,47 +823,7 @@ static void create_gic(VirtMachineState *vms)
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* and the GIC's IRQ/FIQ/VIRQ/VFIQ interrupt outputs to the CPU's inputs.
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*/
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for (i = 0; i < smp_cpus; i++) {
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- DeviceState *cpudev = DEVICE(qemu_get_cpu(i));
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- int ppibase = NUM_IRQS + i * GIC_INTERNAL + GIC_NR_SGIS;
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- int irq;
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- /* Mapping from the output timer irq lines from the CPU to the
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- * GIC PPI inputs we use for the virt board.
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- */
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- const int timer_irq[] = {
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- [GTIMER_PHYS] = ARCH_TIMER_NS_EL1_IRQ,
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- [GTIMER_VIRT] = ARCH_TIMER_VIRT_IRQ,
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- [GTIMER_HYP] = ARCH_TIMER_NS_EL2_IRQ,
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- [GTIMER_SEC] = ARCH_TIMER_S_EL1_IRQ,
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- };
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-
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- for (irq = 0; irq < ARRAY_SIZE(timer_irq); irq++) {
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- qdev_connect_gpio_out(cpudev, irq,
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- qdev_get_gpio_in(vms->gic,
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- ppibase + timer_irq[irq]));
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- }
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-
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- if (type == 3) {
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- qemu_irq irq = qdev_get_gpio_in(vms->gic,
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- ppibase + ARCH_GIC_MAINT_IRQ);
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- qdev_connect_gpio_out_named(cpudev, "gicv3-maintenance-interrupt",
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- 0, irq);
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- } else if (vms->virt) {
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- qemu_irq irq = qdev_get_gpio_in(vms->gic,
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- ppibase + ARCH_GIC_MAINT_IRQ);
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- sysbus_connect_irq(gicbusdev, i + 4 * smp_cpus, irq);
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- }
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-
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- qdev_connect_gpio_out_named(cpudev, "pmu-interrupt", 0,
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- qdev_get_gpio_in(vms->gic, ppibase
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- + VIRTUAL_PMU_IRQ));
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-
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- sysbus_connect_irq(gicbusdev, i, qdev_get_gpio_in(cpudev, ARM_CPU_IRQ));
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- sysbus_connect_irq(gicbusdev, i + smp_cpus,
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- qdev_get_gpio_in(cpudev, ARM_CPU_FIQ));
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- sysbus_connect_irq(gicbusdev, i + 2 * smp_cpus,
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- qdev_get_gpio_in(cpudev, ARM_CPU_VIRQ));
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- sysbus_connect_irq(gicbusdev, i + 3 * smp_cpus,
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- qdev_get_gpio_in(cpudev, ARM_CPU_VFIQ));
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+ connect_gic_cpu_irqs(vms, i);
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}
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fdt_add_gic_node(vms);
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--
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2.19.1
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