0121fec7e1
- target/riscv/cpu.c: fix Zvkb extension config - target/i386: Add new Hygon 'Dharma' CPU model - target/i386: Add Hygon Dhyana-v3 CPU model - ui/gtk: Fix mouse/motion event scaling issue with GTK display backend - hw/ufs: Fix buffer overflow bug - arm/virt: Set vcpus_count of CPU as 1 to compatible with libvirt - ppc/pnv: I2C controller is not user creatablei Signed-off-by: Jiabo Feng <fengjiabo1@huawei.com>
134 lines
4.6 KiB
Diff
134 lines
4.6 KiB
Diff
From f4d31d640491c66bb1277e12d3c1d0e7ebc7cae5 Mon Sep 17 00:00:00 2001
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From: Yanjing Zhou <zhouyanjing@hygon.cn>
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Date: Wed, 15 May 2024 13:50:17 +0800
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Subject: [PATCH] target/i386: Add new Hygon 'Dharma' CPU model
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Add the following feature bits compare to Dhyana CPU model:
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stibp, ibrs, umip, ssbd
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Signed-off-by: Yanjing Zhou <zhouyanjing@hygon.cn>
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---
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target/i386/cpu.c | 99 +++++++++++++++++++++++++++++++++++++++++++++++
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1 file changed, 99 insertions(+)
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diff --git a/target/i386/cpu.c b/target/i386/cpu.c
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index f4c22f32c6..711370d9b8 100644
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--- a/target/i386/cpu.c
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+++ b/target/i386/cpu.c
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@@ -2162,6 +2162,56 @@ static const CPUCaches epyc_genoa_cache_info = {
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},
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};
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+static const CPUCaches dharma_cache_info = {
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+ .l1d_cache = &(CPUCacheInfo) {
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+ .type = DATA_CACHE,
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+ .level = 1,
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+ .size = 32 * KiB,
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+ .line_size = 64,
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+ .associativity = 8,
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+ .partitions = 1,
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+ .sets = 64,
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+ .lines_per_tag = 1,
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+ .self_init = 1,
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+ .no_invd_sharing = true,
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+ },
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+ .l1i_cache = &(CPUCacheInfo) {
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+ .type = INSTRUCTION_CACHE,
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+ .level = 1,
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+ .size = 32 * KiB,
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+ .line_size = 64,
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+ .associativity = 8,
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+ .partitions = 1,
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+ .sets = 64,
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+ .lines_per_tag = 1,
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+ .self_init = 1,
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+ .no_invd_sharing = true,
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+ },
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+ .l2_cache = &(CPUCacheInfo) {
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+ .type = UNIFIED_CACHE,
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+ .level = 2,
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+ .size = 512 * KiB,
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+ .line_size = 64,
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+ .associativity = 8,
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+ .partitions = 1,
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+ .sets = 1024,
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+ .lines_per_tag = 1,
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+ },
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+ .l3_cache = &(CPUCacheInfo) {
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+ .type = UNIFIED_CACHE,
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+ .level = 3,
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+ .size = 16 * MiB,
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+ .line_size = 64,
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+ .associativity = 16,
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+ .partitions = 1,
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+ .sets = 16384,
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+ .lines_per_tag = 1,
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+ .self_init = true,
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+ .inclusive = true,
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+ .complex_indexing = true,
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+ },
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+};
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+
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/* The following VMX features are not supported by KVM and are left out in the
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* CPU definitions:
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*
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@@ -5038,6 +5088,55 @@ static const X86CPUDefinition builtin_x86_defs[] = {
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.model_id = "AMD EPYC-Genoa Processor",
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.cache_info = &epyc_genoa_cache_info,
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},
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+ {
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+ .name = "Dharma",
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+ .level = 0xd,
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+ .vendor = CPUID_VENDOR_HYGON,
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+ .family = 24,
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+ .model = 4,
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+ .stepping = 0,
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+ .features[FEAT_1_EDX] =
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+ CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX | CPUID_CLFLUSH |
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+ CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA | CPUID_PGE |
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+ CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 | CPUID_MCE |
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+ CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE | CPUID_DE |
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+ CPUID_VME | CPUID_FP87,
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+ .features[FEAT_1_ECX] =
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+ CPUID_EXT_RDRAND | CPUID_EXT_F16C | CPUID_EXT_AVX |
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+ CPUID_EXT_XSAVE | CPUID_EXT_AES | CPUID_EXT_POPCNT |
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+ CPUID_EXT_MOVBE | CPUID_EXT_SSE42 | CPUID_EXT_SSE41 |
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+ CPUID_EXT_CX16 | CPUID_EXT_FMA | CPUID_EXT_SSSE3 |
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+ CPUID_EXT_MONITOR | CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3,
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+ .features[FEAT_8000_0001_EDX] =
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+ CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_PDPE1GB |
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+ CPUID_EXT2_FFXSR | CPUID_EXT2_MMXEXT | CPUID_EXT2_NX |
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+ CPUID_EXT2_SYSCALL,
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+ .features[FEAT_8000_0001_ECX] =
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+ CPUID_EXT3_OSVW | CPUID_EXT3_3DNOWPREFETCH |
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+ CPUID_EXT3_MISALIGNSSE | CPUID_EXT3_SSE4A | CPUID_EXT3_ABM |
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+ CPUID_EXT3_CR8LEG | CPUID_EXT3_SVM | CPUID_EXT3_LAHF_LM |
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+ CPUID_EXT3_TOPOEXT | CPUID_EXT3_PERFCORE,
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+ .features[FEAT_8000_0008_EBX] =
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+ CPUID_8000_0008_EBX_CLZERO | CPUID_8000_0008_EBX_XSAVEERPTR |
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+ CPUID_8000_0008_EBX_IBPB | CPUID_8000_0008_EBX_IBRS |
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+ CPUID_8000_0008_EBX_STIBP | CPUID_8000_0008_EBX_AMD_SSBD,
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+ .features[FEAT_7_0_EBX] =
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+ CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 | CPUID_7_0_EBX_AVX2 |
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+ CPUID_7_0_EBX_SMEP | CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_RDSEED |
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+ CPUID_7_0_EBX_ADX | CPUID_7_0_EBX_SMAP | CPUID_7_0_EBX_CLFLUSHOPT |
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+ CPUID_7_0_EBX_SHA_NI,
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+ .features[FEAT_7_0_ECX] = CPUID_7_0_ECX_UMIP,
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+ .features[FEAT_XSAVE] =
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+ CPUID_XSAVE_XSAVEOPT | CPUID_XSAVE_XSAVEC |
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+ CPUID_XSAVE_XGETBV1,
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+ .features[FEAT_6_EAX] =
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+ CPUID_6_EAX_ARAT,
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+ .features[FEAT_SVM] =
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+ CPUID_SVM_NPT | CPUID_SVM_NRIPSAVE,
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+ .xlevel = 0x8000001E,
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+ .model_id = "Hygon Dharma Processor",
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+ .cache_info = &dharma_cache_info,
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+ },
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};
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/*
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--
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2.41.0.windows.1
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