5636aff5b1
- target/i386: csv: Support inject secret for CSV3 guest only if the extension is enabled
- target/i386: csv: Support load kernel hashes for CSV3 guest only if the extension is enabled
- target/i386: csv: Request to set private memory of CSV3 guest if the extension is enabled
- target/i386: kvm: Support to get and enable extensions for Hygon CoCo guest
- qapi/qom,target/i386: csv-guest: Introduce secret-header-file=str and secret-file=str options
- bakcend: VirtCCA:resolve hugepage memory waste issue in vhost-user scenario
- parallels: fix ext_off assertion failure due to overflow
- backends/cryptodev-vhost-user: Fix local_error leaks
- hw/usb/hcd-ehci: Fix debug printf format string
- target/riscv/vector_helper.c: fix 'vmvr_v' memcpy endianess
- target/riscv/vector_helper.c: optimize loops in ldst helpers
- target/riscv/vector_helper.c: set vstart = 0 in GEN_VEXT_VSLIDEUP_VX()
- target/hexagon: don't look for static glib
- virtio-net: Fix network stall at the host side waiting for kick
- Add if condition to avoid assertion failed error in blockdev_init
- target/arm: Use float_status copy in sme_fmopa_s
- target/arm: take HSTR traps of cp15 accesses to EL2, not EL1
- target/arm: Reinstate "vfp" property on AArch32 CPUs
- target/i386/cpu: Fix notes for CPU models
- target/arm: LDAPR should honour SCTLR_ELx.nAA
- target/riscv: Avoid bad shift in riscv_cpu_do_interrupt()
- hvf: remove unused but set variable
- hw/misc/nrf51_rng: Don't use BIT_MASK() when we mean BIT()
- Avoid taking address of out-of-bounds array index
- target/arm: Fix VCMLA Dd, Dn, Dm[idx]
- target/arm: Fix UMOPA/UMOPS of 16-bit values
- target/arm: Fix SVE/SME gross MTE suppression checks
- target/arm: Fix nregs computation in do_{ld,st}_zpa
- crypto: fix error check on gcry_md_open
- Change vmstate_cpuhp_sts vmstateDescription version_id
- hw/pci: Remove unused pci_irq_pulse() method
- hw/intc: Don't clear pending bits on IRQ lowering
- target/arm: Drop user-only special case in sve_stN_r
- migration: Ensure vmstate_save() sets errp
- target/i386: fix hang when using slow path for ptw_setl
- contrib/plugins: add compat for g_memdup2
- hw/audio/hda: fix memory leak on audio setup
- crypto: perform runtime check for hash/hmac support in gcrypt
- target/arm: Fix incorrect aa64_tidcp1 feature check
- target/arm: fix exception syndrome for AArch32 bkpt insn
- target/arm: Don't get MDCR_EL2 in pmu_counter_enabled() before checking ARM_FEATURE_PMU
- linux-user: Print tid not pid with strace
- target/arm: Fix A64 scalar SQSHRN and SQRSHRN
- target/arm: Don't assert for 128-bit tile accesses when SVL is 128
- hw/timer/exynos4210_mct: fix possible int overflow
- target/arm: Avoid shifts by -1 in tszimm_shr() and tszimm_shl()
- hw/audio/virtio-snd: Always use little endian audio format
- target/riscv: Fix vcompress with rvv_ta_all_1s
- usb-hub: Fix handling port power control messages
Signed-off-by: Jiabo Feng <fengjiabo1@huawei.com>
(cherry picked from commit d4a20b24ff377fd07fcbf2b72eecaf07a3ac4cc0)
88 lines
3.4 KiB
Diff
88 lines
3.4 KiB
Diff
From b69c9f4b7b72c0634f2353135f83d8e59f3308dd Mon Sep 17 00:00:00 2001
|
|
From: gubin <gubin_yewu@cmss.chinamobile.com>
|
|
Date: Tue, 17 Dec 2024 14:42:31 +0800
|
|
Subject: [PATCH] target/arm: Fix SVE/SME gross MTE suppression checks
|
|
|
|
cherry-pick from 855f94eca80c85a99f459e36684ea2f98f6a3243
|
|
|
|
The TBI and TCMA bits are located within mtedesc, not desc.
|
|
|
|
Cc: qemu-stable@nongnu.org
|
|
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
|
|
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
|
Tested-by: Gustavo Romero <gustavo.romero@linaro.org>
|
|
Message-id: 20240207025210.8837-7-richard.henderson@linaro.org
|
|
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|
|
Signed-off-by: gubin <gubin_yewu@cmss.chinamobile.com>
|
|
---
|
|
target/arm/tcg/sme_helper.c | 8 ++++----
|
|
target/arm/tcg/sve_helper.c | 12 ++++++------
|
|
2 files changed, 10 insertions(+), 10 deletions(-)
|
|
|
|
diff --git a/target/arm/tcg/sme_helper.c b/target/arm/tcg/sme_helper.c
|
|
index 1ee2690ceb..904bfdac43 100644
|
|
--- a/target/arm/tcg/sme_helper.c
|
|
+++ b/target/arm/tcg/sme_helper.c
|
|
@@ -573,8 +573,8 @@ void sme_ld1_mte(CPUARMState *env, void *za, uint64_t *vg,
|
|
desc = extract32(desc, 0, SIMD_DATA_SHIFT + SVE_MTEDESC_SHIFT);
|
|
|
|
/* Perform gross MTE suppression early. */
|
|
- if (!tbi_check(desc, bit55) ||
|
|
- tcma_check(desc, bit55, allocation_tag_from_addr(addr))) {
|
|
+ if (!tbi_check(mtedesc, bit55) ||
|
|
+ tcma_check(mtedesc, bit55, allocation_tag_from_addr(addr))) {
|
|
mtedesc = 0;
|
|
}
|
|
|
|
@@ -750,8 +750,8 @@ void sme_st1_mte(CPUARMState *env, void *za, uint64_t *vg, target_ulong addr,
|
|
desc = extract32(desc, 0, SIMD_DATA_SHIFT + SVE_MTEDESC_SHIFT);
|
|
|
|
/* Perform gross MTE suppression early. */
|
|
- if (!tbi_check(desc, bit55) ||
|
|
- tcma_check(desc, bit55, allocation_tag_from_addr(addr))) {
|
|
+ if (!tbi_check(mtedesc, bit55) ||
|
|
+ tcma_check(mtedesc, bit55, allocation_tag_from_addr(addr))) {
|
|
mtedesc = 0;
|
|
}
|
|
|
|
diff --git a/target/arm/tcg/sve_helper.c b/target/arm/tcg/sve_helper.c
|
|
index ce8134320b..9694201550 100644
|
|
--- a/target/arm/tcg/sve_helper.c
|
|
+++ b/target/arm/tcg/sve_helper.c
|
|
@@ -5800,8 +5800,8 @@ void sve_ldN_r_mte(CPUARMState *env, uint64_t *vg, target_ulong addr,
|
|
desc = extract32(desc, 0, SIMD_DATA_SHIFT + SVE_MTEDESC_SHIFT);
|
|
|
|
/* Perform gross MTE suppression early. */
|
|
- if (!tbi_check(desc, bit55) ||
|
|
- tcma_check(desc, bit55, allocation_tag_from_addr(addr))) {
|
|
+ if (!tbi_check(mtedesc, bit55) ||
|
|
+ tcma_check(mtedesc, bit55, allocation_tag_from_addr(addr))) {
|
|
mtedesc = 0;
|
|
}
|
|
|
|
@@ -6156,8 +6156,8 @@ void sve_ldnfff1_r_mte(CPUARMState *env, void *vg, target_ulong addr,
|
|
desc = extract32(desc, 0, SIMD_DATA_SHIFT + SVE_MTEDESC_SHIFT);
|
|
|
|
/* Perform gross MTE suppression early. */
|
|
- if (!tbi_check(desc, bit55) ||
|
|
- tcma_check(desc, bit55, allocation_tag_from_addr(addr))) {
|
|
+ if (!tbi_check(mtedesc, bit55) ||
|
|
+ tcma_check(mtedesc, bit55, allocation_tag_from_addr(addr))) {
|
|
mtedesc = 0;
|
|
}
|
|
|
|
@@ -6406,8 +6406,8 @@ void sve_stN_r_mte(CPUARMState *env, uint64_t *vg, target_ulong addr,
|
|
desc = extract32(desc, 0, SIMD_DATA_SHIFT + SVE_MTEDESC_SHIFT);
|
|
|
|
/* Perform gross MTE suppression early. */
|
|
- if (!tbi_check(desc, bit55) ||
|
|
- tcma_check(desc, bit55, allocation_tag_from_addr(addr))) {
|
|
+ if (!tbi_check(mtedesc, bit55) ||
|
|
+ tcma_check(mtedesc, bit55, allocation_tag_from_addr(addr))) {
|
|
mtedesc = 0;
|
|
}
|
|
|
|
--
|
|
2.41.0.windows.1
|
|
|