5636aff5b1
- target/i386: csv: Support inject secret for CSV3 guest only if the extension is enabled
- target/i386: csv: Support load kernel hashes for CSV3 guest only if the extension is enabled
- target/i386: csv: Request to set private memory of CSV3 guest if the extension is enabled
- target/i386: kvm: Support to get and enable extensions for Hygon CoCo guest
- qapi/qom,target/i386: csv-guest: Introduce secret-header-file=str and secret-file=str options
- bakcend: VirtCCA:resolve hugepage memory waste issue in vhost-user scenario
- parallels: fix ext_off assertion failure due to overflow
- backends/cryptodev-vhost-user: Fix local_error leaks
- hw/usb/hcd-ehci: Fix debug printf format string
- target/riscv/vector_helper.c: fix 'vmvr_v' memcpy endianess
- target/riscv/vector_helper.c: optimize loops in ldst helpers
- target/riscv/vector_helper.c: set vstart = 0 in GEN_VEXT_VSLIDEUP_VX()
- target/hexagon: don't look for static glib
- virtio-net: Fix network stall at the host side waiting for kick
- Add if condition to avoid assertion failed error in blockdev_init
- target/arm: Use float_status copy in sme_fmopa_s
- target/arm: take HSTR traps of cp15 accesses to EL2, not EL1
- target/arm: Reinstate "vfp" property on AArch32 CPUs
- target/i386/cpu: Fix notes for CPU models
- target/arm: LDAPR should honour SCTLR_ELx.nAA
- target/riscv: Avoid bad shift in riscv_cpu_do_interrupt()
- hvf: remove unused but set variable
- hw/misc/nrf51_rng: Don't use BIT_MASK() when we mean BIT()
- Avoid taking address of out-of-bounds array index
- target/arm: Fix VCMLA Dd, Dn, Dm[idx]
- target/arm: Fix UMOPA/UMOPS of 16-bit values
- target/arm: Fix SVE/SME gross MTE suppression checks
- target/arm: Fix nregs computation in do_{ld,st}_zpa
- crypto: fix error check on gcry_md_open
- Change vmstate_cpuhp_sts vmstateDescription version_id
- hw/pci: Remove unused pci_irq_pulse() method
- hw/intc: Don't clear pending bits on IRQ lowering
- target/arm: Drop user-only special case in sve_stN_r
- migration: Ensure vmstate_save() sets errp
- target/i386: fix hang when using slow path for ptw_setl
- contrib/plugins: add compat for g_memdup2
- hw/audio/hda: fix memory leak on audio setup
- crypto: perform runtime check for hash/hmac support in gcrypt
- target/arm: Fix incorrect aa64_tidcp1 feature check
- target/arm: fix exception syndrome for AArch32 bkpt insn
- target/arm: Don't get MDCR_EL2 in pmu_counter_enabled() before checking ARM_FEATURE_PMU
- linux-user: Print tid not pid with strace
- target/arm: Fix A64 scalar SQSHRN and SQRSHRN
- target/arm: Don't assert for 128-bit tile accesses when SVL is 128
- hw/timer/exynos4210_mct: fix possible int overflow
- target/arm: Avoid shifts by -1 in tszimm_shr() and tszimm_shl()
- hw/audio/virtio-snd: Always use little endian audio format
- target/riscv: Fix vcompress with rvv_ta_all_1s
- usb-hub: Fix handling port power control messages
Signed-off-by: Jiabo Feng <fengjiabo1@huawei.com>
(cherry picked from commit d4a20b24ff377fd07fcbf2b72eecaf07a3ac4cc0)
92 lines
3.2 KiB
Diff
92 lines
3.2 KiB
Diff
From 3031ddd4dd45a706def011a9d6afdacd2557d147 Mon Sep 17 00:00:00 2001
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From: gubin <gubin_yewu@cmss.chinamobile.com>
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Date: Thu, 28 Nov 2024 14:26:43 +0800
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Subject: [PATCH] target/arm: fix exception syndrome for AArch32 bkpt insn
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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cherry-pick from f670be1aad33e801779af580398895b9455747ee
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Debug exceptions that target AArch32 Hyp mode are reported differently
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than on AAarch64. Internally, Qemu uses the AArch64 syndromes. Therefore
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such exceptions need to be either converted to a prefetch abort
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(breakpoints, vector catch) or a data abort (watchpoints).
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Cc: qemu-stable@nongnu.org
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Signed-off-by: Jan Klötzke <jan.kloetzke@kernkonzept.com>
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Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
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Message-id: 20240127202758.3326381-1-jan.kloetzke@kernkonzept.com
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Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Signed-off-by: gubin <gubin_yewu@cmss.chinamobile.com>
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---
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target/arm/helper.c | 18 ++++++++++++++++++
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target/arm/syndrome.h | 8 ++++++++
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2 files changed, 26 insertions(+)
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diff --git a/target/arm/helper.c b/target/arm/helper.c
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index 793aa89cc6..35b8eaf15a 100644
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--- a/target/arm/helper.c
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+++ b/target/arm/helper.c
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@@ -10848,6 +10848,24 @@ static void arm_cpu_do_interrupt_aarch32(CPUState *cs)
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}
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if (env->exception.target_el == 2) {
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+ /* Debug exceptions are reported differently on AArch32 */
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+ switch (syn_get_ec(env->exception.syndrome)) {
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+ case EC_BREAKPOINT:
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+ case EC_BREAKPOINT_SAME_EL:
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+ case EC_AA32_BKPT:
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+ case EC_VECTORCATCH:
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+ env->exception.syndrome = syn_insn_abort(arm_current_el(env) == 2,
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+ 0, 0, 0x22);
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+ break;
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+ case EC_WATCHPOINT:
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+ env->exception.syndrome = syn_set_ec(env->exception.syndrome,
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+ EC_DATAABORT);
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+ break;
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+ case EC_WATCHPOINT_SAME_EL:
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+ env->exception.syndrome = syn_set_ec(env->exception.syndrome,
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+ EC_DATAABORT_SAME_EL);
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+ break;
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+ }
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arm_cpu_do_interrupt_aarch32_hyp(cs);
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return;
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}
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diff --git a/target/arm/syndrome.h b/target/arm/syndrome.h
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index 95454b5b3b..eccb759da6 100644
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--- a/target/arm/syndrome.h
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+++ b/target/arm/syndrome.h
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@@ -25,6 +25,8 @@
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#ifndef TARGET_ARM_SYNDROME_H
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#define TARGET_ARM_SYNDROME_H
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+#include "qemu/bitops.h"
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+
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/* Valid Syndrome Register EC field values */
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enum arm_exception_class {
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EC_UNCATEGORIZED = 0x00,
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@@ -80,6 +82,7 @@ typedef enum {
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SME_ET_InactiveZA,
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} SMEExceptionType;
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+#define ARM_EL_EC_LENGTH 6
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#define ARM_EL_EC_SHIFT 26
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#define ARM_EL_IL_SHIFT 25
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#define ARM_EL_ISV_SHIFT 24
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@@ -91,6 +94,11 @@ static inline uint32_t syn_get_ec(uint32_t syn)
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return syn >> ARM_EL_EC_SHIFT;
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}
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+static inline uint32_t syn_set_ec(uint32_t syn, uint32_t ec)
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+{
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+ return deposit32(syn, ARM_EL_EC_SHIFT, ARM_EL_EC_LENGTH, ec);
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+}
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+
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/*
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* Utility functions for constructing various kinds of syndrome value.
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* Note that in general we follow the AArch64 syndrome values; in a
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--
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2.41.0.windows.1
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