12ece8009b
- target/loongarch: Fix qemu-system-loongarch64 assert - target/loongarch: Fix qemu-loongarch64 hang when executing 'll.d , , 0' - target/loongarch: Fix tlb huge page loading issue - target/loongarch/kvm: Add software breakpoint support - target/loongarch/kvm: sync kernel header files - hw/intc/loongarch_extioi: Add virt extension support - target/loongarch/kvm: Add pmu support - target/loongarch/kvm: Fix vm restore failed - target/loongarch/kvm: Add pv steal time support - target/loongarch/kvm: fpu save the vreg registers high Signed-off-by: Song Gao <gaosong@loongson.cn>
225 lines
7.3 KiB
Diff
225 lines
7.3 KiB
Diff
From 57db061a63243c64c07624740fc039ddcc4777a2 Mon Sep 17 00:00:00 2001
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From: Song Gao <gaosong@loongson.cn>
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Date: Fri, 22 Mar 2024 19:26:35 +0800
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Subject: [PATCH] target/loongarch/kvm: Add pmu support
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This patch adds PMU support
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e.g
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'... -cpu max,pmu=on,pmnum=[1-16]';
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'... -cpu max,pmu=on' (default pmnum = 4);
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'... -cpu max,pmu=off' (disable PMU)
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Signed-off-by: Song Gao <gaosong@loongson.cn>
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---
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target/loongarch/cpu.c | 64 +++++++++++++++++++++++++++
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target/loongarch/cpu.h | 2 +
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target/loongarch/kvm/kvm.c | 55 ++++++++++++++++++++++-
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target/loongarch/loongarch-qmp-cmds.c | 2 +-
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4 files changed, 121 insertions(+), 2 deletions(-)
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diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
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index fdb819c2cf..bc557f207b 100644
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--- a/target/loongarch/cpu.c
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+++ b/target/loongarch/cpu.c
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@@ -8,6 +8,7 @@
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#include "qemu/osdep.h"
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#include "qemu/log.h"
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#include "qemu/qemu-print.h"
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+#include "qemu/error-report.h"
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#include "qapi/error.h"
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#include "qemu/module.h"
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#include "sysemu/qtest.h"
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@@ -19,6 +20,7 @@
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#include "internals.h"
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#include "fpu/softfloat-helpers.h"
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#include "cpu-csr.h"
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+#include "qapi/visitor.h"
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#include "sysemu/reset.h"
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#include "vec.h"
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#ifdef CONFIG_KVM
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@@ -426,6 +428,14 @@ static void loongarch_la464_initfn(Object *obj)
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data = FIELD_DP32(data, CPUCFG5, CC_DIV, 1);
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env->cpucfg[5] = data;
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+ if (kvm_enabled()) {
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+ data = 0;
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+ data = FIELD_DP32(data, CPUCFG6, PMP, 1);
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+ data = FIELD_DP32(data, CPUCFG6, PMNUM, 3);
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+ data = FIELD_DP32(data, CPUCFG6, PMBITS, 63);
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+ env->cpucfg[6] = data;
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+ }
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+
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data = 0;
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data = FIELD_DP32(data, CPUCFG16, L1_IUPRE, 1);
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data = FIELD_DP32(data, CPUCFG16, L1_DPRE, 1);
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@@ -660,6 +670,48 @@ static void loongarch_set_lasx(Object *obj, bool value, Error **errp)
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}
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}
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+static bool loongarch_get_pmu(Object *obj, Error **errp)
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+{
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+ LoongArchCPU *cpu = LOONGARCH_CPU(obj);
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+
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+ return !!(FIELD_EX32(cpu->env.cpucfg[6], CPUCFG6, PMP));
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+}
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+
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+static void loongarch_set_pmu(Object *obj, bool value, Error **errp)
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+{
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+ LoongArchCPU *cpu = LOONGARCH_CPU(obj);
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+
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+ cpu->env.cpucfg[6] = FIELD_DP32(cpu->env.cpucfg[6], CPUCFG6, PMP, value);
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+}
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+
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+static void loongarch_get_pmnum(Object *obj, Visitor *v,
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+ const char *name, void *opaque,
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+ Error **errp)
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+{
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+ LoongArchCPU *cpu = LOONGARCH_CPU(obj);
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+ uint32_t value = FIELD_EX32(cpu->env.cpucfg[6], CPUCFG6, PMNUM);
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+
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+ visit_type_uint32(v, name, &value, errp);
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+}
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+
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+static void loongarch_set_pmnum(Object *obj, Visitor *v,
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+ const char *name, void *opaque,
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+ Error **errp)
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+{
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+ LoongArchCPU *cpu = LOONGARCH_CPU(obj);
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+ uint32_t *value= opaque;
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+
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+ if (!visit_type_uint32(v, name, value, errp)) {
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+ return;
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+ }
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+ if ((*value <= PMNUM_MAX) && (*value > 0)) {
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+ cpu->env.cpucfg[6] = FIELD_DP32(cpu->env.cpucfg[6], CPUCFG6, PMNUM, *value -1);
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+ } else {
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+ error_report("Performance counter number need be in [1- %d]\n", PMNUM_MAX);
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+ exit(EXIT_FAILURE);
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+ }
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+}
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+
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void loongarch_cpu_post_init(Object *obj)
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{
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LoongArchCPU *cpu = LOONGARCH_CPU(obj);
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@@ -672,6 +724,18 @@ void loongarch_cpu_post_init(Object *obj)
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object_property_add_bool(obj, "lasx", loongarch_get_lasx,
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loongarch_set_lasx);
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}
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+
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+ if (kvm_enabled()) {
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+ object_property_add_bool(obj, "pmu", loongarch_get_pmu,
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+ loongarch_set_pmu);
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+ if (FIELD_EX32(cpu->env.cpucfg[6], CPUCFG6, PMP)) {
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+ uint32_t value = 4;
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+ object_property_add(obj, "pmnum", "uint32",
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+ loongarch_get_pmnum,
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+ loongarch_set_pmnum, NULL,
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+ (void *)&value);
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+ }
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+ }
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}
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static void loongarch_cpu_init(Object *obj)
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diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
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index 4749d41c8c..80cad24fa1 100644
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--- a/target/loongarch/cpu.h
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+++ b/target/loongarch/cpu.h
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@@ -186,6 +186,8 @@ FIELD(CPUCFG6, PMNUM, 4, 4)
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FIELD(CPUCFG6, PMBITS, 8, 6)
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FIELD(CPUCFG6, UPM, 14, 1)
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+#define PMNUM_MAX 16
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+
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/* cpucfg[16] bits */
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FIELD(CPUCFG16, L1_IUPRE, 0, 1)
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FIELD(CPUCFG16, L1_IUUNIFY, 1, 1)
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diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
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index 49d02076ad..5dda631b2b 100644
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--- a/target/loongarch/kvm/kvm.c
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+++ b/target/loongarch/kvm/kvm.c
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@@ -573,6 +573,53 @@ static int kvm_check_cpucfg2(CPUState *cs)
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return ret;
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}
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+static int kvm_check_cpucfg6(CPUState *cs)
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+{
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+ int ret;
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+ uint64_t val;
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+ struct kvm_device_attr attr = {
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+ .group = KVM_LOONGARCH_VCPU_CPUCFG,
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+ .attr = 6,
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+ .addr = (uint64_t)&val,
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+ };
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+ LoongArchCPU *cpu = LOONGARCH_CPU(cs);
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+ CPULoongArchState *env = &cpu->env;
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+
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+ ret = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, &attr);
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+ if (!ret) {
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+ kvm_vcpu_ioctl(cs, KVM_GET_DEVICE_ATTR, &attr);
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+
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+ if (FIELD_EX32(env->cpucfg[6], CPUCFG6, PMP)) {
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+ /* Check PMP */
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+ if (!FIELD_EX32(val, CPUCFG6, PMP)) {
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+ error_report("'pmu' feature not supported by KVM on this host"
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+ " Please disable 'pmu' with "
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+ "'... -cpu XXX,pmu=off ...'\n");
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+ exit(EXIT_FAILURE);
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+ }
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+ /* Check PMNUM */
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+ int guest_pmnum = FIELD_EX32(env->cpucfg[6], CPUCFG6, PMNUM);
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+ int host_pmnum = FIELD_EX32(val, CPUCFG6, PMNUM);
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+ if (guest_pmnum > host_pmnum){
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+ warn_report("The guest pmnum %d larger than KVM support %d\n",
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+ guest_pmnum, host_pmnum);
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+ env->cpucfg[6] = FIELD_DP32(env->cpucfg[6], CPUCFG6,
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+ PMNUM, host_pmnum);
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+ }
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+ /* Check PMBITS */
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+ int guest_pmbits = FIELD_EX32(env->cpucfg[6], CPUCFG6, PMBITS);
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+ int host_pmbits = FIELD_EX32(val, CPUCFG6, PMBITS);
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+ if (guest_pmbits != host_pmbits) {
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+ warn_report("The host not support PMBITS %d\n", guest_pmbits);
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+ env->cpucfg[6] = FIELD_DP32(env->cpucfg[6], CPUCFG6,
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+ PMBITS, host_pmbits);
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+ }
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+ }
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+ }
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+
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+ return ret;
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+}
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+
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static int kvm_loongarch_put_cpucfg(CPUState *cs)
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{
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int i, ret = 0;
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@@ -586,7 +633,13 @@ static int kvm_loongarch_put_cpucfg(CPUState *cs)
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if (ret) {
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return ret;
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}
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- }
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+ }
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+ if (i == 6) {
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+ ret = kvm_check_cpucfg6(cs);
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+ if (ret) {
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+ return ret;
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+ }
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+ }
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val = env->cpucfg[i];
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ret = kvm_set_one_reg(cs, KVM_IOC_CPUCFG(i), &val);
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if (ret < 0) {
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diff --git a/target/loongarch/loongarch-qmp-cmds.c b/target/loongarch/loongarch-qmp-cmds.c
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index 645672ff59..2612f43de9 100644
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--- a/target/loongarch/loongarch-qmp-cmds.c
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+++ b/target/loongarch/loongarch-qmp-cmds.c
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@@ -42,7 +42,7 @@ CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp)
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}
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static const char *cpu_model_advertised_features[] = {
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- "lsx", "lasx", NULL
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+ "lsx", "lasx", "pmu", "pmnum", NULL
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};
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CpuModelExpansionInfo *qmp_query_cpu_model_expansion(CpuModelExpansionType type,
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--
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2.33.0
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