- fix compile error on loongarch
- hw/loongarch: fix cpu hotplug reset
- hw/loongarch/boot: Use warn_report when no kernel filename
- hw/loongarch: clean code
- hw/loongarch: Add KVM pch msi device support
- hw/loongarch: Add KVM pch pic device support
- hw/loongarch: Add KVM extioi device support
- hw/loongarch: Add KVM IPI device support
- hw/loongarch/virt: Update the ACPI table for hotplug cpu
- hw/loongarch/virt: Add basic CPU plug support
- hw/loongarch/virt: Add CPU topology support
- accel/kvm/kvm-all: Fixes the missing break in vCPU unpark logic
- gdbstub: Add helper function to unregister GDB register space
- physmem: Add helper function to destroy CPU AddressSpace
- hw/acpi: Update CPUs AML with cpu-(ctrl)dev change
- hw/acpi: Update ACPI GED framework to support vCPU Hotplug
- hw/acpi: Move CPU ctrl-dev MMIO region len macro to common header file
- accel/kvm: Extract common KVM vCPU {creation,parking} code
- target/loongarch: Add steal time support on migration
- linux-headers: loongarch: Add kvm_para.h and unistd_64.h
- target/loongarch/kvm: Implement LoongArch PMU extension
- target/loongarch: Implement lbt registers save/restore function
- target/loongarch: Add loongson binary translation feature
- sync loongarch linux-headers
- target/loongarch: Avoid bits shift exceeding width of bool type
- target/loongarch: Use explicit little-endian LD/ST API
- target/loongarch: fix -Werror=maybe-uninitialized false-positive
- target/loongarch: Support QMP dump-guest-memory
- target/loongarch/kvm: Add vCPU reset function
- target/loongarch: Add compatible support about VM reboot
- target/loongarch: Fix cpu_reset set wrong CSR_CRMD
- target/loongarch: Set CSR_PRCFG1 and CSR_PRCFG2 values
- target/loongarch: Remove avail_64 in trans_srai_w() and simplify it
- target/loongarch/kvm: Add software breakpoint support
- target/loongarch: Add loongarch vector property unconditionally
- target/loongarch/kvm: Fix VM recovery from disk failures
- target/loongarch: Put cpucfg operation before CSR register
- target/loongarch: Add TCG macro in structure CPUArchState
- hw/arm/virt-acpi-build.c: Migrate SPCR creation to common location
- hw/loongarch/virt: Add FDT table support with acpi ged pm register
- hw/loongarch/virt: Add description for virt machine type
- hw/loongarch: Add acpi SPCR table support
- hw/loongarch: virt: pass random seed to fdt
- hw/loongarch: virt: support up to 4 serial ports
- hw/loongarch: Remove default enable with VIRTIO_VGA device
- hw/loongarch: Fix length for lowram in ACPI SRAT
- hw/loongarch/virt: Remove unused assignment
- hw/loongarch: Change the tpm support by default
- hw/loongarch/boot.c: fix out-of-bound reading
- hw/loongarch/virt: Use MemTxAttrs interface for misc ops
- tests/libqos: Add loongarch virt machine node
- hw/loongarch: Remove minimum and default memory size
- hw/loongarch: Refine system dram memory region
- hw/loongarch: Refine fwcfg memory map
- hw/loongarch: Refine fadt memory table for numa memory
- hw/loongarch: Refine acpi srat table for numa memory
- hw/loongarch: Add VM mode in IOCSR feature register in kvm mode
- hw/loongarch: Refine default numa id calculation
- hw/loongarch: Rename LoongArchMachineState with LoongArchVirtMachineState
- hw/loongarch: Rename LOONGARCH_MACHINE with LOONGARCH_VIRT_MACHINE
- hw/loongarch: move memory map to boot.c
- loongarch: switch boards to "default y"
- hw/loongarch: Add cells missing from rtc node
- hw/loongarch: Add cells missing from uart node
- hw/loongarch: fdt remove unused irqchip node
- hw/loongarch: fdt adds pcie irq_map node
- hw/loongarch: fdt adds pch_msi Controller
- hw/loongarch: fdt adds pch_pic Controller
- hw/loongarch: fdt adds Extend I/O Interrupt Controller
- hw/loongarch: fdt adds cpu interrupt controller node
- hw/loongarch: Init efi_fdt table
- hw/loongarch: Init efi_initrd table
- hw/loongarch: Init efi_boot_memmap table
- hw/loongarch: Init efi_system_table
- hw/loongarch: Add init_cmdline
- hw/loongarch: Add slave cpu boot_code
- hw/loongarch: Add load initrd
- hw/loongarch: Move boot functions to boot.c
Signed-off-by: Xianglai Li <lixianglai@loongson.cn>
(cherry picked from commit 04ca9e6c8ff19630116722240ae0136cea831c5c)
234 lines
8.0 KiB
Diff
234 lines
8.0 KiB
Diff
From b87b4782e8147fd481becd946ca909edaaa58b41 Mon Sep 17 00:00:00 2001
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From: Bibo Mao <maobibo@loongson.cn>
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Date: Wed, 18 Sep 2024 16:23:15 +0800
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Subject: [PATCH 59/78] target/loongarch/kvm: Implement LoongArch PMU extension
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Implement PMU extension for LoongArch kvm mode. Use OnOffAuto type
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variable pmu to check the PMU feature. If the PMU Feature is not supported
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with KVM host, it reports error if there is pmu=on command line.
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If there is no any command line about pmu parameter, it checks whether
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KVM host supports the PMU Feature and set the corresponding value in cpucfg.
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This patch is based on lbt patch located at
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https://lore.kernel.org/qemu-devel/20240904061859.86615-1-maobibo@loongson.cn
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Co-developed-by: Song Gao <gaosong@loongson.cn>
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Signed-off-by: Bibo Mao <maobibo@loongson.cn>
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Reviewed-by: Song Gao <gaosong@loongson.cn>
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Message-Id: <20240918082315.2345034-1-maobibo@loongson.cn>
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Signed-off-by: Song Gao <gaosong@loongson.cn>
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Signed-off-by: Xianglai Li <lixianglai@loongson.cn>
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---
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target/loongarch/cpu.c | 63 +++++++--------------------
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target/loongarch/cpu.h | 2 +
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target/loongarch/kvm/kvm.c | 41 +++++++++++++++++
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target/loongarch/loongarch-qmp-cmds.c | 2 +-
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4 files changed, 59 insertions(+), 49 deletions(-)
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diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
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index a57067938d..2ee1d63989 100644
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--- a/target/loongarch/cpu.c
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+++ b/target/loongarch/cpu.c
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@@ -695,58 +695,28 @@ static void loongarch_set_lasx(Object *obj, bool value, Error **errp)
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}
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}
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-static bool loongarch_get_pmu(Object *obj, Error **errp)
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-{
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- LoongArchCPU *cpu = LOONGARCH_CPU(obj);
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-
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- return !!(FIELD_EX32(cpu->env.cpucfg[6], CPUCFG6, PMP));
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-}
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-
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-static void loongarch_set_pmu(Object *obj, bool value, Error **errp)
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-{
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- LoongArchCPU *cpu = LOONGARCH_CPU(obj);
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-
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- cpu->env.cpucfg[6] = FIELD_DP32(cpu->env.cpucfg[6], CPUCFG6, PMP, value);
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-}
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-
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-static void loongarch_get_pmnum(Object *obj, Visitor *v,
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- const char *name, void *opaque,
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- Error **errp)
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+static bool loongarch_get_lbt(Object *obj, Error **errp)
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{
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- LoongArchCPU *cpu = LOONGARCH_CPU(obj);
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- uint32_t value = FIELD_EX32(cpu->env.cpucfg[6], CPUCFG6, PMNUM);
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-
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- visit_type_uint32(v, name, &value, errp);
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+ return LOONGARCH_CPU(obj)->lbt != ON_OFF_AUTO_OFF;
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}
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-static void loongarch_set_pmnum(Object *obj, Visitor *v,
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- const char *name, void *opaque,
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- Error **errp)
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+static void loongarch_set_lbt(Object *obj, bool value, Error **errp)
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{
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LoongArchCPU *cpu = LOONGARCH_CPU(obj);
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- uint32_t *value= opaque;
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- if (!visit_type_uint32(v, name, value, errp)) {
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- return;
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- }
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- if ((*value <= PMNUM_MAX) && (*value > 0)) {
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- cpu->env.cpucfg[6] = FIELD_DP32(cpu->env.cpucfg[6], CPUCFG6, PMNUM, *value -1);
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- } else {
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- error_report("Performance counter number need be in [1- %d]\n", PMNUM_MAX);
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- exit(EXIT_FAILURE);
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- }
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+ cpu->lbt = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
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}
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-static bool loongarch_get_lbt(Object *obj, Error **errp)
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+static bool loongarch_get_pmu(Object *obj, Error **errp)
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{
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- return LOONGARCH_CPU(obj)->lbt != ON_OFF_AUTO_OFF;
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+ return LOONGARCH_CPU(obj)->pmu != ON_OFF_AUTO_OFF;
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}
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-static void loongarch_set_lbt(Object *obj, bool value, Error **errp)
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+static void loongarch_set_pmu(Object *obj, bool value, Error **errp)
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{
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LoongArchCPU *cpu = LOONGARCH_CPU(obj);
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- cpu->lbt = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
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+ cpu->pmu = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
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}
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void loongarch_cpu_post_init(Object *obj)
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@@ -759,21 +729,18 @@ void loongarch_cpu_post_init(Object *obj)
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loongarch_set_lasx);
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if (kvm_enabled()) {
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- object_property_add_bool(obj, "pmu", loongarch_get_pmu,
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- loongarch_set_pmu);
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- if (FIELD_EX32(cpu->env.cpucfg[6], CPUCFG6, PMP)) {
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- uint32_t value = 4;
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- object_property_add(obj, "pmnum", "uint32",
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- loongarch_get_pmnum,
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- loongarch_set_pmnum, NULL,
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- (void *)&value);
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- }
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-
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cpu->lbt = ON_OFF_AUTO_AUTO;
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object_property_add_bool(obj, "lbt", loongarch_get_lbt,
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loongarch_set_lbt);
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object_property_set_description(obj, "lbt",
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"Set off to disable Binary Tranlation.");
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+
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+ cpu->pmu = ON_OFF_AUTO_AUTO;
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+ object_property_add_bool(obj, "pmu", loongarch_get_pmu,
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+ loongarch_set_pmu);
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+ object_property_set_description(obj, "pmu",
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+ "Set off to performance monitor unit.");
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+
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} else {
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cpu->lbt = ON_OFF_AUTO_OFF;
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}
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diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
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index 2f8c5cf2dd..8ff00d17e1 100644
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--- a/target/loongarch/cpu.h
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+++ b/target/loongarch/cpu.h
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@@ -289,6 +289,7 @@ typedef struct LoongArchTLB LoongArchTLB;
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enum loongarch_features {
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LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */
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+ LOONGARCH_FEATURE_PMU,
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};
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typedef struct LoongArchBT {
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@@ -407,6 +408,7 @@ struct ArchCPU {
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QEMUTimer timer;
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uint32_t phy_id;
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OnOffAuto lbt;
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+ OnOffAuto pmu;
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/* 'compatible' string for this CPU for Linux device trees */
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const char *dtb_compatible;
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diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
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index 118f66f742..8b0f86a201 100644
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--- a/target/loongarch/kvm/kvm.c
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+++ b/target/loongarch/kvm/kvm.c
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@@ -870,9 +870,18 @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature)
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attr.attr = KVM_LOONGARCH_VM_FEAT_MIPSBT;
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ret |= kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr);
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return (ret == 0);
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+
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+ case LOONGARCH_FEATURE_PMU:
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+ attr.group = KVM_LOONGARCH_VM_FEAT_CTRL;
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+ attr.attr = KVM_LOONGARCH_VM_FEAT_PMU;
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+ ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr);
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+ return (ret == 0);
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+
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default:
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return false;
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}
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+
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+ return false;
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}
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static int kvm_cpu_check_lbt(CPUState *cs, Error **errp)
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@@ -896,6 +905,32 @@ static int kvm_cpu_check_lbt(CPUState *cs, Error **errp)
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return 0;
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}
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+static int kvm_cpu_check_pmu(CPUState *cs, Error **errp)
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+{
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+ LoongArchCPU *cpu = LOONGARCH_CPU(cs);
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+ CPULoongArchState *env = cpu_env(cs);
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+ bool kvm_supported;
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+
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+ kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_PMU);
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+ if (cpu->pmu == ON_OFF_AUTO_ON) {
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+ if (!kvm_supported) {
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+ error_setg(errp, "'pmu' feature not supported by KVM on the host");
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+ return -ENOTSUP;
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+ }
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+ } else if (cpu->pmu != ON_OFF_AUTO_AUTO) {
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+ /* disable pmu if ON_OFF_AUTO_OFF is set */
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+ kvm_supported = false;
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+ }
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+
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+ if (kvm_supported) {
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+ env->cpucfg[6] = FIELD_DP32(env->cpucfg[6], CPUCFG6, PMP, 1);
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+ env->cpucfg[6] = FIELD_DP32(env->cpucfg[6], CPUCFG6, PMNUM, 3);
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+ env->cpucfg[6] = FIELD_DP32(env->cpucfg[6], CPUCFG6, PMBITS, 63);
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+ env->cpucfg[6] = FIELD_DP32(env->cpucfg[6], CPUCFG6, UPM, 1);
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+ }
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+ return 0;
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+}
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+
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int kvm_arch_init_vcpu(CPUState *cs)
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{
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uint64_t val;
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@@ -913,6 +948,12 @@ int kvm_arch_init_vcpu(CPUState *cs)
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if (ret < 0) {
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error_report_err(local_err);
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}
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+
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+ ret = kvm_cpu_check_pmu(cs, &local_err);
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+ if (ret < 0) {
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+ error_report_err(local_err);
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+ }
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+
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return ret;
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}
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diff --git a/target/loongarch/loongarch-qmp-cmds.c b/target/loongarch/loongarch-qmp-cmds.c
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index 644b528824..dc78a3ffa2 100644
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--- a/target/loongarch/loongarch-qmp-cmds.c
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+++ b/target/loongarch/loongarch-qmp-cmds.c
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@@ -42,7 +42,7 @@ CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp)
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}
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static const char *cpu_model_advertised_features[] = {
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- "lsx", "lasx", "lbt", "pmu", "pmnum", NULL
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+ "lsx", "lasx", "lbt", "pmu", NULL
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};
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CpuModelExpansionInfo *qmp_query_cpu_model_expansion(CpuModelExpansionType type,
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--
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2.39.1
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