Chen Qun 0532b39a49 i386: cache passthrough: Update Intel CPUID4.EAX[25:14] based on vCPU topo
On Intel target, when host cache passthrough is disabled we will
emulate the guest caches with default values and initialize the
shared cpu list of the caches based on vCPU topology. However when
host cache passthrough is enabled, the shared cpu list is consistent
with host regardless what the vCPU topology is.

For example, when cache passthrough is enabled, running a guest
with vThreads=1 on a host with pThreads=2, we will get that there
are every *two* logical vCPUs sharing a L1/L2 cache, which is not
consistent with the vCPU topology (vThreads=1).

So let's reinitialize BITs[25:14] of Intel CPUID 4 based on the
actual vCPU topology instead of host pCPU topology.

Signed-off-by: Jian Wang <wangjian161@huawei.com>
Signed-off-by: Yanan Wang <wangyanan55@huawei.com>
2022-03-19 14:42:31 +08:00
2019-11-06 19:50:55 +08:00
2019-09-30 11:15:46 -04:00
2019-09-30 11:15:46 -04:00
2022-03-19 14:31:23 +08:00
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