- fix compile error on loongarch
- hw/loongarch: fix cpu hotplug reset
- hw/loongarch/boot: Use warn_report when no kernel filename
- hw/loongarch: clean code
- hw/loongarch: Add KVM pch msi device support
- hw/loongarch: Add KVM pch pic device support
- hw/loongarch: Add KVM extioi device support
- hw/loongarch: Add KVM IPI device support
- hw/loongarch/virt: Update the ACPI table for hotplug cpu
- hw/loongarch/virt: Add basic CPU plug support
- hw/loongarch/virt: Add CPU topology support
- accel/kvm/kvm-all: Fixes the missing break in vCPU unpark logic
- gdbstub: Add helper function to unregister GDB register space
- physmem: Add helper function to destroy CPU AddressSpace
- hw/acpi: Update CPUs AML with cpu-(ctrl)dev change
- hw/acpi: Update ACPI GED framework to support vCPU Hotplug
- hw/acpi: Move CPU ctrl-dev MMIO region len macro to common header file
- accel/kvm: Extract common KVM vCPU {creation,parking} code
- target/loongarch: Add steal time support on migration
- linux-headers: loongarch: Add kvm_para.h and unistd_64.h
- target/loongarch/kvm: Implement LoongArch PMU extension
- target/loongarch: Implement lbt registers save/restore function
- target/loongarch: Add loongson binary translation feature
- sync loongarch linux-headers
- target/loongarch: Avoid bits shift exceeding width of bool type
- target/loongarch: Use explicit little-endian LD/ST API
- target/loongarch: fix -Werror=maybe-uninitialized false-positive
- target/loongarch: Support QMP dump-guest-memory
- target/loongarch/kvm: Add vCPU reset function
- target/loongarch: Add compatible support about VM reboot
- target/loongarch: Fix cpu_reset set wrong CSR_CRMD
- target/loongarch: Set CSR_PRCFG1 and CSR_PRCFG2 values
- target/loongarch: Remove avail_64 in trans_srai_w() and simplify it
- target/loongarch/kvm: Add software breakpoint support
- target/loongarch: Add loongarch vector property unconditionally
- target/loongarch/kvm: Fix VM recovery from disk failures
- target/loongarch: Put cpucfg operation before CSR register
- target/loongarch: Add TCG macro in structure CPUArchState
- hw/arm/virt-acpi-build.c: Migrate SPCR creation to common location
- hw/loongarch/virt: Add FDT table support with acpi ged pm register
- hw/loongarch/virt: Add description for virt machine type
- hw/loongarch: Add acpi SPCR table support
- hw/loongarch: virt: pass random seed to fdt
- hw/loongarch: virt: support up to 4 serial ports
- hw/loongarch: Remove default enable with VIRTIO_VGA device
- hw/loongarch: Fix length for lowram in ACPI SRAT
- hw/loongarch/virt: Remove unused assignment
- hw/loongarch: Change the tpm support by default
- hw/loongarch/boot.c: fix out-of-bound reading
- hw/loongarch/virt: Use MemTxAttrs interface for misc ops
- tests/libqos: Add loongarch virt machine node
- hw/loongarch: Remove minimum and default memory size
- hw/loongarch: Refine system dram memory region
- hw/loongarch: Refine fwcfg memory map
- hw/loongarch: Refine fadt memory table for numa memory
- hw/loongarch: Refine acpi srat table for numa memory
- hw/loongarch: Add VM mode in IOCSR feature register in kvm mode
- hw/loongarch: Refine default numa id calculation
- hw/loongarch: Rename LoongArchMachineState with LoongArchVirtMachineState
- hw/loongarch: Rename LOONGARCH_MACHINE with LOONGARCH_VIRT_MACHINE
- hw/loongarch: move memory map to boot.c
- loongarch: switch boards to "default y"
- hw/loongarch: Add cells missing from rtc node
- hw/loongarch: Add cells missing from uart node
- hw/loongarch: fdt remove unused irqchip node
- hw/loongarch: fdt adds pcie irq_map node
- hw/loongarch: fdt adds pch_msi Controller
- hw/loongarch: fdt adds pch_pic Controller
- hw/loongarch: fdt adds Extend I/O Interrupt Controller
- hw/loongarch: fdt adds cpu interrupt controller node
- hw/loongarch: Init efi_fdt table
- hw/loongarch: Init efi_initrd table
- hw/loongarch: Init efi_boot_memmap table
- hw/loongarch: Init efi_system_table
- hw/loongarch: Add init_cmdline
- hw/loongarch: Add slave cpu boot_code
- hw/loongarch: Add load initrd
- hw/loongarch: Move boot functions to boot.c
Signed-off-by: Xianglai Li <lixianglai@loongson.cn>
(cherry picked from commit 04ca9e6c8ff19630116722240ae0136cea831c5c)
107 lines
3.8 KiB
Diff
107 lines
3.8 KiB
Diff
From d39247ec5d4ef52a4b9422aaecccc284cbd1a5dd Mon Sep 17 00:00:00 2001
|
|
From: Bibo Mao <maobibo@loongson.cn>
|
|
Date: Wed, 15 May 2024 17:39:23 +0800
|
|
Subject: [PATCH 24/78] hw/loongarch: Refine fadt memory table for numa memory
|
|
|
|
One LoongArch virt machine platform, there is limitation for memory
|
|
map information. The minimum memory size is 256M and minimum memory
|
|
size for numa node0 is 256M also. With qemu numa qtest, it is possible
|
|
that memory size of numa node0 is 128M.
|
|
|
|
Limitations for minimum memory size for both total memory and numa
|
|
node0 is removed for fadt numa memory table creation.
|
|
|
|
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
|
|
Reviewed-by: Song Gao <gaosong@loongson.cn>
|
|
Message-Id: <20240515093927.3453674-3-maobibo@loongson.cn>
|
|
Signed-off-by: Song Gao <gaosong@loongson.cn>
|
|
Signed-off-by: Xianglai Li <lixianglai@loongson.cn>
|
|
---
|
|
hw/loongarch/virt.c | 46 ++++++++++++++++++++++++++++++++++++++++++---
|
|
1 file changed, 43 insertions(+), 3 deletions(-)
|
|
|
|
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
|
|
index c3514f9293..31a2598e7c 100644
|
|
--- a/hw/loongarch/virt.c
|
|
+++ b/hw/loongarch/virt.c
|
|
@@ -502,6 +502,48 @@ static void fdt_add_memory_node(MachineState *ms,
|
|
g_free(nodename);
|
|
}
|
|
|
|
+static void fdt_add_memory_nodes(MachineState *ms)
|
|
+{
|
|
+ hwaddr base, size, ram_size, gap;
|
|
+ int i, nb_numa_nodes, nodes;
|
|
+ NodeInfo *numa_info;
|
|
+
|
|
+ ram_size = ms->ram_size;
|
|
+ base = VIRT_LOWMEM_BASE;
|
|
+ gap = VIRT_LOWMEM_SIZE;
|
|
+ nodes = nb_numa_nodes = ms->numa_state->num_nodes;
|
|
+ numa_info = ms->numa_state->nodes;
|
|
+ if (!nodes) {
|
|
+ nodes = 1;
|
|
+ }
|
|
+
|
|
+ for (i = 0; i < nodes; i++) {
|
|
+ if (nb_numa_nodes) {
|
|
+ size = numa_info[i].node_mem;
|
|
+ } else {
|
|
+ size = ram_size;
|
|
+ }
|
|
+
|
|
+ /*
|
|
+ * memory for the node splited into two part
|
|
+ * lowram: [base, +gap)
|
|
+ * highram: [VIRT_HIGHMEM_BASE, +(len - gap))
|
|
+ */
|
|
+ if (size >= gap) {
|
|
+ fdt_add_memory_node(ms, base, gap, i);
|
|
+ size -= gap;
|
|
+ base = VIRT_HIGHMEM_BASE;
|
|
+ gap = ram_size - VIRT_LOWMEM_SIZE;
|
|
+ }
|
|
+
|
|
+ if (size) {
|
|
+ fdt_add_memory_node(ms, base, size, i);
|
|
+ base += size;
|
|
+ gap -= size;
|
|
+ }
|
|
+ }
|
|
+}
|
|
+
|
|
static void virt_build_smbios(LoongArchVirtMachineState *lvms)
|
|
{
|
|
MachineState *ms = MACHINE(lvms);
|
|
@@ -1008,10 +1050,10 @@ static void virt_init(MachineState *machine)
|
|
lacpu->phy_id = machine->possible_cpus->cpus[i].arch_id;
|
|
}
|
|
fdt_add_cpu_nodes(lvms);
|
|
+ fdt_add_memory_nodes(machine);
|
|
|
|
/* Node0 memory */
|
|
memmap_add_entry(VIRT_LOWMEM_BASE, VIRT_LOWMEM_SIZE, 1);
|
|
- fdt_add_memory_node(machine, VIRT_LOWMEM_BASE, VIRT_LOWMEM_SIZE, 0);
|
|
memory_region_init_alias(&lvms->lowmem, NULL, "loongarch.node0.lowram",
|
|
machine->ram, offset, VIRT_LOWMEM_SIZE);
|
|
memory_region_add_subregion(address_space_mem, phyAddr, &lvms->lowmem);
|
|
@@ -1025,7 +1067,6 @@ static void virt_init(MachineState *machine)
|
|
}
|
|
phyAddr = VIRT_HIGHMEM_BASE;
|
|
memmap_add_entry(phyAddr, highram_size, 1);
|
|
- fdt_add_memory_node(machine, phyAddr, highram_size, 0);
|
|
memory_region_init_alias(&lvms->highmem, NULL, "loongarch.node0.highram",
|
|
machine->ram, offset, highram_size);
|
|
memory_region_add_subregion(address_space_mem, phyAddr, &lvms->highmem);
|
|
@@ -1041,7 +1082,6 @@ static void virt_init(MachineState *machine)
|
|
offset, numa_info[i].node_mem);
|
|
memory_region_add_subregion(address_space_mem, phyAddr, nodemem);
|
|
memmap_add_entry(phyAddr, numa_info[i].node_mem, 1);
|
|
- fdt_add_memory_node(machine, phyAddr, numa_info[i].node_mem, i);
|
|
offset += numa_info[i].node_mem;
|
|
phyAddr += numa_info[i].node_mem;
|
|
}
|
|
--
|
|
2.39.1
|
|
|