Denverton is the Atom Processor of Intel Harrisonville platform. For more information: https://ark.intel.com/content/www/us/en/ark/products/\ codename/63508/denverton.html Signed-off-by: Tao Xu <tao3.xu@intel.com> Message-Id: <20190718073405.28301-1-tao3.xu@intel.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
80 lines
3.2 KiB
Diff
80 lines
3.2 KiB
Diff
From 7d602cefa04f4992d913683c1a5826abc4806e41 Mon Sep 17 00:00:00 2001
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From: Tao Xu <tao3.xu@intel.com>
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Date: Thu, 18 Jul 2019 15:34:05 +0800
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Subject: [PATCH] target/i386: Introduce Denverton CPU model
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Denverton is the Atom Processor of Intel Harrisonville platform.
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For more information:
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https://ark.intel.com/content/www/us/en/ark/products/\
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codename/63508/denverton.html
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Signed-off-by: Tao Xu <tao3.xu@intel.com>
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Message-Id: <20190718073405.28301-1-tao3.xu@intel.com>
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Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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---
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target/i386/cpu.c | 47 +++++++++++++++++++++++++++++++++++++++++++++++
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1 file changed, 47 insertions(+)
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diff --git a/target/i386/cpu.c b/target/i386/cpu.c
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index 5af4fca350..d3742ef4ac 100644
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--- a/target/i386/cpu.c
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+++ b/target/i386/cpu.c
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@@ -2552,6 +2552,53 @@ static X86CPUDefinition builtin_x86_defs[] = {
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.xlevel = 0x80000008,
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.model_id = "Intel Xeon Processor (Icelake)",
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},
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+ {
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+ .name = "Denverton",
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+ .level = 21,
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+ .vendor = CPUID_VENDOR_INTEL,
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+ .family = 6,
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+ .model = 95,
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+ .stepping = 1,
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+ .features[FEAT_1_EDX] =
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+ CPUID_FP87 | CPUID_VME | CPUID_DE | CPUID_PSE | CPUID_TSC |
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+ CPUID_MSR | CPUID_PAE | CPUID_MCE | CPUID_CX8 | CPUID_APIC |
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+ CPUID_SEP | CPUID_MTRR | CPUID_PGE | CPUID_MCA | CPUID_CMOV |
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+ CPUID_PAT | CPUID_PSE36 | CPUID_CLFLUSH | CPUID_MMX | CPUID_FXSR |
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+ CPUID_SSE | CPUID_SSE2,
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+ .features[FEAT_1_ECX] =
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+ CPUID_EXT_SSE3 | CPUID_EXT_PCLMULQDQ | CPUID_EXT_MONITOR |
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+ CPUID_EXT_SSSE3 | CPUID_EXT_CX16 | CPUID_EXT_SSE41 |
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+ CPUID_EXT_SSE42 | CPUID_EXT_X2APIC | CPUID_EXT_MOVBE |
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+ CPUID_EXT_POPCNT | CPUID_EXT_TSC_DEADLINE_TIMER |
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+ CPUID_EXT_AES | CPUID_EXT_XSAVE | CPUID_EXT_RDRAND,
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+ .features[FEAT_8000_0001_EDX] =
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+ CPUID_EXT2_SYSCALL | CPUID_EXT2_NX | CPUID_EXT2_PDPE1GB |
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+ CPUID_EXT2_RDTSCP | CPUID_EXT2_LM,
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+ .features[FEAT_8000_0001_ECX] =
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+ CPUID_EXT3_LAHF_LM | CPUID_EXT3_3DNOWPREFETCH,
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+ .features[FEAT_7_0_EBX] =
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+ CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_SMEP | CPUID_7_0_EBX_ERMS |
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+ CPUID_7_0_EBX_MPX | CPUID_7_0_EBX_RDSEED | CPUID_7_0_EBX_SMAP |
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+ CPUID_7_0_EBX_CLFLUSHOPT | CPUID_7_0_EBX_SHA_NI,
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+ .features[FEAT_7_0_EDX] =
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+ CPUID_7_0_EDX_SPEC_CTRL | CPUID_7_0_EDX_ARCH_CAPABILITIES |
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+ CPUID_7_0_EDX_SPEC_CTRL_SSBD,
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+ /*
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+ * Missing: XSAVES (not supported by some Linux versions,
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+ * including v4.1 to v4.12).
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+ * KVM doesn't yet expose any XSAVES state save component,
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+ * and the only one defined in Skylake (processor tracing)
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+ * probably will block migration anyway.
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+ */
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+ .features[FEAT_XSAVE] =
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+ CPUID_XSAVE_XSAVEOPT | CPUID_XSAVE_XSAVEC | CPUID_XSAVE_XGETBV1,
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+ .features[FEAT_6_EAX] =
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+ CPUID_6_EAX_ARAT,
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+ .features[FEAT_ARCH_CAPABILITIES] =
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+ MSR_ARCH_CAP_RDCL_NO | MSR_ARCH_CAP_SKIP_L1DFL_VMENTRY,
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+ .xlevel = 0x80000008,
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+ .model_id = "Intel Atom Processor (Denverton)",
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+ },
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{
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.name = "Snowridge",
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.level = 27,
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--
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2.27.0
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