3c9cc492f2
The driver can query some bits in SMMUv3 IDR5 to learn which translation granules are supported. Arm recommends that SMMUv3 implementations support at least 4K and 64K granules. But in the vSMMUv3, there seems to be no reason not to support 16K translation granule. In addition, if 16K is not supported, vSVA will failed to be enabled in the future for 16K guest kernel. So it'd better to support it. Signed-off-by: Kunkun Jiang <jiangkunkun@huawei.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Tested-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
50 lines
1.9 KiB
Diff
50 lines
1.9 KiB
Diff
From 008dec30dea19950ff48a34c54441d065c1f228b Mon Sep 17 00:00:00 2001
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From: Kunkun Jiang <jiangkunkun@huawei.com>
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Date: Wed, 31 Mar 2021 14:47:13 +0800
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Subject: [PATCH] hw/arm/smmuv3: Support 16K translation granule
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The driver can query some bits in SMMUv3 IDR5 to learn which
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translation granules are supported. Arm recommends that SMMUv3
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implementations support at least 4K and 64K granules. But in
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the vSMMUv3, there seems to be no reason not to support 16K
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translation granule. In addition, if 16K is not supported,
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vSVA will failed to be enabled in the future for 16K guest
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kernel. So it'd better to support it.
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Signed-off-by: Kunkun Jiang <jiangkunkun@huawei.com>
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Reviewed-by: Eric Auger <eric.auger@redhat.com>
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Tested-by: Eric Auger <eric.auger@redhat.com>
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Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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---
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hw/arm/smmuv3.c | 6 ++++--
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1 file changed, 4 insertions(+), 2 deletions(-)
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diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
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index e96d5beb9a..7911944c59 100644
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--- a/hw/arm/smmuv3.c
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+++ b/hw/arm/smmuv3.c
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@@ -254,8 +254,9 @@ static void smmuv3_init_regs(SMMUv3State *s)
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s->idr[1] = FIELD_DP32(s->idr[1], IDR1, EVENTQS, SMMU_EVENTQS);
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s->idr[1] = FIELD_DP32(s->idr[1], IDR1, CMDQS, SMMU_CMDQS);
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- /* 4K and 64K granule support */
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+ /* 4K, 16K and 64K granule support */
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s->idr[5] = FIELD_DP32(s->idr[5], IDR5, GRAN4K, 1);
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+ s->idr[5] = FIELD_DP32(s->idr[5], IDR5, GRAN16K, 1);
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s->idr[5] = FIELD_DP32(s->idr[5], IDR5, GRAN64K, 1);
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s->idr[5] = FIELD_DP32(s->idr[5], IDR5, OAS, SMMU_IDR5_OAS); /* 44 bits */
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@@ -480,7 +481,8 @@ static int decode_cd(SMMUTransCfg *cfg, CD *cd, SMMUEventInfo *event)
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tg = CD_TG(cd, i);
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tt->granule_sz = tg2granule(tg, i);
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- if ((tt->granule_sz != 12 && tt->granule_sz != 16) || CD_ENDI(cd)) {
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+ if ((tt->granule_sz != 12 && tt->granule_sz != 14 &&
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+ tt->granule_sz != 16) || CD_ENDI(cd)) {
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goto bad_cd;
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}
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--
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2.27.0
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