5636aff5b1
- target/i386: csv: Support inject secret for CSV3 guest only if the extension is enabled
- target/i386: csv: Support load kernel hashes for CSV3 guest only if the extension is enabled
- target/i386: csv: Request to set private memory of CSV3 guest if the extension is enabled
- target/i386: kvm: Support to get and enable extensions for Hygon CoCo guest
- qapi/qom,target/i386: csv-guest: Introduce secret-header-file=str and secret-file=str options
- bakcend: VirtCCA:resolve hugepage memory waste issue in vhost-user scenario
- parallels: fix ext_off assertion failure due to overflow
- backends/cryptodev-vhost-user: Fix local_error leaks
- hw/usb/hcd-ehci: Fix debug printf format string
- target/riscv/vector_helper.c: fix 'vmvr_v' memcpy endianess
- target/riscv/vector_helper.c: optimize loops in ldst helpers
- target/riscv/vector_helper.c: set vstart = 0 in GEN_VEXT_VSLIDEUP_VX()
- target/hexagon: don't look for static glib
- virtio-net: Fix network stall at the host side waiting for kick
- Add if condition to avoid assertion failed error in blockdev_init
- target/arm: Use float_status copy in sme_fmopa_s
- target/arm: take HSTR traps of cp15 accesses to EL2, not EL1
- target/arm: Reinstate "vfp" property on AArch32 CPUs
- target/i386/cpu: Fix notes for CPU models
- target/arm: LDAPR should honour SCTLR_ELx.nAA
- target/riscv: Avoid bad shift in riscv_cpu_do_interrupt()
- hvf: remove unused but set variable
- hw/misc/nrf51_rng: Don't use BIT_MASK() when we mean BIT()
- Avoid taking address of out-of-bounds array index
- target/arm: Fix VCMLA Dd, Dn, Dm[idx]
- target/arm: Fix UMOPA/UMOPS of 16-bit values
- target/arm: Fix SVE/SME gross MTE suppression checks
- target/arm: Fix nregs computation in do_{ld,st}_zpa
- crypto: fix error check on gcry_md_open
- Change vmstate_cpuhp_sts vmstateDescription version_id
- hw/pci: Remove unused pci_irq_pulse() method
- hw/intc: Don't clear pending bits on IRQ lowering
- target/arm: Drop user-only special case in sve_stN_r
- migration: Ensure vmstate_save() sets errp
- target/i386: fix hang when using slow path for ptw_setl
- contrib/plugins: add compat for g_memdup2
- hw/audio/hda: fix memory leak on audio setup
- crypto: perform runtime check for hash/hmac support in gcrypt
- target/arm: Fix incorrect aa64_tidcp1 feature check
- target/arm: fix exception syndrome for AArch32 bkpt insn
- target/arm: Don't get MDCR_EL2 in pmu_counter_enabled() before checking ARM_FEATURE_PMU
- linux-user: Print tid not pid with strace
- target/arm: Fix A64 scalar SQSHRN and SQRSHRN
- target/arm: Don't assert for 128-bit tile accesses when SVL is 128
- hw/timer/exynos4210_mct: fix possible int overflow
- target/arm: Avoid shifts by -1 in tszimm_shr() and tszimm_shl()
- hw/audio/virtio-snd: Always use little endian audio format
- target/riscv: Fix vcompress with rvv_ta_all_1s
- usb-hub: Fix handling port power control messages
Signed-off-by: Jiabo Feng <fengjiabo1@huawei.com>
(cherry picked from commit d4a20b24ff377fd07fcbf2b72eecaf07a3ac4cc0)
69 lines
2.6 KiB
Diff
69 lines
2.6 KiB
Diff
From 42a30e10bada5f034b0b2bfe8760482c972a4e61 Mon Sep 17 00:00:00 2001
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From: gubin <gubin_yewu@cmss.chinamobile.com>
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Date: Thu, 28 Nov 2024 14:14:21 +0800
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Subject: [PATCH] target/arm: Don't get MDCR_EL2 in pmu_counter_enabled()
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before checking ARM_FEATURE_PMU
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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cherry-pick from ac1d88e9e7ca0bed83e91e07ce6d0597f10cc77d
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It doesn't make sense to read the value of MDCR_EL2 on a non-A-profile
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CPU, and in fact if you try to do it we will assert:
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(assertion=0x5555565a8c70 "!arm_feature(env, ARM_FEATURE_M)", file=0x5555565a6e5c "../../target/arm/helper.c", line=12600, function=0x5555565a9560 <__PRETTY_FUNCTION__.0> "arm_security_space_below_el3") at ./assert/assert.c:101
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We might call pmu_counter_enabled() on an M-profile CPU (for example
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from the migration pre/post hooks in machine.c); this should always
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return false because these CPUs don't set ARM_FEATURE_PMU.
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Avoid the assertion by not calling arm_mdcr_el2_eff() before we
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have done the early return for "PMU not present".
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This fixes an assertion failure if you try to do a loadvm or
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savevm for an M-profile board.
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Cc: qemu-stable@nongnu.org
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Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2155
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Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
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Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
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Message-id: 20240208153346.970021-1-peter.maydell@linaro.org
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Signed-off-by: gubin <gubin_yewu@cmss.chinamobile.com>
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---
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target/arm/helper.c | 12 ++++++++++--
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1 file changed, 10 insertions(+), 2 deletions(-)
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diff --git a/target/arm/helper.c b/target/arm/helper.c
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index 793aa89cc6..762eb086c5 100644
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--- a/target/arm/helper.c
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+++ b/target/arm/helper.c
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@@ -1182,13 +1182,21 @@ static bool pmu_counter_enabled(CPUARMState *env, uint8_t counter)
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bool enabled, prohibited = false, filtered;
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bool secure = arm_is_secure(env);
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int el = arm_current_el(env);
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- uint64_t mdcr_el2 = arm_mdcr_el2_eff(env);
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- uint8_t hpmn = mdcr_el2 & MDCR_HPMN;
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+ uint64_t mdcr_el2;
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+ uint8_t hpmn;
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+ /*
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+ * We might be called for M-profile cores where MDCR_EL2 doesn't
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+ * exist and arm_mdcr_el2_eff() will assert, so this early-exit check
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+ * must be before we read that value.
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+ */
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if (!arm_feature(env, ARM_FEATURE_PMU)) {
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return false;
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}
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+ mdcr_el2 = arm_mdcr_el2_eff(env);
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+ hpmn = mdcr_el2 & MDCR_HPMN;
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+
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if (!arm_feature(env, ARM_FEATURE_EL2) ||
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(counter < hpmn || counter == 31)) {
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e = env->cp15.c9_pmcr & PMCRE;
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--
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2.41.0.windows.1
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