- fix compile error on loongarch
- hw/loongarch: fix cpu hotplug reset
- hw/loongarch/boot: Use warn_report when no kernel filename
- hw/loongarch: clean code
- hw/loongarch: Add KVM pch msi device support
- hw/loongarch: Add KVM pch pic device support
- hw/loongarch: Add KVM extioi device support
- hw/loongarch: Add KVM IPI device support
- hw/loongarch/virt: Update the ACPI table for hotplug cpu
- hw/loongarch/virt: Add basic CPU plug support
- hw/loongarch/virt: Add CPU topology support
- accel/kvm/kvm-all: Fixes the missing break in vCPU unpark logic
- gdbstub: Add helper function to unregister GDB register space
- physmem: Add helper function to destroy CPU AddressSpace
- hw/acpi: Update CPUs AML with cpu-(ctrl)dev change
- hw/acpi: Update ACPI GED framework to support vCPU Hotplug
- hw/acpi: Move CPU ctrl-dev MMIO region len macro to common header file
- accel/kvm: Extract common KVM vCPU {creation,parking} code
- target/loongarch: Add steal time support on migration
- linux-headers: loongarch: Add kvm_para.h and unistd_64.h
- target/loongarch/kvm: Implement LoongArch PMU extension
- target/loongarch: Implement lbt registers save/restore function
- target/loongarch: Add loongson binary translation feature
- sync loongarch linux-headers
- target/loongarch: Avoid bits shift exceeding width of bool type
- target/loongarch: Use explicit little-endian LD/ST API
- target/loongarch: fix -Werror=maybe-uninitialized false-positive
- target/loongarch: Support QMP dump-guest-memory
- target/loongarch/kvm: Add vCPU reset function
- target/loongarch: Add compatible support about VM reboot
- target/loongarch: Fix cpu_reset set wrong CSR_CRMD
- target/loongarch: Set CSR_PRCFG1 and CSR_PRCFG2 values
- target/loongarch: Remove avail_64 in trans_srai_w() and simplify it
- target/loongarch/kvm: Add software breakpoint support
- target/loongarch: Add loongarch vector property unconditionally
- target/loongarch/kvm: Fix VM recovery from disk failures
- target/loongarch: Put cpucfg operation before CSR register
- target/loongarch: Add TCG macro in structure CPUArchState
- hw/arm/virt-acpi-build.c: Migrate SPCR creation to common location
- hw/loongarch/virt: Add FDT table support with acpi ged pm register
- hw/loongarch/virt: Add description for virt machine type
- hw/loongarch: Add acpi SPCR table support
- hw/loongarch: virt: pass random seed to fdt
- hw/loongarch: virt: support up to 4 serial ports
- hw/loongarch: Remove default enable with VIRTIO_VGA device
- hw/loongarch: Fix length for lowram in ACPI SRAT
- hw/loongarch/virt: Remove unused assignment
- hw/loongarch: Change the tpm support by default
- hw/loongarch/boot.c: fix out-of-bound reading
- hw/loongarch/virt: Use MemTxAttrs interface for misc ops
- tests/libqos: Add loongarch virt machine node
- hw/loongarch: Remove minimum and default memory size
- hw/loongarch: Refine system dram memory region
- hw/loongarch: Refine fwcfg memory map
- hw/loongarch: Refine fadt memory table for numa memory
- hw/loongarch: Refine acpi srat table for numa memory
- hw/loongarch: Add VM mode in IOCSR feature register in kvm mode
- hw/loongarch: Refine default numa id calculation
- hw/loongarch: Rename LoongArchMachineState with LoongArchVirtMachineState
- hw/loongarch: Rename LOONGARCH_MACHINE with LOONGARCH_VIRT_MACHINE
- hw/loongarch: move memory map to boot.c
- loongarch: switch boards to "default y"
- hw/loongarch: Add cells missing from rtc node
- hw/loongarch: Add cells missing from uart node
- hw/loongarch: fdt remove unused irqchip node
- hw/loongarch: fdt adds pcie irq_map node
- hw/loongarch: fdt adds pch_msi Controller
- hw/loongarch: fdt adds pch_pic Controller
- hw/loongarch: fdt adds Extend I/O Interrupt Controller
- hw/loongarch: fdt adds cpu interrupt controller node
- hw/loongarch: Init efi_fdt table
- hw/loongarch: Init efi_initrd table
- hw/loongarch: Init efi_boot_memmap table
- hw/loongarch: Init efi_system_table
- hw/loongarch: Add init_cmdline
- hw/loongarch: Add slave cpu boot_code
- hw/loongarch: Add load initrd
- hw/loongarch: Move boot functions to boot.c
Signed-off-by: Xianglai Li <lixianglai@loongson.cn>
(cherry picked from commit 04ca9e6c8ff19630116722240ae0136cea831c5c)
109 lines
4.0 KiB
Diff
109 lines
4.0 KiB
Diff
From 1c9b7b7e76a63738721ac1092fdfff12ae87993a Mon Sep 17 00:00:00 2001
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From: Bibo Mao <maobibo@loongson.cn>
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Date: Wed, 15 May 2024 17:39:22 +0800
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Subject: [PATCH 23/78] hw/loongarch: Refine acpi srat table for numa memory
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One LoongArch virt machine platform, there is limitation for memory
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map information. The minimum memory size is 256M and minimum memory
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size for numa node0 is 256M also. With qemu numa qtest, it is possible
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that memory size of numa node0 is 128M.
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Limitations for minimum memory size for both total memory and numa
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node0 is removed for acpi srat table creation.
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Signed-off-by: Bibo Mao <maobibo@loongson.cn>
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Reviewed-by: Song Gao <gaosong@loongson.cn>
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Message-Id: <20240515093927.3453674-2-maobibo@loongson.cn>
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Signed-off-by: Song Gao <gaosong@loongson.cn>
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Signed-off-by: Xianglai Li <lixianglai@loongson.cn>
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---
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hw/loongarch/acpi-build.c | 58 +++++++++++++++++++++++----------------
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1 file changed, 34 insertions(+), 24 deletions(-)
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diff --git a/hw/loongarch/acpi-build.c b/hw/loongarch/acpi-build.c
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index 2b4e09bf37..2555c6763c 100644
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--- a/hw/loongarch/acpi-build.c
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+++ b/hw/loongarch/acpi-build.c
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@@ -166,8 +166,9 @@ static void
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build_srat(GArray *table_data, BIOSLinker *linker, MachineState *machine)
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{
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int i, arch_id, node_id;
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- uint64_t mem_len, mem_base;
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- int nb_numa_nodes = machine->numa_state->num_nodes;
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+ hwaddr len, base, gap;
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+ NodeInfo *numa_info;
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+ int nodes, nb_numa_nodes = machine->numa_state->num_nodes;
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LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(machine);
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MachineClass *mc = MACHINE_GET_CLASS(lvms);
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const CPUArchIdList *arch_ids = mc->possible_cpu_arch_ids(machine);
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@@ -196,35 +197,44 @@ build_srat(GArray *table_data, BIOSLinker *linker, MachineState *machine)
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build_append_int_noprefix(table_data, 0, 4); /* Reserved */
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}
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- /* Node0 */
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- build_srat_memory(table_data, VIRT_LOWMEM_BASE, VIRT_LOWMEM_SIZE,
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- 0, MEM_AFFINITY_ENABLED);
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- mem_base = VIRT_HIGHMEM_BASE;
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- if (!nb_numa_nodes) {
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- mem_len = machine->ram_size - VIRT_LOWMEM_SIZE;
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- } else {
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- mem_len = machine->numa_state->nodes[0].node_mem - VIRT_LOWMEM_SIZE;
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+ base = VIRT_LOWMEM_BASE;
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+ gap = VIRT_LOWMEM_SIZE;
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+ numa_info = machine->numa_state->nodes;
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+ nodes = nb_numa_nodes;
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+ if (!nodes) {
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+ nodes = 1;
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}
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- if (mem_len)
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- build_srat_memory(table_data, mem_base, mem_len, 0, MEM_AFFINITY_ENABLED);
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-
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- /* Node1 - Nodemax */
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- if (nb_numa_nodes) {
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- mem_base += mem_len;
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- for (i = 1; i < nb_numa_nodes; ++i) {
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- if (machine->numa_state->nodes[i].node_mem > 0) {
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- build_srat_memory(table_data, mem_base,
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- machine->numa_state->nodes[i].node_mem, i,
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- MEM_AFFINITY_ENABLED);
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- mem_base += machine->numa_state->nodes[i].node_mem;
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- }
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+
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+ for (i = 0; i < nodes; i++) {
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+ if (nb_numa_nodes) {
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+ len = numa_info[i].node_mem;
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+ } else {
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+ len = machine->ram_size;
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+ }
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+
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+ /*
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+ * memory for the node splited into two part
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+ * lowram: [base, +gap)
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+ * highram: [VIRT_HIGHMEM_BASE, +(len - gap))
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+ */
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+ if (len >= gap) {
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+ build_srat_memory(table_data, base, len, i, MEM_AFFINITY_ENABLED);
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+ len -= gap;
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+ base = VIRT_HIGHMEM_BASE;
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+ gap = machine->ram_size - VIRT_LOWMEM_SIZE;
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+ }
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+
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+ if (len) {
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+ build_srat_memory(table_data, base, len, i, MEM_AFFINITY_ENABLED);
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+ base += len;
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+ gap -= len;
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}
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}
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if (machine->device_memory) {
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build_srat_memory(table_data, machine->device_memory->base,
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memory_region_size(&machine->device_memory->mr),
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- nb_numa_nodes - 1,
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+ nodes - 1,
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MEM_AFFINITY_HOTPLUGGABLE | MEM_AFFINITY_ENABLED);
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}
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--
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2.39.1
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