- fix compile error on loongarch
- hw/loongarch: fix cpu hotplug reset
- hw/loongarch/boot: Use warn_report when no kernel filename
- hw/loongarch: clean code
- hw/loongarch: Add KVM pch msi device support
- hw/loongarch: Add KVM pch pic device support
- hw/loongarch: Add KVM extioi device support
- hw/loongarch: Add KVM IPI device support
- hw/loongarch/virt: Update the ACPI table for hotplug cpu
- hw/loongarch/virt: Add basic CPU plug support
- hw/loongarch/virt: Add CPU topology support
- accel/kvm/kvm-all: Fixes the missing break in vCPU unpark logic
- gdbstub: Add helper function to unregister GDB register space
- physmem: Add helper function to destroy CPU AddressSpace
- hw/acpi: Update CPUs AML with cpu-(ctrl)dev change
- hw/acpi: Update ACPI GED framework to support vCPU Hotplug
- hw/acpi: Move CPU ctrl-dev MMIO region len macro to common header file
- accel/kvm: Extract common KVM vCPU {creation,parking} code
- target/loongarch: Add steal time support on migration
- linux-headers: loongarch: Add kvm_para.h and unistd_64.h
- target/loongarch/kvm: Implement LoongArch PMU extension
- target/loongarch: Implement lbt registers save/restore function
- target/loongarch: Add loongson binary translation feature
- sync loongarch linux-headers
- target/loongarch: Avoid bits shift exceeding width of bool type
- target/loongarch: Use explicit little-endian LD/ST API
- target/loongarch: fix -Werror=maybe-uninitialized false-positive
- target/loongarch: Support QMP dump-guest-memory
- target/loongarch/kvm: Add vCPU reset function
- target/loongarch: Add compatible support about VM reboot
- target/loongarch: Fix cpu_reset set wrong CSR_CRMD
- target/loongarch: Set CSR_PRCFG1 and CSR_PRCFG2 values
- target/loongarch: Remove avail_64 in trans_srai_w() and simplify it
- target/loongarch/kvm: Add software breakpoint support
- target/loongarch: Add loongarch vector property unconditionally
- target/loongarch/kvm: Fix VM recovery from disk failures
- target/loongarch: Put cpucfg operation before CSR register
- target/loongarch: Add TCG macro in structure CPUArchState
- hw/arm/virt-acpi-build.c: Migrate SPCR creation to common location
- hw/loongarch/virt: Add FDT table support with acpi ged pm register
- hw/loongarch/virt: Add description for virt machine type
- hw/loongarch: Add acpi SPCR table support
- hw/loongarch: virt: pass random seed to fdt
- hw/loongarch: virt: support up to 4 serial ports
- hw/loongarch: Remove default enable with VIRTIO_VGA device
- hw/loongarch: Fix length for lowram in ACPI SRAT
- hw/loongarch/virt: Remove unused assignment
- hw/loongarch: Change the tpm support by default
- hw/loongarch/boot.c: fix out-of-bound reading
- hw/loongarch/virt: Use MemTxAttrs interface for misc ops
- tests/libqos: Add loongarch virt machine node
- hw/loongarch: Remove minimum and default memory size
- hw/loongarch: Refine system dram memory region
- hw/loongarch: Refine fwcfg memory map
- hw/loongarch: Refine fadt memory table for numa memory
- hw/loongarch: Refine acpi srat table for numa memory
- hw/loongarch: Add VM mode in IOCSR feature register in kvm mode
- hw/loongarch: Refine default numa id calculation
- hw/loongarch: Rename LoongArchMachineState with LoongArchVirtMachineState
- hw/loongarch: Rename LOONGARCH_MACHINE with LOONGARCH_VIRT_MACHINE
- hw/loongarch: move memory map to boot.c
- loongarch: switch boards to "default y"
- hw/loongarch: Add cells missing from rtc node
- hw/loongarch: Add cells missing from uart node
- hw/loongarch: fdt remove unused irqchip node
- hw/loongarch: fdt adds pcie irq_map node
- hw/loongarch: fdt adds pch_msi Controller
- hw/loongarch: fdt adds pch_pic Controller
- hw/loongarch: fdt adds Extend I/O Interrupt Controller
- hw/loongarch: fdt adds cpu interrupt controller node
- hw/loongarch: Init efi_fdt table
- hw/loongarch: Init efi_initrd table
- hw/loongarch: Init efi_boot_memmap table
- hw/loongarch: Init efi_system_table
- hw/loongarch: Add init_cmdline
- hw/loongarch: Add slave cpu boot_code
- hw/loongarch: Add load initrd
- hw/loongarch: Move boot functions to boot.c
Signed-off-by: Xianglai Li <lixianglai@loongson.cn>
(cherry picked from commit 04ca9e6c8ff19630116722240ae0136cea831c5c)
118 lines
3.6 KiB
Diff
118 lines
3.6 KiB
Diff
From 206b799cb8c218c744f4dcdaf161d11f14c21e0f Mon Sep 17 00:00:00 2001
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From: Song Gao <gaosong@loongson.cn>
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Date: Fri, 26 Apr 2024 17:15:38 +0800
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Subject: [PATCH 04/78] hw/loongarch: Add init_cmdline
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Add init_cmline and set boot_info->a0, a1
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Signed-off-by: Song Gao <gaosong@loongson.cn>
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Reviewed-by: Bibo Mao <maobibo@loongson.cn>
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Message-Id: <20240426091551.2397867-5-gaosong@loongson.cn>
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Signed-off-by: Xianglai Li <lixianglai@loongson.cn>
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---
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hw/loongarch/boot.c | 30 ++++++++++++++++++++++++++++++
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include/hw/loongarch/virt.h | 2 ++
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target/loongarch/cpu.h | 2 ++
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3 files changed, 34 insertions(+)
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diff --git a/hw/loongarch/boot.c b/hw/loongarch/boot.c
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index fb6effbaff..127085bcc4 100644
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--- a/hw/loongarch/boot.c
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+++ b/hw/loongarch/boot.c
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@@ -63,6 +63,16 @@ static const unsigned int slave_boot_code[] = {
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0x4c000020, /* jirl $zero, $ra,0 */
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};
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+static void init_cmdline(struct loongarch_boot_info *info, void *p, void *start)
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+{
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+ hwaddr cmdline_addr = p - start;
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+
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+ info->a0 = 1;
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+ info->a1 = cmdline_addr;
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+
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+ memcpy(p, info->kernel_cmdline, COMMAND_LINE_SIZE);
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+}
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+
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static uint64_t cpu_loongarch_virt_to_phys(void *opaque, uint64_t addr)
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{
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return addr & MAKE_64BIT_MASK(0, TARGET_PHYS_ADDR_SPACE_BITS);
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@@ -121,6 +131,10 @@ static void reset_load_elf(void *opaque)
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cpu_reset(CPU(cpu));
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if (env->load_elf) {
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+ if (cpu == LOONGARCH_CPU(first_cpu)) {
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+ env->gpr[4] = env->boot_info->a0;
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+ env->gpr[5] = env->boot_info->a1;
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+ }
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cpu_set_pc(CPU(cpu), env->elf_address);
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}
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}
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@@ -158,8 +172,17 @@ static void loongarch_firmware_boot(LoongArchMachineState *lams,
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fw_cfg_add_kernel_info(info, lams->fw_cfg);
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}
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+static void init_boot_rom(struct loongarch_boot_info *info, void *p)
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+{
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+ void *start = p;
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+
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+ init_cmdline(info, p, start);
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+ p += COMMAND_LINE_SIZE;
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+}
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+
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static void loongarch_direct_kernel_boot(struct loongarch_boot_info *info)
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{
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+ void *p, *bp;
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int64_t kernel_addr = 0;
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LoongArchCPU *lacpu;
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CPUState *cs;
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@@ -173,6 +196,12 @@ static void loongarch_direct_kernel_boot(struct loongarch_boot_info *info)
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}
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}
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+ /* Load cmdline and system tables at [0 - 1 MiB] */
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+ p = g_malloc0(1 * MiB);
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+ bp = p;
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+ init_boot_rom(info, p);
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+ rom_add_blob_fixed_as("boot_info", bp, 1 * MiB, 0, &address_space_memory);
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+
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/* Load slave boot code at pflash0 . */
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void *boot_code = g_malloc0(VIRT_FLASH0_SIZE);
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memcpy(boot_code, &slave_boot_code, sizeof(slave_boot_code));
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@@ -190,6 +219,7 @@ static void loongarch_direct_kernel_boot(struct loongarch_boot_info *info)
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}
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g_free(boot_code);
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+ g_free(bp);
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}
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void loongarch_load_kernel(MachineState *ms, struct loongarch_boot_info *info)
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diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h
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index 02c8234b8d..ffff075f63 100644
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--- a/include/hw/loongarch/virt.h
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+++ b/include/hw/loongarch/virt.h
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@@ -33,6 +33,8 @@
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#define VIRT_GED_MEM_ADDR (VIRT_GED_EVT_ADDR + ACPI_GED_EVT_SEL_LEN)
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#define VIRT_GED_REG_ADDR (VIRT_GED_MEM_ADDR + MEMORY_HOTPLUG_IO_LEN)
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+#define COMMAND_LINE_SIZE 512
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+
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struct LoongArchMachineState {
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/*< private >*/
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MachineState parent_obj;
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diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
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index 0ed24051af..e3a15c593f 100644
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--- a/target/loongarch/cpu.h
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+++ b/target/loongarch/cpu.h
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@@ -364,6 +364,8 @@ typedef struct CPUArchState {
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uint32_t mp_state;
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/* Store ipistate to access from this struct */
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DeviceState *ipistate;
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+
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+ struct loongarch_boot_info *boot_info;
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#endif
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struct {
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uint64_t guest_addr;
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--
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2.39.1
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