b60d6a584c
- target/i386: csv: Release CSV3 shared pages after unmapping DMA - target/i386: Add new CPU model ClearwaterForest - target/i386: add sha512, sm3, sm4 feature bits - docs: Add GNR, SRF and CWF CPU models - target/i386: Export BHI_NO bit to guests - target/i386: Introduce SierraForest-v2 model - vdpa/iommufd:Implement DMA mapping through the iommufd interface - vdpa/iommufd:Introduce vdpa-iommufd module - vdpa/iommufd:support associating iommufd backend for vDPA devices - Kconfig/iommufd/VDPA: Update IOMMUFD module configuration dependencies The vDPA module can also use IOMMUFD like the VFIO module. - backends/iommufd: Get rid of qemu_open_old() - backends/iommufd: Make iommufd_backend_*() return bool - backends/iommufd: Fix missing ERRP_GUARD() for error_prepend() - backends/iommufd: Remove mutex - backends/iommufd: Remove check on number of backend users - hw/intc: Add extioi ability of 256 vcpu interrupt routing - hw/rtc: Fixed loongson rtc emulation errors - hw/loongarch/boot: Adjust the loading position of the initrd - target/loongarch: Fix the cpu unplug resource leak - target/loongarch: fix vcpu reset command word issue - vdpa:Fix dirty page bitmap synchronization not done after suspend for vdpa devices Signed-off-by: Jiabo Feng <fengjiabo1@huawei.com> (cherry picked from commit a5212066e7516ff2a316e1b2feaa75dd5ee4d17a)
120 lines
4.9 KiB
Diff
120 lines
4.9 KiB
Diff
From 2753607e8768002debb4608dacafe1309420a4dd Mon Sep 17 00:00:00 2001
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From: Tao Su <tao1.su@linux.intel.com>
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Date: Tue, 21 Jan 2025 10:06:50 +0800
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Subject: [PATCH] docs: Add GNR, SRF and CWF CPU models
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commit 0a6dec6d11e5e392dcd6299548bf1514f1201707 upstream.
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Update GraniteRapids, SierraForest and ClearwaterForest CPU models in
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section "Preferred CPU models for Intel x86 hosts".
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Also introduce bhi-no, gds-no and rfds-no in doc.
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Intel-SIG: commit 0a6dec6d11e5 docs: Add GNR, SRF and CWF CPU models.
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Suggested-by: Zhao Liu <zhao1.liu@intel.com>
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Signed-off-by: Tao Su <tao1.su@linux.intel.com>
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Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
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Link: https://lore.kernel.org/r/20250121020650.1899618-5-tao1.su@linux.intel.com
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Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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[ Quanxian Wang: amend commit log ]
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Signed-off-by: Quanxian Wang <quanxian.wang@intel.com>
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---
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docs/system/cpu-models-x86.rst.inc | 50 +++++++++++++++++++++++++++---
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1 file changed, 46 insertions(+), 4 deletions(-)
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diff --git a/docs/system/cpu-models-x86.rst.inc b/docs/system/cpu-models-x86.rst.inc
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index 7f6368f999..37fe1d0ac8 100644
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--- a/docs/system/cpu-models-x86.rst.inc
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+++ b/docs/system/cpu-models-x86.rst.inc
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@@ -71,6 +71,16 @@ mixture of host CPU models between machines, if live migration
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compatibility is required, use the newest CPU model that is compatible
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across all desired hosts.
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+``ClearwaterForest``
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+ Intel Xeon Processor (ClearwaterForest, 2025)
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+
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+``SierraForest``, ``SierraForest-v2``
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+ Intel Xeon Processor (SierraForest, 2024), SierraForest-v2 mitigates
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+ the GDS and RFDS vulnerabilities with stepping 3.
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+
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+``GraniteRapids``, ``GraniteRapids-v2``
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+ Intel Xeon Processor (GraniteRapids, 2024)
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+
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``Cascadelake-Server``, ``Cascadelake-Server-noTSX``
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Intel Xeon Processor (Cascade Lake, 2019), with "stepping" levels 6
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or 7 only. (The Cascade Lake Xeon processor with *stepping 5 is
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@@ -181,7 +191,7 @@ features are included if using "Host passthrough" or "Host model".
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CVE-2018-12127, [MSBDS] CVE-2018-12126).
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This is an MSR (Model-Specific Register) feature rather than a CPUID feature,
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- so it will not appear in the Linux ``/proc/cpuinfo`` in the host or
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+ therefore it will not appear in the Linux ``/proc/cpuinfo`` in the host or
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guest. Instead, the host kernel uses it to populate the MDS
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vulnerability file in ``sysfs``.
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@@ -189,10 +199,10 @@ features are included if using "Host passthrough" or "Host model".
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affected} in the ``/sys/devices/system/cpu/vulnerabilities/mds`` file.
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``taa-no``
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- Recommended to inform that the guest that the host is ``not``
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+ Recommended to inform the guest that the host is ``not``
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vulnerable to CVE-2019-11135, TSX Asynchronous Abort (TAA).
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- This too is an MSR feature, so it does not show up in the Linux
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+ This is also an MSR feature, therefore it does not show up in the Linux
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``/proc/cpuinfo`` in the host or guest.
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It should only be enabled for VMs if the host reports ``Not affected``
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@@ -214,7 +224,7 @@ features are included if using "Host passthrough" or "Host model".
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By disabling TSX, KVM-based guests can avoid paying the price of
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mitigating TSX-based attacks.
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- Note that ``tsx-ctrl`` too is an MSR feature, so it does not show
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+ Note that ``tsx-ctrl`` is also an MSR feature, therefore it does not show
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up in the Linux ``/proc/cpuinfo`` in the host or guest.
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To validate that Intel TSX is indeed disabled for the guest, there are
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@@ -223,6 +233,38 @@ features are included if using "Host passthrough" or "Host model".
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``/sys/devices/system/cpu/vulnerabilities/tsx_async_abort`` file in
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the guest should report ``Mitigation: TSX disabled``.
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+``bhi-no``
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+ Recommended to inform the guest that the host is ``not``
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+ vulnerable to CVE-2022-0001, Branch History Injection (BHI).
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+
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+ This is also an MSR feature, therefore it does not show up in the Linux
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+ ``/proc/cpuinfo`` in the host or guest.
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+
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+ It should only be enabled for VMs if the host reports
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+ ``BHI: Not affected`` in the
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+ ``/sys/devices/system/cpu/vulnerabilities/spectre_v2`` file.
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+
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+``gds-no``
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+ Recommended to inform the guest that the host is ``not``
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+ vulnerable to CVE-2022-40982, Gather Data Sampling (GDS).
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+
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+ This is also an MSR feature, therefore it does not show up in the Linux
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+ ``/proc/cpuinfo`` in the host or guest.
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+
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+ It should only be enabled for VMs if the host reports ``Not affected``
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+ in the ``/sys/devices/system/cpu/vulnerabilities/gather_data_sampling``
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+ file.
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+
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+``rfds-no``
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+ Recommended to inform the guest that the host is ``not``
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+ vulnerable to CVE-2023-28746, Register File Data Sampling (RFDS).
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+
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+ This is also an MSR feature, therefore it does not show up in the Linux
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+ ``/proc/cpuinfo`` in the host or guest.
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+
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+ It should only be enabled for VMs if the host reports ``Not affected``
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+ in the ``/sys/devices/system/cpu/vulnerabilities/reg_file_data_sampling``
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+ file.
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Preferred CPU models for AMD x86 hosts
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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--
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2.41.0.windows.1
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