1 Commits

Author SHA1 Message Date
Chen Qun
011ace1710 target/i386: Add missed security features to Cooperlake CPU model
It lacks two security feature bits in MSR_IA32_ARCH_CAPABILITIES in
current Cooperlake CPU model, so add them.

This is part of uptream commit 2dea9d9

Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Jingyi Wang <wangjingyi11@huawei.com>
2021-07-19 21:29:25 +08:00