The implementation of CPUClass::parse_features only supports CPU
features in "feature=value" format. However, libvirt maybe send us a
CPU feature string in "+feature/-feature" format. Hence, we need to
override CPUClass::parse_features to support CPU feature string in both
"feature=value" and "+feature/-feature" format.
The logic of AArch64CPUClass::parse_features is similar to that of
X86CPUClass::parse_features.
Signed-off-by: zhanghailiang <zhang.zhanghailiang@huawei.com>
Signed-off-by: Peng Liang <liangpeng10@huawei.com>
Signed-off-by: Dongxu Sun <sundongxu3@huawei.com>
QEMU does not support disable/enable CPU features in AArch64 for now.
This patch series add support for CPU features in AArch64.
Firstly, we change the isar struct in ARMCPU to an array for
convenience. Secondly, we add support to configure CPU feautres in
AArch64 and make sure that the ID registers can be synchronized to KVM
so that guest can read the value we configure. Thirdly, we add a
mechanism to solve the dependency relationship of some CPU features.
Last, we add a KVM_CAP_ARM_CPU_FEATURE to check whether KVM supports to
set CPU features in AArch64.
Also export CPU features to the result of qmp query-cpu-model-expansion
so that libvirt can get the supported CPU features.
Update the ID fields to ARMv8.6 and add some CPU features according to
the new ID fields.
With related KVM patch set[1], we can disable/enable CPU features in
AArch64.
[1] https://patchwork.kernel.org/cover/11711693/
Signed-off-by: Peng Liang <liangpeng10@huawei.com>
