1 Commits

Author SHA1 Message Date
Chen Qun
4cb2eaa9a9 i386: cache passthrough: Update AMD 8000_001D.EAX[25:14] based on vCPU topo
On AMD target, when host cache passthrough is disabled we will
emulate the guest caches with default values and initialize the
shared cpu list of the caches based on vCPU topology. However
when host cache passthrough is enabled, the shared cpu list is
consistent with host regardless what the vCPU topology is.

For example, when cache passthrough is enabled, running a guest
with vThreads=1 on a host with pThreads=2, we will get that there
are every *two* logical vCPUs sharing a L1/L2 cache, which is not
consistent with the vCPU topology (vThreads=1).

So let's reinitialize BITs[25:14] of AMD CPUID 8000_001D.EAX
based on the actual vCPU topology instead of host pCPU topology.

Signed-off-by: Yanan Wang <wangyanan55@huawei.com>
2022-03-19 14:42:31 +08:00